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drm/msm/disp/dpu1: avoid perf update in frame done event 

Crtc perf update from frame event work can result in
wrong bandwidth and clock update from dpu if the work
is scheduled after the swap state has happened.

Avoid such issues by moving perf update to complete
commit once the frame is accepted by the hardware.

Fixes: a29c8c0241 ("drm/msm/disp/dpu1: fix display underruns during modeset")
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/1622092076-5100-1-git-send-email-mkrishn@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Krishna Manikandan 2021-05-27 10:37:56 +05:30 committed by Rob Clark
parent 5b702d787b
commit a1f2ba60ea
1 changed files with 1 additions and 3 deletions
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4
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
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@ -406,9 +406,6 @@ static void dpu_crtc_frame_event_work(struct kthread_work *work)
fevent->event);
}
if (fevent->event & DPU_ENCODER_FRAME_EVENT_DONE)
dpu_core_perf_crtc_update(crtc, 0, false);
if (fevent->event & (DPU_ENCODER_FRAME_EVENT_DONE
| DPU_ENCODER_FRAME_EVENT_ERROR))
frame_done = true;
@ -476,6 +473,7 @@ static void dpu_crtc_frame_event_cb(void *data, u32 event)
void dpu_crtc_complete_commit(struct drm_crtc *crtc)
{
trace_dpu_crtc_complete_commit(DRMID(crtc));
dpu_core_perf_crtc_update(crtc, 0, false);
_dpu_crtc_complete_flip(crtc);
}