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X86 interrupt related changes: 

- Consolidate the VECTOR defines and the usage sites.
 
   - Cleanup GDT/IDT related code and replace open coded ASM with proper
     native helfper functions.
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Merge tag 'x86-irq-2021-06-29' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 interrupt related updates from Thomas Gleixner:

 - Consolidate the VECTOR defines and the usage sites.

 - Cleanup GDT/IDT related code and replace open coded ASM with proper
   native helper functions.

* tag 'x86-irq-2021-06-29' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/kexec: Set_[gi]dt() -> native_[gi]dt_invalidate() in machine_kexec_*.c
  x86: Add native_[ig]dt_invalidate()
  x86/idt: Remove address argument from idt_invalidate()
  x86/irq: Add and use NR_EXTERNAL_VECTORS and NR_SYSTEM_VECTORS
  x86/irq: Remove unused vectors defines
This commit is contained in:
Linus Torvalds 2021-06-29 12:36:59 -07:00
parent a941a0349c 056c52f5e8
commit a22c3f615a
8 changed files with 40 additions and 55 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
arch/x86/include/asm/desc.h
View File

@ -224,6 +224,26 @@ static inline void store_idt(struct desc_ptr *dtr)
asm volatile("sidt %0":"=m" (*dtr));
}
static inline void native_gdt_invalidate(void)
{
const struct desc_ptr invalid_gdt = {
.address = 0,
.size = 0
};
native_load_gdt(&invalid_gdt);
}
static inline void native_idt_invalidate(void)
{
const struct desc_ptr invalid_idt = {
.address = 0,
.size = 0
};
native_load_idt(&invalid_idt);
}
/*
* The LTR instruction marks the TSS GDT entry as busy. On 64-bit, the GDT is
* a read-only remapping. To prevent a page fault, the GDT is switched to the
@ -425,6 +445,6 @@ extern void idt_setup_early_pf(void);
static inline void idt_setup_early_pf(void) { }
#endif
extern void idt_invalidate(void *addr);
extern void idt_invalidate(void);
#endif /* _ASM_X86_DESC_H */

4
arch/x86/include/asm/idtentry.h
View File

@ -495,7 +495,7 @@ __visible noinstr void func(struct pt_regs *regs, \
.align 8
SYM_CODE_START(irq_entries_start)
vector=FIRST_EXTERNAL_VECTOR
.rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
.rept NR_EXTERNAL_VECTORS
UNWIND_HINT_IRET_REGS
0 :
.byte 0x6a, vector
@ -511,7 +511,7 @@ SYM_CODE_END(irq_entries_start)
.align 8
SYM_CODE_START(spurious_entries_start)
vector=FIRST_SYSTEM_VECTOR
.rept (NR_VECTORS - FIRST_SYSTEM_VECTOR)
.rept NR_SYSTEM_VECTORS
UNWIND_HINT_IRET_REGS
0 :
.byte 0x6a, vector

7
arch/x86/include/asm/irq_vectors.h
View File

@ -26,8 +26,8 @@
* This file enumerates the exact layout of them:
*/
/* This is used as an interrupt vector when programming the APIC. */
#define NMI_VECTOR 0x02
#define MCE_VECTOR 0x12
/*
* IDT vectors usable for external interrupt sources start at 0x20.
@ -84,7 +84,7 @@
*/
#define IRQ_WORK_VECTOR 0xf6
#define UV_BAU_MESSAGE 0xf5
/* 0xf5 - unused, was UV_BAU_MESSAGE */
#define DEFERRED_ERROR_VECTOR 0xf4
/* Vector on which hypervisor callbacks will be delivered */
@ -114,6 +114,9 @@
#define FIRST_SYSTEM_VECTOR NR_VECTORS
#endif
#define NR_EXTERNAL_VECTORS (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
#define NR_SYSTEM_VECTORS (NR_VECTORS - FIRST_SYSTEM_VECTOR)
/*
* Size the maximum number of interrupts.
*

5
arch/x86/kernel/idt.c
View File

@ -315,11 +315,10 @@ void __init idt_setup_early_handler(void)
/**
* idt_invalidate - Invalidate interrupt descriptor table
* @addr: The virtual address of the 'invalid' IDT
*/
void idt_invalidate(void *addr)
void idt_invalidate(void)
{
struct desc_ptr idt = { .address = (unsigned long) addr, .size = 0 };
static const struct desc_ptr idt = { .address = 0, .size = 0 };
load_idt(&idt);
}

15
arch/x86/kernel/machine_kexec_32.c
View File

@ -23,17 +23,6 @@
#include <asm/set_memory.h>
#include <asm/debugreg.h>
static void set_gdt(void *newgdt, __u16 limit)
{
struct desc_ptr curgdt;
/* ia32 supports unaligned loads & stores */
curgdt.size = limit;
curgdt.address = (unsigned long)newgdt;
load_gdt(&curgdt);
}
static void load_segments(void)
{
#define __STR(X) #X
@ -232,8 +221,8 @@ void machine_kexec(struct kimage *image)
* The gdt & idt are now invalid.
* If you want to load them you must set up your own idt & gdt.
*/
idt_invalidate(phys_to_virt(0));
set_gdt(phys_to_virt(0), 0);
native_idt_invalidate();
native_gdt_invalidate();
/* now call it */
image->start = relocate_kernel_ptr((unsigned long)image->head,

33
arch/x86/kernel/machine_kexec_64.c
View File

@ -256,35 +256,6 @@ static int init_pgtable(struct kimage *image, unsigned long start_pgtable)
return init_transition_pgtable(image, level4p);
}
static void set_idt(void *newidt, u16 limit)
{
struct desc_ptr curidt;
/* x86-64 supports unaligned loads & stores */
curidt.size = limit;
curidt.address = (unsigned long)newidt;
__asm__ __volatile__ (
"lidtq %0\n"
: : "m" (curidt)
);
};
static void set_gdt(void *newgdt, u16 limit)
{
struct desc_ptr curgdt;
/* x86-64 supports unaligned loads & stores */
curgdt.size = limit;
curgdt.address = (unsigned long)newgdt;
__asm__ __volatile__ (
"lgdtq %0\n"
: : "m" (curgdt)
);
};
static void load_segments(void)
{
__asm__ __volatile__ (
@ -379,8 +350,8 @@ void machine_kexec(struct kimage *image)
* The gdt & idt are now invalid.
* If you want to load them you must set up your own idt & gdt.
*/
set_gdt(phys_to_virt(0), 0);
set_idt(phys_to_virt(0), 0);
native_idt_invalidate();
native_gdt_invalidate();
/* now call it */
image->start = relocate_kernel((unsigned long)image->head,

2
arch/x86/kernel/reboot.c
View File

@ -669,7 +669,7 @@ static void native_machine_emergency_restart(void)
break;
case BOOT_TRIPLE:
idt_invalidate(NULL);
idt_invalidate();
__asm__ __volatile__("int3");
/* We're probably dead after this, but... */

7
tools/arch/x86/include/asm/irq_vectors.h
View File

@ -26,8 +26,8 @@
* This file enumerates the exact layout of them:
*/
/* This is used as an interrupt vector when programming the APIC. */
#define NMI_VECTOR 0x02
#define MCE_VECTOR 0x12
/*
* IDT vectors usable for external interrupt sources start at 0x20.
@ -84,7 +84,7 @@
*/
#define IRQ_WORK_VECTOR 0xf6
#define UV_BAU_MESSAGE 0xf5
/* 0xf5 - unused, was UV_BAU_MESSAGE */
#define DEFERRED_ERROR_VECTOR 0xf4
/* Vector on which hypervisor callbacks will be delivered */
@ -114,6 +114,9 @@
#define FIRST_SYSTEM_VECTOR NR_VECTORS
#endif
#define NR_EXTERNAL_VECTORS (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
#define NR_SYSTEM_VECTORS (NR_VECTORS - FIRST_SYSTEM_VECTOR)
/*
* Size the maximum number of interrupts.
*