mirror of https://gitee.com/openkylin/linux.git
Merge branch 'pci/vmd'
- Add physical offset helper (Jon Derrick) - Add bus offset configuration helper (Jon Derrick) - Add IRQ domain configuration helper (Jon Derrick) - Add IRQ allocation helper (Jon Derrick) - Drop pci_save_state()/pci_restore_state() in favor of the PCI core PM (Jon Derrick) * pci/vmd: PCI: vmd: Update VMD PM to correctly use generic PCI PM PCI: vmd: Create IRQ allocation helper PCI: vmd: Create IRQ Domain configuration helper PCI: vmd: Create bus offset configuration helper PCI: vmd: Create physical offset helper
This commit is contained in:
commit
a2340daa6a
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@ -298,6 +298,34 @@ static struct msi_domain_info vmd_msi_domain_info = {
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.chip = &vmd_msi_controller,
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};
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static int vmd_create_irq_domain(struct vmd_dev *vmd)
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{
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struct fwnode_handle *fn;
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fn = irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.domain);
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if (!fn)
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return -ENODEV;
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vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info,
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x86_vector_domain);
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if (!vmd->irq_domain) {
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irq_domain_free_fwnode(fn);
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return -ENODEV;
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}
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return 0;
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}
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static void vmd_remove_irq_domain(struct vmd_dev *vmd)
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{
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if (vmd->irq_domain) {
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struct fwnode_handle *fn = vmd->irq_domain->fwnode;
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irq_domain_remove(vmd->irq_domain);
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irq_domain_free_fwnode(fn);
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}
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}
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static char __iomem *vmd_cfg_addr(struct vmd_dev *vmd, struct pci_bus *bus,
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unsigned int devfn, int reg, int len)
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{
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@ -417,10 +445,141 @@ static int vmd_find_free_domain(void)
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return domain + 1;
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}
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static int vmd_get_phys_offsets(struct vmd_dev *vmd, bool native_hint,
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resource_size_t *offset1,
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resource_size_t *offset2)
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{
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struct pci_dev *dev = vmd->dev;
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u64 phys1, phys2;
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if (native_hint) {
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u32 vmlock;
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int ret;
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ret = pci_read_config_dword(dev, PCI_REG_VMLOCK, &vmlock);
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if (ret || vmlock == ~0)
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return -ENODEV;
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if (MB2_SHADOW_EN(vmlock)) {
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void __iomem *membar2;
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membar2 = pci_iomap(dev, VMD_MEMBAR2, 0);
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if (!membar2)
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return -ENOMEM;
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phys1 = readq(membar2 + MB2_SHADOW_OFFSET);
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phys2 = readq(membar2 + MB2_SHADOW_OFFSET + 8);
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pci_iounmap(dev, membar2);
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} else
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return 0;
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} else {
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/* Hypervisor-Emulated Vendor-Specific Capability */
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int pos = pci_find_capability(dev, PCI_CAP_ID_VNDR);
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u32 reg, regu;
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pci_read_config_dword(dev, pos + 4, ®);
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/* "SHDW" */
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if (pos && reg == 0x53484457) {
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pci_read_config_dword(dev, pos + 8, ®);
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pci_read_config_dword(dev, pos + 12, ®u);
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phys1 = (u64) regu << 32 | reg;
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pci_read_config_dword(dev, pos + 16, ®);
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pci_read_config_dword(dev, pos + 20, ®u);
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phys2 = (u64) regu << 32 | reg;
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} else
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return 0;
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}
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*offset1 = dev->resource[VMD_MEMBAR1].start -
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(phys1 & PCI_BASE_ADDRESS_MEM_MASK);
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*offset2 = dev->resource[VMD_MEMBAR2].start -
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(phys2 & PCI_BASE_ADDRESS_MEM_MASK);
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return 0;
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}
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static int vmd_get_bus_number_start(struct vmd_dev *vmd)
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{
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struct pci_dev *dev = vmd->dev;
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u16 reg;
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pci_read_config_word(dev, PCI_REG_VMCAP, ®);
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if (BUS_RESTRICT_CAP(reg)) {
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pci_read_config_word(dev, PCI_REG_VMCONFIG, ®);
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switch (BUS_RESTRICT_CFG(reg)) {
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case 0:
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vmd->busn_start = 0;
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break;
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case 1:
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vmd->busn_start = 128;
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break;
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case 2:
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vmd->busn_start = 224;
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break;
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default:
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pci_err(dev, "Unknown Bus Offset Setting (%d)\n",
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BUS_RESTRICT_CFG(reg));
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return -ENODEV;
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}
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}
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return 0;
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}
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static irqreturn_t vmd_irq(int irq, void *data)
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{
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struct vmd_irq_list *irqs = data;
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struct vmd_irq *vmdirq;
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int idx;
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idx = srcu_read_lock(&irqs->srcu);
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list_for_each_entry_rcu(vmdirq, &irqs->irq_list, node)
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generic_handle_irq(vmdirq->virq);
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srcu_read_unlock(&irqs->srcu, idx);
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return IRQ_HANDLED;
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}
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static int vmd_alloc_irqs(struct vmd_dev *vmd)
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{
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struct pci_dev *dev = vmd->dev;
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int i, err;
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vmd->msix_count = pci_msix_vec_count(dev);
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if (vmd->msix_count < 0)
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return -ENODEV;
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vmd->msix_count = pci_alloc_irq_vectors(dev, 1, vmd->msix_count,
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PCI_IRQ_MSIX);
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if (vmd->msix_count < 0)
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return vmd->msix_count;
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vmd->irqs = devm_kcalloc(&dev->dev, vmd->msix_count, sizeof(*vmd->irqs),
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GFP_KERNEL);
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if (!vmd->irqs)
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return -ENOMEM;
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for (i = 0; i < vmd->msix_count; i++) {
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err = init_srcu_struct(&vmd->irqs[i].srcu);
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if (err)
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return err;
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INIT_LIST_HEAD(&vmd->irqs[i].irq_list);
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err = devm_request_irq(&dev->dev, pci_irq_vector(dev, i),
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vmd_irq, IRQF_NO_THREAD,
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"vmd", &vmd->irqs[i]);
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if (err)
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return err;
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}
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return 0;
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}
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static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
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{
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struct pci_sysdata *sd = &vmd->sysdata;
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struct fwnode_handle *fn;
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struct resource *res;
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u32 upper_bits;
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unsigned long flags;
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@ -428,6 +587,7 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
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resource_size_t offset[2] = {0};
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resource_size_t membar2_offset = 0x2000;
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struct pci_bus *child;
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int ret;
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/*
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* Shadow registers may exist in certain VMD device ids which allow
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@ -436,50 +596,14 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
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* or 0, depending on an enable bit in the VMD device.
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*/
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if (features & VMD_FEAT_HAS_MEMBAR_SHADOW) {
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u32 vmlock;
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int ret;
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membar2_offset = MB2_SHADOW_OFFSET + MB2_SHADOW_SIZE;
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ret = pci_read_config_dword(vmd->dev, PCI_REG_VMLOCK, &vmlock);
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if (ret || vmlock == ~0)
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return -ENODEV;
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if (MB2_SHADOW_EN(vmlock)) {
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void __iomem *membar2;
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membar2 = pci_iomap(vmd->dev, VMD_MEMBAR2, 0);
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if (!membar2)
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return -ENOMEM;
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offset[0] = vmd->dev->resource[VMD_MEMBAR1].start -
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(readq(membar2 + MB2_SHADOW_OFFSET) &
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PCI_BASE_ADDRESS_MEM_MASK);
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offset[1] = vmd->dev->resource[VMD_MEMBAR2].start -
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(readq(membar2 + MB2_SHADOW_OFFSET + 8) &
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PCI_BASE_ADDRESS_MEM_MASK);
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pci_iounmap(vmd->dev, membar2);
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}
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}
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if (features & VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP) {
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int pos = pci_find_capability(vmd->dev, PCI_CAP_ID_VNDR);
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u32 reg, regu;
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pci_read_config_dword(vmd->dev, pos + 4, ®);
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/* "SHDW" */
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if (pos && reg == 0x53484457) {
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pci_read_config_dword(vmd->dev, pos + 8, ®);
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pci_read_config_dword(vmd->dev, pos + 12, ®u);
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offset[0] = vmd->dev->resource[VMD_MEMBAR1].start -
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(((u64) regu << 32 | reg) &
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PCI_BASE_ADDRESS_MEM_MASK);
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pci_read_config_dword(vmd->dev, pos + 16, ®);
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pci_read_config_dword(vmd->dev, pos + 20, ®u);
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offset[1] = vmd->dev->resource[VMD_MEMBAR2].start -
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(((u64) regu << 32 | reg) &
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PCI_BASE_ADDRESS_MEM_MASK);
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}
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ret = vmd_get_phys_offsets(vmd, true, &offset[0], &offset[1]);
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if (ret)
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return ret;
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} else if (features & VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP) {
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ret = vmd_get_phys_offsets(vmd, false, &offset[0], &offset[1]);
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if (ret)
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return ret;
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}
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/*
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* limits the bus range to between 0-127, 128-255, or 224-255
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*/
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if (features & VMD_FEAT_HAS_BUS_RESTRICTIONS) {
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u16 reg16;
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pci_read_config_word(vmd->dev, PCI_REG_VMCAP, ®16);
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if (BUS_RESTRICT_CAP(reg16)) {
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pci_read_config_word(vmd->dev, PCI_REG_VMCONFIG,
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®16);
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switch (BUS_RESTRICT_CFG(reg16)) {
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case 1:
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vmd->busn_start = 128;
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break;
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case 2:
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vmd->busn_start = 224;
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break;
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case 3:
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pci_err(vmd->dev, "Unknown Bus Offset Setting\n");
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return -ENODEV;
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default:
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break;
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}
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}
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ret = vmd_get_bus_number_start(vmd);
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if (ret)
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return ret;
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}
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res = &vmd->dev->resource[VMD_CFGBAR];
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@ -568,16 +674,9 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
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sd->node = pcibus_to_node(vmd->dev->bus);
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fn = irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.domain);
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if (!fn)
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return -ENODEV;
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vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info,
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x86_vector_domain);
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if (!vmd->irq_domain) {
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irq_domain_free_fwnode(fn);
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return -ENODEV;
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}
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ret = vmd_create_irq_domain(vmd);
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if (ret)
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return ret;
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pci_add_resource(&resources, &vmd->resources[0]);
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pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);
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@ -587,13 +686,13 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
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&vmd_ops, sd, &resources);
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if (!vmd->bus) {
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pci_free_resource_list(&resources);
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irq_domain_remove(vmd->irq_domain);
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irq_domain_free_fwnode(fn);
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vmd_remove_irq_domain(vmd);
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return -ENODEV;
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}
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vmd_attach_resources(vmd);
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dev_set_msi_domain(&vmd->bus->dev, vmd->irq_domain);
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if (vmd->irq_domain)
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dev_set_msi_domain(&vmd->bus->dev, vmd->irq_domain);
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pci_scan_child_bus(vmd->bus);
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pci_assign_unassigned_bus_resources(vmd->bus);
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@ -613,24 +712,10 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
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return 0;
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}
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static irqreturn_t vmd_irq(int irq, void *data)
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{
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struct vmd_irq_list *irqs = data;
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struct vmd_irq *vmdirq;
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int idx;
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idx = srcu_read_lock(&irqs->srcu);
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list_for_each_entry_rcu(vmdirq, &irqs->irq_list, node)
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generic_handle_irq(vmdirq->virq);
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srcu_read_unlock(&irqs->srcu, idx);
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return IRQ_HANDLED;
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}
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static int vmd_probe(struct pci_dev *dev, const struct pci_device_id *id)
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{
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struct vmd_dev *vmd;
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int i, err;
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int err;
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if (resource_size(&dev->resource[VMD_CFGBAR]) < (1 << 20))
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return -ENOMEM;
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@ -653,32 +738,9 @@ static int vmd_probe(struct pci_dev *dev, const struct pci_device_id *id)
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dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)))
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return -ENODEV;
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vmd->msix_count = pci_msix_vec_count(dev);
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if (vmd->msix_count < 0)
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return -ENODEV;
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vmd->msix_count = pci_alloc_irq_vectors(dev, 1, vmd->msix_count,
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PCI_IRQ_MSIX);
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if (vmd->msix_count < 0)
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return vmd->msix_count;
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vmd->irqs = devm_kcalloc(&dev->dev, vmd->msix_count, sizeof(*vmd->irqs),
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GFP_KERNEL);
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if (!vmd->irqs)
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return -ENOMEM;
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for (i = 0; i < vmd->msix_count; i++) {
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err = init_srcu_struct(&vmd->irqs[i].srcu);
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if (err)
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return err;
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INIT_LIST_HEAD(&vmd->irqs[i].irq_list);
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err = devm_request_irq(&dev->dev, pci_irq_vector(dev, i),
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vmd_irq, IRQF_NO_THREAD,
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"vmd", &vmd->irqs[i]);
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if (err)
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return err;
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}
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err = vmd_alloc_irqs(vmd);
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if (err)
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return err;
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spin_lock_init(&vmd->cfg_lock);
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pci_set_drvdata(dev, vmd);
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@ -702,15 +764,13 @@ static void vmd_cleanup_srcu(struct vmd_dev *vmd)
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static void vmd_remove(struct pci_dev *dev)
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{
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struct vmd_dev *vmd = pci_get_drvdata(dev);
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struct fwnode_handle *fn = vmd->irq_domain->fwnode;
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sysfs_remove_link(&vmd->dev->dev.kobj, "domain");
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pci_stop_root_bus(vmd->bus);
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pci_remove_root_bus(vmd->bus);
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vmd_cleanup_srcu(vmd);
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vmd_detach_resources(vmd);
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irq_domain_remove(vmd->irq_domain);
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irq_domain_free_fwnode(fn);
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vmd_remove_irq_domain(vmd);
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}
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#ifdef CONFIG_PM_SLEEP
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@ -723,7 +783,6 @@ static int vmd_suspend(struct device *dev)
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for (i = 0; i < vmd->msix_count; i++)
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devm_free_irq(dev, pci_irq_vector(pdev, i), &vmd->irqs[i]);
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pci_save_state(pdev);
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return 0;
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}
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@ -741,7 +800,6 @@ static int vmd_resume(struct device *dev)
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return err;
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}
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pci_restore_state(pdev);
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return 0;
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}
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#endif
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