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arm64: dts: imx8mq: move watchdog nodes to correct location 

The were added at the end of the AIPS1 address space, while they
are in fact in the middle.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Lucas Stach 2018-12-14 11:55:09 +01:00 committed by Shawn Guo
parent bfeffd1552
commit a2b91efd30
1 changed files with 24 additions and 24 deletions
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48
arch/arm64/boot/dts/freescale/imx8mq.dtsi
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@ -199,6 +199,30 @@ gpio5: gpio@30240000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
wdog1: watchdog@30280000 {
compatible = "fsl,imx8mq-wdt", "fsl,imx21-wdt";
reg = <0x30280000 0x10000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_WDOG1_ROOT>;
status = "disabled";
};
wdog2: watchdog@30290000 {
compatible = "fsl,imx8mq-wdt", "fsl,imx21-wdt";
reg = <0x30290000 0x10000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_WDOG2_ROOT>;
status = "disabled";
};
wdog3: watchdog@302a0000 {
compatible = "fsl,imx8mq-wdt", "fsl,imx21-wdt";
reg = <0x302a0000 0x10000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
status = "disabled";
};
iomuxc: iomuxc@30330000 { iomuxc: iomuxc@30330000 {
compatible = "fsl,imx8mq-iomuxc"; compatible = "fsl,imx8mq-iomuxc";
reg = <0x30330000 0x10000>; reg = <0x30330000 0x10000>;
@ -228,30 +252,6 @@ clk: clock-controller@30380000 {
"clk_ext1", "clk_ext2", "clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4"; "clk_ext3", "clk_ext4";
}; };
wdog1: watchdog@30280000 {
compatible = "fsl,imx8mq-wdt", "fsl,imx21-wdt";
reg = <0x30280000 0x10000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_WDOG1_ROOT>;
status = "disabled";
};
wdog2: watchdog@30290000 {
compatible = "fsl,imx8mq-wdt", "fsl,imx21-wdt";
reg = <0x30290000 0x10000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_WDOG2_ROOT>;
status = "disabled";
};
wdog3: watchdog@302a0000 {
compatible = "fsl,imx8mq-wdt", "fsl,imx21-wdt";
reg = <0x302a0000 0x10000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
status = "disabled";
};
}; };
bus@30400000 { /* AIPS2 */ bus@30400000 { /* AIPS2 */