clk: xilinx: move xlnx_vcu clock driver from soc

The xlnx_vcu driver is actually a clock controller driver which provides
clocks that can be used by a driver for the encoder/decoder units. There
is no reason to keep this driver in soc. Move the driver to clk.

NOTE: The register mapping actually contains registers for AXI
performance monitoring, but these are not used by the driver.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-16-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Michael Tretter 2021-01-21 08:16:59 +01:00 committed by Stephen Boyd
parent cd0cefa9c9
commit a2fe7baa27
7 changed files with 23 additions and 18 deletions

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@ -393,6 +393,7 @@ source "drivers/clk/tegra/Kconfig"
source "drivers/clk/ti/Kconfig"
source "drivers/clk/uniphier/Kconfig"
source "drivers/clk/x86/Kconfig"
source "drivers/clk/xilinx/Kconfig"
source "drivers/clk/zynqmp/Kconfig"
endif

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@ -122,6 +122,7 @@ obj-y += versatile/
ifeq ($(CONFIG_COMMON_CLK), y)
obj-$(CONFIG_X86) += x86/
endif
obj-y += xilinx/
obj-$(CONFIG_ARCH_ZX) += zte/
obj-$(CONFIG_ARCH_ZYNQ) += zynq/
obj-$(CONFIG_COMMON_CLK_ZYNQMP) += zynqmp/

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@ -0,0 +1,19 @@
# SPDX-License-Identifier: GPL-2.0
config XILINX_VCU
tristate "Xilinx VCU logicoreIP Init"
depends on HAS_IOMEM && COMMON_CLK
select REGMAP_MMIO
help
Provides the driver to enable and disable the isolation between the
processing system and programmable logic part by using the logicoreIP
register set. This driver also configures the frequency based on the
clock information from the logicoreIP register set.
If you say yes here you get support for the logicoreIP.
If unsure, say N.
To compile this driver as a module, choose M here: the
module will be called xlnx_vcu.

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@ -0,0 +1,2 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_XILINX_VCU) += xlnx_vcu.o

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@ -1,23 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
menu "Xilinx SoC drivers"
config XILINX_VCU
tristate "Xilinx VCU logicoreIP Init"
depends on HAS_IOMEM && COMMON_CLK
select REGMAP_MMIO
help
Provides the driver to enable and disable the isolation between the
processing system and programmable logic part by using the logicoreIP
register set. This driver also configures the frequency based on the
clock information from the logicoreIP register set.
If you say yes here you get support for the logicoreIP.
If unsure, say N.
To compile this driver as a module, choose M here: the
module will be called xlnx_vcu.
config ZYNQMP_POWER
bool "Enable Xilinx Zynq MPSoC Power Management driver"
depends on PM && ZYNQMP_FIRMWARE

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@ -1,4 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_XILINX_VCU) += xlnx_vcu.o
obj-$(CONFIG_ZYNQMP_POWER) += zynqmp_power.o
obj-$(CONFIG_ZYNQMP_PM_DOMAINS) += zynqmp_pm_domains.o