mirror of https://gitee.com/openkylin/linux.git
ixgbe: make silicon specific functions generic
The new MAC type X540 shares much of the same functionality of some silicon specific functions. To reduce duplicate code, made these functions generic. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -38,9 +38,6 @@
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#define IXGBE_82598_MC_TBL_SIZE 128
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#define IXGBE_82598_VFT_TBL_SIZE 128
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static s32 ixgbe_get_copper_link_capabilities_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *autoneg);
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static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed speed,
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bool autoneg,
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@ -156,7 +153,7 @@ static s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw)
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if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {
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mac->ops.setup_link = &ixgbe_setup_copper_link_82598;
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mac->ops.get_link_capabilities =
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&ixgbe_get_copper_link_capabilities_82598;
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&ixgbe_get_copper_link_capabilities_generic;
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}
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switch (hw->phy.type) {
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@ -273,37 +270,6 @@ static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
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return status;
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}
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/**
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* ixgbe_get_copper_link_capabilities_82598 - Determines link capabilities
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @autoneg: boolean auto-negotiation value
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*
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* Determines the link capabilities by reading the AUTOC register.
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**/
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static s32 ixgbe_get_copper_link_capabilities_82598(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *autoneg)
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{
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s32 status = IXGBE_ERR_LINK_SETUP;
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u16 speed_ability;
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*speed = 0;
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*autoneg = true;
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status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD,
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&speed_ability);
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if (status == 0) {
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if (speed_ability & MDIO_SPEED_10G)
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*speed |= IXGBE_LINK_SPEED_10GB_FULL;
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if (speed_ability & MDIO_PMA_SPEED_1000)
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*speed |= IXGBE_LINK_SPEED_1GB_FULL;
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}
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return status;
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}
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/**
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* ixgbe_get_media_type_82598 - Determines media type
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* @hw: pointer to hardware structure
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@ -1225,6 +1191,7 @@ static struct ixgbe_mac_operations mac_ops_82598 = {
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static struct ixgbe_eeprom_operations eeprom_ops_82598 = {
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.init_params = &ixgbe_init_eeprom_params_generic,
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.read = &ixgbe_read_eerd_generic,
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.calc_checksum = &ixgbe_calc_eeprom_checksum_generic,
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.validate_checksum = &ixgbe_validate_eeprom_checksum_generic,
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.update_checksum = &ixgbe_update_eeprom_checksum_generic,
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};
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@ -56,9 +56,6 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
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ixgbe_link_speed speed,
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bool autoneg,
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bool autoneg_wait_to_complete);
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static s32 ixgbe_get_copper_link_capabilities_82599(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *autoneg);
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static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw,
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ixgbe_link_speed speed,
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bool autoneg,
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@ -174,7 +171,7 @@ static s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw)
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if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {
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mac->ops.setup_link = &ixgbe_setup_copper_link_82599;
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mac->ops.get_link_capabilities =
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&ixgbe_get_copper_link_capabilities_82599;
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&ixgbe_get_copper_link_capabilities_generic;
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}
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/* Set necessary function pointers based on phy type */
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@ -289,37 +286,6 @@ static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
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return status;
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}
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/**
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* ixgbe_get_copper_link_capabilities_82599 - Determines link capabilities
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @autoneg: boolean auto-negotiation value
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*
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* Determines the link capabilities by reading the AUTOC register.
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**/
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static s32 ixgbe_get_copper_link_capabilities_82599(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *autoneg)
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{
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s32 status = IXGBE_ERR_LINK_SETUP;
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u16 speed_ability;
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*speed = 0;
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*autoneg = true;
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status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD,
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&speed_ability);
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if (status == 0) {
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if (speed_ability & MDIO_SPEED_10G)
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*speed |= IXGBE_LINK_SPEED_10GB_FULL;
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if (speed_ability & MDIO_PMA_SPEED_1000)
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*speed |= IXGBE_LINK_SPEED_1GB_FULL;
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}
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return status;
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}
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/**
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* ixgbe_get_media_type_82599 - Get media type
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* @hw: pointer to hardware structure
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@ -2125,51 +2091,6 @@ static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw)
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return status;
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}
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/**
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* ixgbe_get_wwn_prefix_82599 - Get alternative WWNN/WWPN prefix from
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* the EEPROM
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* @hw: pointer to hardware structure
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* @wwnn_prefix: the alternative WWNN prefix
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* @wwpn_prefix: the alternative WWPN prefix
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*
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* This function will read the EEPROM from the alternative SAN MAC address
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* block to check the support for the alternative WWNN/WWPN prefix support.
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**/
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static s32 ixgbe_get_wwn_prefix_82599(struct ixgbe_hw *hw, u16 *wwnn_prefix,
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u16 *wwpn_prefix)
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{
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u16 offset, caps;
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u16 alt_san_mac_blk_offset;
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/* clear output first */
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*wwnn_prefix = 0xFFFF;
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*wwpn_prefix = 0xFFFF;
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/* check if alternative SAN MAC is supported */
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hw->eeprom.ops.read(hw, IXGBE_ALT_SAN_MAC_ADDR_BLK_PTR,
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&alt_san_mac_blk_offset);
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if ((alt_san_mac_blk_offset == 0) ||
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(alt_san_mac_blk_offset == 0xFFFF))
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goto wwn_prefix_out;
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/* check capability in alternative san mac address block */
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offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_CAPS_OFFSET;
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hw->eeprom.ops.read(hw, offset, &caps);
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if (!(caps & IXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN))
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goto wwn_prefix_out;
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/* get the corresponding prefix for WWNN/WWPN */
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offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_WWNN_OFFSET;
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hw->eeprom.ops.read(hw, offset, wwnn_prefix);
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offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_WWPN_OFFSET;
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hw->eeprom.ops.read(hw, offset, wwpn_prefix);
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wwn_prefix_out:
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return 0;
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}
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static struct ixgbe_mac_operations mac_ops_82599 = {
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.init_hw = &ixgbe_init_hw_generic,
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.reset_hw = &ixgbe_reset_hw_82599,
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@ -2181,7 +2102,7 @@ static struct ixgbe_mac_operations mac_ops_82599 = {
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.get_mac_addr = &ixgbe_get_mac_addr_generic,
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.get_san_mac_addr = &ixgbe_get_san_mac_addr_generic,
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.get_device_caps = &ixgbe_get_device_caps_82599,
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.get_wwn_prefix = &ixgbe_get_wwn_prefix_82599,
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.get_wwn_prefix = &ixgbe_get_wwn_prefix_generic,
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.stop_adapter = &ixgbe_stop_adapter_generic,
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.get_bus_info = &ixgbe_get_bus_info_generic,
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.set_lan_id = &ixgbe_set_lan_id_multi_port_pcie,
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@ -2214,6 +2135,7 @@ static struct ixgbe_eeprom_operations eeprom_ops_82599 = {
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.init_params = &ixgbe_init_eeprom_params_generic,
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.read = &ixgbe_read_eerd_generic,
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.write = &ixgbe_write_eeprom_generic,
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.calc_checksum = &ixgbe_calc_eeprom_checksum_generic,
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.validate_checksum = &ixgbe_validate_eeprom_checksum_generic,
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.update_checksum = &ixgbe_update_eeprom_checksum_generic,
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};
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@ -2240,5 +2162,5 @@ struct ixgbe_info ixgbe_82599_info = {
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.mac_ops = &mac_ops_82599,
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.eeprom_ops = &eeprom_ops_82599,
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.phy_ops = &phy_ops_82599,
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.mbx_ops = &mbx_ops_82599,
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.mbx_ops = &mbx_ops_generic,
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};
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@ -45,14 +45,12 @@ static u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count);
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static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
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static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
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static void ixgbe_release_eeprom(struct ixgbe_hw *hw);
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static u16 ixgbe_calc_eeprom_checksum(struct ixgbe_hw *hw);
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static void ixgbe_enable_rar(struct ixgbe_hw *hw, u32 index);
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static void ixgbe_disable_rar(struct ixgbe_hw *hw, u32 index);
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static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr);
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static void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
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static s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num);
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static s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);
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/**
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* ixgbe_start_hw_generic - Prepare hardware for Tx/Rx
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@ -638,7 +636,7 @@ s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data)
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* Polls the status bit (bit 1) of the EERD or EEWR to determine when the
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* read or write is done respectively.
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**/
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static s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg)
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s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg)
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{
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u32 i;
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u32 reg;
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@ -1009,7 +1007,7 @@ static void ixgbe_release_eeprom(struct ixgbe_hw *hw)
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* ixgbe_calc_eeprom_checksum - Calculates and returns the checksum
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* @hw: pointer to hardware structure
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**/
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static u16 ixgbe_calc_eeprom_checksum(struct ixgbe_hw *hw)
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u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw)
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{
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u16 i;
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u16 j;
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@ -1072,7 +1070,7 @@ s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
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status = hw->eeprom.ops.read(hw, 0, &checksum);
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if (status == 0) {
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checksum = ixgbe_calc_eeprom_checksum(hw);
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checksum = hw->eeprom.ops.calc_checksum(hw);
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hw->eeprom.ops.read(hw, IXGBE_EEPROM_CHECKSUM, &read_checksum);
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@ -1110,7 +1108,7 @@ s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw)
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status = hw->eeprom.ops.read(hw, 0, &checksum);
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if (status == 0) {
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checksum = ixgbe_calc_eeprom_checksum(hw);
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checksum = hw->eeprom.ops.calc_checksum(hw);
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status = hw->eeprom.ops.write(hw, IXGBE_EEPROM_CHECKSUM,
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checksum);
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} else {
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@ -2686,3 +2684,48 @@ s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
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return 0;
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}
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/**
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* ixgbe_get_wwn_prefix_generic Get alternative WWNN/WWPN prefix from
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* the EEPROM
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* @hw: pointer to hardware structure
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* @wwnn_prefix: the alternative WWNN prefix
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* @wwpn_prefix: the alternative WWPN prefix
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*
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* This function will read the EEPROM from the alternative SAN MAC address
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* block to check the support for the alternative WWNN/WWPN prefix support.
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**/
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s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
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u16 *wwpn_prefix)
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{
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u16 offset, caps;
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u16 alt_san_mac_blk_offset;
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/* clear output first */
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*wwnn_prefix = 0xFFFF;
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*wwpn_prefix = 0xFFFF;
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/* check if alternative SAN MAC is supported */
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hw->eeprom.ops.read(hw, IXGBE_ALT_SAN_MAC_ADDR_BLK_PTR,
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&alt_san_mac_blk_offset);
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if ((alt_san_mac_blk_offset == 0) ||
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(alt_san_mac_blk_offset == 0xFFFF))
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goto wwn_prefix_out;
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/* check capability in alternative san mac address block */
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offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_CAPS_OFFSET;
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hw->eeprom.ops.read(hw, offset, &caps);
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if (!(caps & IXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN))
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goto wwn_prefix_out;
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/* get the corresponding prefix for WWNN/WWPN */
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offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_WWNN_OFFSET;
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hw->eeprom.ops.read(hw, offset, wwnn_prefix);
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offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_WWPN_OFFSET;
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hw->eeprom.ops.read(hw, offset, wwpn_prefix);
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wwn_prefix_out:
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return 0;
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}
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@ -49,9 +49,11 @@ s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
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s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
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s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
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u16 *data);
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u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
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s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
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u16 *checksum_val);
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s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
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s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);
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s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
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u32 enable_addr);
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@ -81,7 +83,8 @@ s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
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s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *link_up, bool link_up_wait_to_complete);
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s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
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u16 *wwpn_prefix);
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s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
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s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
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@ -454,7 +454,7 @@ void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
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mbx->stats.rsts = 0;
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}
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struct ixgbe_mbx_operations mbx_ops_82599 = {
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struct ixgbe_mbx_operations mbx_ops_generic = {
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.read = ixgbe_read_mbx_pf,
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.write = ixgbe_write_mbx_pf,
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.read_posted = ixgbe_read_posted_mbx,
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@ -88,6 +88,6 @@ s32 ixgbe_check_for_ack(struct ixgbe_hw *, u16);
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s32 ixgbe_check_for_rst(struct ixgbe_hw *, u16);
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void ixgbe_init_mbx_params_pf(struct ixgbe_hw *);
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extern struct ixgbe_mbx_operations mbx_ops_82599;
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extern struct ixgbe_mbx_operations mbx_ops_generic;
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#endif /* _IXGBE_MBX_H_ */
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@ -424,6 +424,39 @@ s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
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return 0;
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}
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/**
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* ixgbe_get_copper_link_capabilities_generic - Determines link capabilities
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @autoneg: boolean auto-negotiation value
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*
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* Determines the link capabilities by reading the AUTOC register.
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*/
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s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *autoneg)
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{
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s32 status = IXGBE_ERR_LINK_SETUP;
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u16 speed_ability;
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*speed = 0;
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*autoneg = true;
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status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD,
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&speed_ability);
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if (status == 0) {
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if (speed_ability & MDIO_SPEED_10G)
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*speed |= IXGBE_LINK_SPEED_10GB_FULL;
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||||
if (speed_ability & MDIO_PMA_SPEED_1000)
|
||||
*speed |= IXGBE_LINK_SPEED_1GB_FULL;
|
||||
if (speed_ability & MDIO_PMA_SPEED_100)
|
||||
*speed |= IXGBE_LINK_SPEED_100_FULL;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* ixgbe_reset_phy_nl - Performs a PHY reset
|
||||
* @hw: pointer to hardware structure
|
||||
|
|
|
@ -96,6 +96,9 @@ s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
|
|||
ixgbe_link_speed speed,
|
||||
bool autoneg,
|
||||
bool autoneg_wait_to_complete);
|
||||
s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
|
||||
ixgbe_link_speed *speed,
|
||||
bool *autoneg);
|
||||
|
||||
/* PHY specific */
|
||||
s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,
|
||||
|
|
|
@ -2414,6 +2414,7 @@ struct ixgbe_eeprom_operations {
|
|||
s32 (*write)(struct ixgbe_hw *, u16, u16);
|
||||
s32 (*validate_checksum)(struct ixgbe_hw *, u16 *);
|
||||
s32 (*update_checksum)(struct ixgbe_hw *);
|
||||
u16 (*calc_checksum)(struct ixgbe_hw *);
|
||||
};
|
||||
|
||||
struct ixgbe_mac_operations {
|
||||
|
|
Loading…
Reference in New Issue