ARM: dts: kirkwood-rd88f6281: Utilize new DSA binding

Utilize the new DSA binding, introduced with commit 8c5ad1d617 ("net: dsa:
Document new binding"). The legacy binding node is kept included, but is marked
disabled.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit is contained in:
Florian Fainelli 2017-01-17 10:22:24 -08:00 committed by Gregory CLEMENT
parent cd0cc11acb
commit a3fe1d5dce
3 changed files with 59 additions and 5 deletions

View File

@ -19,11 +19,6 @@ / {
model = "Marvell RD88f6281 Reference design, with A0 or higher SoC"; model = "Marvell RD88f6281 Reference design, with A0 or higher SoC";
compatible = "marvell,rd88f6281-a", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood"; compatible = "marvell,rd88f6281-a", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood";
dsa {
switch@0 {
reg = <10 0>; /* MDIO address 10, switch 0 in tree */
};
};
}; };
&mdio { &mdio {
@ -34,6 +29,10 @@ ethphy1: ethernet-phy@11 {
}; };
}; };
&switch {
reg = <10>;
};
&eth1 { &eth1 {
status = "okay"; status = "okay";

View File

@ -33,3 +33,14 @@ port@4 {
&eth1 { &eth1 {
status = "disabled"; status = "disabled";
}; };
&switch {
reg = <0>;
ports {
port@4 {
reg = <4>;
label = "wan";
};
};
};

View File

@ -54,6 +54,8 @@ mvsdio@90000 {
}; };
dsa { dsa {
status = "disabled";
compatible = "marvell,dsa"; compatible = "marvell,dsa";
#address-cells = <2>; #address-cells = <2>;
#size-cells = <0>; #size-cells = <0>;
@ -115,6 +117,48 @@ partition@300000 {
&mdio { &mdio {
status = "okay"; status = "okay";
switch: switch@0 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&eth0port>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
}; };
&eth0 { &eth0 {