mirror of https://gitee.com/openkylin/linux.git
drm/tegra: dc: Rename supports_blending to has_legacy_blending
Older Tegra chips do support blending as well. Rename the SoC info entry .supports_blending to .has_legacy_blending to eliminate the confusion. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -508,10 +508,10 @@ static void tegra_dc_setup_window(struct tegra_plane *plane,
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tegra_plane_writel(plane, value, DC_WIN_WIN_OPTIONS);
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if (dc->soc->supports_blending)
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tegra_plane_setup_blending(plane, window);
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else
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if (dc->soc->has_legacy_blending)
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tegra_plane_setup_blending_legacy(plane);
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else
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tegra_plane_setup_blending(plane, window);
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}
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static const u32 tegra20_primary_formats[] = {
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@ -617,7 +617,7 @@ static int tegra_plane_atomic_check(struct drm_plane *plane,
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* the corresponding opaque formats. However, the opaque formats can
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* be emulated by disabling alpha blending for the plane.
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*/
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if (!dc->soc->supports_blending) {
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if (dc->soc->has_legacy_blending) {
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err = tegra_plane_setup_legacy_state(tegra, plane_state);
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if (err < 0)
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return err;
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@ -2072,7 +2072,7 @@ static const struct tegra_dc_soc_info tegra20_dc_soc_info = {
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.supports_interlacing = false,
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.supports_cursor = false,
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.supports_block_linear = false,
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.supports_blending = false,
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.has_legacy_blending = true,
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.pitch_align = 8,
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.has_powergate = false,
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.coupled_pm = true,
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@ -2091,7 +2091,7 @@ static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
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.supports_interlacing = false,
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.supports_cursor = false,
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.supports_block_linear = false,
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.supports_blending = false,
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.has_legacy_blending = true,
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.pitch_align = 8,
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.has_powergate = false,
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.coupled_pm = false,
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@ -2110,7 +2110,7 @@ static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
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.supports_interlacing = false,
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.supports_cursor = false,
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.supports_block_linear = false,
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.supports_blending = false,
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.has_legacy_blending = true,
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.pitch_align = 64,
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.has_powergate = true,
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.coupled_pm = false,
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@ -2129,7 +2129,7 @@ static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
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.supports_interlacing = true,
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.supports_cursor = true,
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.supports_block_linear = true,
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.supports_blending = true,
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.has_legacy_blending = false,
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.pitch_align = 64,
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.has_powergate = true,
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.coupled_pm = false,
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@ -2148,7 +2148,7 @@ static const struct tegra_dc_soc_info tegra210_dc_soc_info = {
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.supports_interlacing = true,
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.supports_cursor = true,
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.supports_block_linear = true,
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.supports_blending = true,
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.has_legacy_blending = false,
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.pitch_align = 64,
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.has_powergate = true,
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.coupled_pm = false,
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@ -2201,7 +2201,7 @@ static const struct tegra_dc_soc_info tegra186_dc_soc_info = {
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.supports_interlacing = true,
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.supports_cursor = true,
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.supports_block_linear = true,
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.supports_blending = true,
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.has_legacy_blending = false,
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.pitch_align = 64,
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.has_powergate = false,
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.coupled_pm = false,
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@ -55,7 +55,7 @@ struct tegra_dc_soc_info {
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bool supports_interlacing;
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bool supports_cursor;
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bool supports_block_linear;
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bool supports_blending;
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bool has_legacy_blending;
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unsigned int pitch_align;
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bool has_powergate;
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bool coupled_pm;
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