mirror of https://gitee.com/openkylin/linux.git
Merge branch 'ras-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull ras fixes from Thomas Gleixner: "A set of fixes for RAS/MCE: - Improve the error message when the kernel cannot recover from a MCE so the maximum amount of information gets provided. - Individually check MCE recovery features on SkyLake CPUs instead of assuming none when the CAPID0 register does not advertise the general ability for recovery. - Prevent MCE to output inconsistent messages which first show an error location and then claim that the source is unknown. - Prevent overwriting MCi_STATUS in the attempt to gather more information when a fatal MCE has alreay been detected. This leads to empty status values in the printout and failing to react promptly on the fatal event" * 'ras-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mce: Fix incorrect "Machine check from unknown source" message x86/mce: Do not overwrite MCi_STATUS in mce_no_way_out() x86/mce: Check for alternate indication of machine check recovery on Skylake x86/mce: Improve error message when kernel cannot recover
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commit
a43de48993
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@ -160,6 +160,11 @@ static struct severity {
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),
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USER
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),
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MCESEV(
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PANIC, "Data load in unrecoverable area of kernel",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
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KERNEL
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),
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#endif
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MCESEV(
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PANIC, "Action required: unknown MCACOD",
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@ -772,23 +772,25 @@ EXPORT_SYMBOL_GPL(machine_check_poll);
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static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
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struct pt_regs *regs)
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{
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int i, ret = 0;
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char *tmp;
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int i;
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for (i = 0; i < mca_cfg.banks; i++) {
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m->status = mce_rdmsrl(msr_ops.status(i));
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if (m->status & MCI_STATUS_VAL) {
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__set_bit(i, validp);
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if (quirk_no_way_out)
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quirk_no_way_out(i, m, regs);
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}
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if (!(m->status & MCI_STATUS_VAL))
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continue;
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__set_bit(i, validp);
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if (quirk_no_way_out)
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quirk_no_way_out(i, m, regs);
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if (mce_severity(m, mca_cfg.tolerant, &tmp, true) >= MCE_PANIC_SEVERITY) {
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mce_read_aux(m, i);
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*msg = tmp;
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ret = 1;
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return 1;
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}
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}
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return ret;
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return 0;
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}
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/*
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@ -1205,13 +1207,18 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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lmce = m.mcgstatus & MCG_STATUS_LMCES;
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/*
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* Local machine check may already know that we have to panic.
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* Broadcast machine check begins rendezvous in mce_start()
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* Go through all banks in exclusion of the other CPUs. This way we
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* don't report duplicated events on shared banks because the first one
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* to see it will clear it. If this is a Local MCE, then no need to
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* perform rendezvous.
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* to see it will clear it.
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*/
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if (!lmce)
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if (lmce) {
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if (no_way_out)
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mce_panic("Fatal local machine check", &m, msg);
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} else {
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order = mce_start(&no_way_out);
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}
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for (i = 0; i < cfg->banks; i++) {
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__clear_bit(i, toclear);
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@ -1287,12 +1294,17 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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no_way_out = worst >= MCE_PANIC_SEVERITY;
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} else {
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/*
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* Local MCE skipped calling mce_reign()
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* If we found a fatal error, we need to panic here.
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* If there was a fatal machine check we should have
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* already called mce_panic earlier in this function.
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* Since we re-read the banks, we might have found
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* something new. Check again to see if we found a
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* fatal error. We call "mce_severity()" again to
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* make sure we have the right "msg".
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*/
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if (worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3)
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mce_panic("Machine check from unknown source",
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NULL, NULL);
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if (worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3) {
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mce_severity(&m, cfg->tolerant, &msg, true);
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mce_panic("Local fatal machine check!", &m, msg);
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}
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}
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/*
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@ -645,12 +645,19 @@ static void quirk_intel_brickland_xeon_ras_cap(struct pci_dev *pdev)
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/* Skylake */
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static void quirk_intel_purley_xeon_ras_cap(struct pci_dev *pdev)
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{
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u32 capid0;
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u32 capid0, capid5;
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pci_read_config_dword(pdev, 0x84, &capid0);
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pci_read_config_dword(pdev, 0x98, &capid5);
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if ((capid0 & 0xc0) == 0xc0)
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/*
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* CAPID0{7:6} indicate whether this is an advanced RAS SKU
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* CAPID5{8:5} indicate that various NVDIMM usage modes are
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* enabled, so memory machine check recovery is also enabled.
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*/
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if ((capid0 & 0xc0) == 0xc0 || (capid5 & 0x1e0))
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static_branch_inc(&mcsafe_key);
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}
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x0ec3, quirk_intel_brickland_xeon_ras_cap);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2fc0, quirk_intel_brickland_xeon_ras_cap);
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