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drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT 

An identical patch has been merged for i9xx_crtc_mode_set:

Commit 59df7b1771
Author: Christian Schmidt <schmidt@digadd.de>
Date:   Mon Dec 19 20:03:33 2011 +0100

    drm/intel: Fix initialization if startup happens in interlaced mode [v2]

But that one neglected to fix up the ironlake+ path.

This should fix the issue reported by Alfonso Fiore where booting with
only a HDMI cable connected to his TV failed to display anything. The
issue is that the bios set up things for 1080i and used the pannel
fitter to scale up the lower progressive resolutions. We failed to
clear the interlace bit in the PIPEACONF register, resulting in havoc.

Cc: Peter Ross <pross@xvid.org>
Tested-by: Alfonso Fiore <alfonso.fiore@gmail.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
This commit is contained in:
Daniel Vetter 2012-01-26 17:18:47 +01:00 committed by Keith Packard
parent d56d8b28e9
commit a4ea430853
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/intel_display.c
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@ -5912,7 +5912,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
adjusted_mode->crtc_vsync_end -= 1; adjusted_mode->crtc_vsync_end -= 1;
adjusted_mode->crtc_vsync_start -= 1; adjusted_mode->crtc_vsync_start -= 1;
} else } else
pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */ pipeconf &= ~PIPECONF_INTERLACE_MASK; /* progressive */
I915_WRITE(HTOTAL(pipe), I915_WRITE(HTOTAL(pipe),
(adjusted_mode->crtc_hdisplay - 1) | (adjusted_mode->crtc_hdisplay - 1) |