mirror of https://gitee.com/openkylin/linux.git
IB/hfi1: Move saving PCI values to a separate function
During PCIe initialization some registers' values from PCI config space are saved in order to restore them later (i.e. after reset). Restoring those value is done by a function called restore_pci_variables, while saving them is put directly into function hfi1_pcie_ddinit. Move saving values to a separate function in the image of restoring functionality. Reviewed-by: Jakub Byczkowski <jakub.byczkowski@intel.com> Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Bartlomiej Dudek <bartlomiej.dudek@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -14866,6 +14866,11 @@ struct hfi1_devdata *hfi1_init_dd(struct pci_dev *pdev,
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if (ret < 0)
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goto bail_free;
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/* Save PCI space registers to rewrite after device reset */
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ret = save_pci_variables(dd);
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if (ret < 0)
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goto bail_cleanup;
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/* verify that reads actually work, save revision for reset check */
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dd->revision = read_csr(dd, CCE_REVISION);
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if (dd->revision == ~(u64)0) {
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@ -1835,6 +1835,7 @@ void hfi1_pcie_ddcleanup(struct hfi1_devdata *);
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int pcie_speeds(struct hfi1_devdata *dd);
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int request_msix(struct hfi1_devdata *dd, u32 msireq);
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int restore_pci_variables(struct hfi1_devdata *dd);
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int save_pci_variables(struct hfi1_devdata *dd);
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int do_pcie_gen3_transition(struct hfi1_devdata *dd);
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int parse_platform_config(struct hfi1_devdata *dd);
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int get_platform_config_field(struct hfi1_devdata *dd,
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@ -221,63 +221,11 @@ int hfi1_pcie_ddinit(struct hfi1_devdata *dd, struct pci_dev *pdev)
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}
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dd_dev_info(dd, "WC RcvArray: %p for %x\n",
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dd->rcvarray_wc, dd->chip_rcv_array_count * 8);
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/*
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* Save BARs and command to rewrite after device reset.
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*/
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ret = pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0, &dd->pcibar0);
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if (ret)
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goto read_error;
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ret = pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1, &dd->pcibar1);
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if (ret)
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goto read_error;
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ret = pci_read_config_dword(dd->pcidev, PCI_ROM_ADDRESS, &dd->pci_rom);
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if (ret)
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goto read_error;
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ret = pci_read_config_word(dd->pcidev, PCI_COMMAND, &dd->pci_command);
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if (ret)
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goto read_error;
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ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL,
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&dd->pcie_devctl);
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if (ret)
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goto read_error;
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ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKCTL,
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&dd->pcie_lnkctl);
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if (ret)
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goto read_error;
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ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL2,
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&dd->pcie_devctl2);
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if (ret)
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goto read_error;
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ret = pci_read_config_dword(dd->pcidev, PCI_CFG_MSIX0, &dd->pci_msix0);
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if (ret)
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goto read_error;
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ret = pci_read_config_dword(dd->pcidev, PCIE_CFG_SPCIE1,
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&dd->pci_lnkctl3);
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if (ret)
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goto read_error;
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ret = pci_read_config_dword(dd->pcidev, PCIE_CFG_TPH2, &dd->pci_tph2);
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if (ret)
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goto read_error;
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dd->flags |= HFI1_PRESENT; /* chip.c CSR routines now work */
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return 0;
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read_error:
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dd_dev_err(dd, "Unable to read from PCI config\n");
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goto bail_error;
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nomem:
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ret = -ENOMEM;
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bail_error:
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hfi1_pcie_ddcleanup(dd);
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return ret;
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}
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@ -484,6 +432,64 @@ int restore_pci_variables(struct hfi1_devdata *dd)
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return ret;
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}
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/* Save BARs and command to rewrite after device reset */
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int save_pci_variables(struct hfi1_devdata *dd)
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{
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int ret = 0;
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ret = pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0,
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&dd->pcibar0);
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if (ret)
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goto error;
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ret = pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1,
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&dd->pcibar1);
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if (ret)
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goto error;
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ret = pci_read_config_dword(dd->pcidev, PCI_ROM_ADDRESS, &dd->pci_rom);
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if (ret)
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goto error;
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ret = pci_read_config_word(dd->pcidev, PCI_COMMAND, &dd->pci_command);
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if (ret)
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goto error;
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ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL,
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&dd->pcie_devctl);
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if (ret)
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goto error;
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ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKCTL,
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&dd->pcie_lnkctl);
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if (ret)
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goto error;
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ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL2,
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&dd->pcie_devctl2);
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if (ret)
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goto error;
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ret = pci_read_config_dword(dd->pcidev, PCI_CFG_MSIX0, &dd->pci_msix0);
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if (ret)
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goto error;
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ret = pci_read_config_dword(dd->pcidev, PCIE_CFG_SPCIE1,
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&dd->pci_lnkctl3);
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if (ret)
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goto error;
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ret = pci_read_config_dword(dd->pcidev, PCIE_CFG_TPH2, &dd->pci_tph2);
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if (ret)
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goto error;
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return 0;
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error:
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dd_dev_err(dd, "Unable to read from PCI config\n");
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return ret;
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}
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/*
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* BIOS may not set PCIe bus-utilization parameters for best performance.
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* Check and optionally adjust them to maximize our throughput.
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