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clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock
This was broken before, because the AHB1 bus was enabled before the VPU clock was ungated, while it must be done afterwards. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -154,7 +154,7 @@ static const struct ingenic_cgu_clk_info jz4770_cgu_clocks[] = {
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"h1clk", CGU_CLK_DIV | CGU_CLK_GATE,
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.parents = { JZ4770_CLK_PLL0, },
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.div = { CGU_REG_CPCCR, 24, 1, 4, 22, -1, -1 },
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.gate = { CGU_REG_LCR, 30 },
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.gate = { CGU_REG_CLKGR1, 7 },
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},
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[JZ4770_CLK_H2CLK] = {
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"h2clk", CGU_CLK_DIV,
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@ -362,7 +362,7 @@ static const struct ingenic_cgu_clk_info jz4770_cgu_clocks[] = {
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[JZ4770_CLK_VPU] = {
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"vpu", CGU_CLK_GATE,
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.parents = { JZ4770_CLK_H1CLK, },
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.gate = { CGU_REG_CLKGR1, 7 },
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.gate = { CGU_REG_LCR, 30 },
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},
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[JZ4770_CLK_MMC0] = {
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"mmc0", CGU_CLK_GATE,
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