mirror of https://gitee.com/openkylin/linux.git
PCI: remove pcibios_scan_all_fns()
This was #define'd as 0 on all platforms, so let's get rid of it. This change makes pci_scan_slot() slightly easier to read. Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Tony Luck <tony.luck@intel.com> Cc: David Howells <dhowells@redhat.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jeff Dike <jdike@addtoit.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Acked-by: Russell King <linux@arm.linux.org.uk> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Kyle McMartin <kyle@mcmartin.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -52,7 +52,6 @@ struct pci_controller {
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bus numbers. */
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#define pcibios_assign_all_busses() 1
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#define pcibios_scan_all_fns(a, b) 0
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#define PCIBIOS_MIN_IO alpha_mv.min_io_address
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#define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
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@ -6,8 +6,6 @@
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#include <mach/hardware.h> /* for PCIBIOS_MIN_* */
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#define pcibios_scan_all_fns(a, b) 0
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#ifdef CONFIG_PCI_HOST_ITE8152
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/* ITE bridge requires setting latency timer to avoid early bus access
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termination by PIC bus mater devices
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@ -8,7 +8,6 @@
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*/
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#define pcibios_assign_all_busses() 0
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#define pcibios_scan_all_fns(a, b) 0
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static inline void pcibios_set_master(struct pci_dev *dev)
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{
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@ -17,7 +17,6 @@
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* loader.
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*/
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#define pcibios_assign_all_busses() 0
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#define pcibios_scan_all_fns(a, b) 0
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#define PCIBIOS_MIN_IO 0x1000
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#define PCIBIOS_MIN_MEM 0x10000000
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@ -135,7 +134,18 @@ extern void pcibios_resource_to_bus(struct pci_dev *dev,
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extern void pcibios_bus_to_resource(struct pci_dev *dev,
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struct resource *res, struct pci_bus_region *region);
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#define pcibios_scan_all_fns(a, b) 0
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static inline struct resource *
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pcibios_select_root(struct pci_dev *pdev, struct resource *res)
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{
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struct resource *root = NULL;
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if (res->flags & IORESOURCE_IO)
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root = &ioport_resource;
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if (res->flags & IORESOURCE_MEM)
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root = &iomem_resource;
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return root;
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}
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#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
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static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
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@ -65,8 +65,6 @@ extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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extern unsigned int pcibios_assign_all_busses(void);
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#define pcibios_scan_all_fns(a, b) 0
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extern unsigned long PCIBIOS_MIN_IO;
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extern unsigned long PCIBIOS_MIN_MEM;
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@ -101,7 +101,18 @@ extern void pcibios_bus_to_resource(struct pci_dev *dev,
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struct resource *res,
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struct pci_bus_region *region);
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#define pcibios_scan_all_fns(a, b) 0
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static inline struct resource *
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pcibios_select_root(struct pci_dev *pdev, struct resource *res)
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{
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struct resource *root = NULL;
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if (res->flags & IORESOURCE_IO)
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root = &ioport_resource;
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if (res->flags & IORESOURCE_MEM)
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root = &iomem_resource;
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return root;
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}
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static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
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{
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@ -233,7 +233,6 @@ static inline void pcibios_register_hba(struct pci_hba_data *x)
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* rp7420/8420 boxes and then revisit this issue.
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*/
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#define pcibios_assign_all_busses() (1)
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#define pcibios_scan_all_fns(a, b) (0)
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#define PCIBIOS_MIN_IO 0x10
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#define PCIBIOS_MIN_MEM 0x1000 /* NBPG - but pci/setup-res.c dies */
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@ -40,7 +40,6 @@ struct pci_dev;
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*/
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#define pcibios_assign_all_busses() \
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(ppc_pci_has_flag(PPC_PCI_REASSIGN_ALL_BUS))
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#define pcibios_scan_all_fns(a, b) 0
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static inline void pcibios_set_master(struct pci_dev *dev)
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{
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@ -10,7 +10,6 @@
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or architectures with incomplete PCI setup by the loader */
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#define pcibios_assign_all_busses() 1
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#define pcibios_scan_all_fns(a, b) 0
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/*
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* A board can define one or more PCI channels that represent built-in (or
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@ -10,7 +10,6 @@
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* or architectures with incomplete PCI setup by the loader.
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*/
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#define pcibios_assign_all_busses() 0
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#define pcibios_scan_all_fns(a, b) 0
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#define PCIBIOS_MIN_IO 0UL
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#define PCIBIOS_MIN_MEM 0UL
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@ -10,7 +10,6 @@
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* or architectures with incomplete PCI setup by the loader.
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*/
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#define pcibios_assign_all_busses() 0
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#define pcibios_scan_all_fns(a, b) 0
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#define PCIBIOS_MIN_IO 0UL
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#define PCIBIOS_MIN_MEM 0UL
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@ -2,6 +2,5 @@
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#define __UM_PCI_H
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#define PCI_DMA_BUS_IS_PHYS (1)
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#define pcibios_scan_all_fns(a, b) 0
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#endif
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@ -48,7 +48,6 @@ extern unsigned int pcibios_assign_all_busses(void);
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#else
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#define pcibios_assign_all_busses() 0
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#endif
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#define pcibios_scan_all_fns(a, b) 0
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extern unsigned long pci_mem_start;
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#define PCIBIOS_MIN_IO 0x1000
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@ -1061,8 +1061,7 @@ int pci_scan_slot(struct pci_bus *bus, int devfn)
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if (dev && !dev->is_added) /* new device? */
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nr++;
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if ((dev && dev->multifunction) ||
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(!dev && pcibios_scan_all_fns(bus, devfn))) {
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if (dev && dev->multifunction) {
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for (fn = 1; fn < 8; fn++) {
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dev = pci_scan_single_device(bus, devfn + fn);
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if (dev) {
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@ -30,7 +30,18 @@ pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
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res->end = region->end;
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}
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#define pcibios_scan_all_fns(a, b) 0
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static inline struct resource *
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pcibios_select_root(struct pci_dev *pdev, struct resource *res)
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{
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struct resource *root = NULL;
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if (res->flags & IORESOURCE_IO)
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root = &ioport_resource;
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if (res->flags & IORESOURCE_MEM)
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root = &iomem_resource;
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return root;
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}
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#ifndef HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
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static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
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