mirror of https://gitee.com/openkylin/linux.git
ALSA: hdac: Fix to read the correct offset of spcap/link register
SPCAP and Mutilink register offset were incorrect as offset needs to be based on capability offset. So correct the offset for read/write of spcap/link register. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -177,8 +177,8 @@ int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus)
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hlink->bus = bus;
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hlink->bus = bus;
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hlink->ml_addr = ebus->mlcap + AZX_ML_BASE +
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hlink->ml_addr = ebus->mlcap + AZX_ML_BASE +
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(AZX_ML_INTERVAL * idx);
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(AZX_ML_INTERVAL * idx);
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hlink->lcaps = snd_hdac_chip_readl(bus, ML_LCAP);
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hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
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hlink->lsdiid = snd_hdac_chip_readw(bus, ML_LSDIID);
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hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
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list_add_tail(&hlink->list, &ebus->hlink_list);
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list_add_tail(&hlink->list, &ebus->hlink_list);
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}
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}
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@ -243,7 +243,7 @@ static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
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timeout = 50;
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timeout = 50;
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do {
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do {
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val = snd_hdac_chip_readl(link->bus, ML_LCTL);
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val = readl(link->ml_addr + AZX_REG_ML_LCTL);
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if (enable) {
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if (enable) {
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if (((val & mask) >> AZX_MLCTL_CPA))
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if (((val & mask) >> AZX_MLCTL_CPA))
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return 0;
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return 0;
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@ -263,7 +263,7 @@ static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
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*/
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*/
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int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link)
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int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link)
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{
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{
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snd_hdac_chip_updatel(link->bus, ML_LCTL, 0, AZX_MLCTL_SPA);
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snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, 0, AZX_MLCTL_SPA);
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return check_hdac_link_power_active(link, true);
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return check_hdac_link_power_active(link, true);
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}
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}
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@ -275,7 +275,7 @@ EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
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*/
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*/
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int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
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int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
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{
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{
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snd_hdac_chip_updatel(link->bus, ML_LCTL, AZX_MLCTL_SPA, 0);
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snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, AZX_MLCTL_SPA, 0);
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return check_hdac_link_power_active(link, false);
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return check_hdac_link_power_active(link, false);
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}
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}
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@ -423,7 +423,7 @@ void snd_hdac_ext_stream_spbcap_enable(struct hdac_ext_bus *ebus,
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mask |= (1 << index);
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mask |= (1 << index);
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register_mask = snd_hdac_chip_readl(bus, SPB_SPBFCCTL);
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register_mask = readl(ebus->spbcap + AZX_REG_SPB_SPBFCCTL);
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mask |= register_mask;
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mask |= register_mask;
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