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igc: Fix code redundancy 

Remove redundant igc_check_for_link_base code and replace it with
an igc_check_for_copper_link method.
Fix duplication of IGC_ADVTXD_PAYLEN_SHIFT mask declaration.
Remove obsolete IGC_SCVPC register definition.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Sasha Neftin 2018-12-18 11:29:54 +02:00 committed by Jeff Kirsher
parent facd86390b
commit a8890c38ab
3 changed files with 2 additions and 22 deletions
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20
drivers/net/ethernet/intel/igc/igc_base.c
View File

@ -53,22 +53,6 @@ static s32 igc_set_pcie_completion_timeout(struct igc_hw *hw)
return ret_val;
}
/**
* igc_check_for_link_base - Check for link
* @hw: pointer to the HW structure
*
* If sgmii is enabled, then use the pcs register to determine link, otherwise
* use the generic interface for determining link.
*/
static s32 igc_check_for_link_base(struct igc_hw *hw)
{
s32 ret_val = 0;
ret_val = igc_check_for_copper_link(hw);
return ret_val;
}
/**
* igc_reset_hw_base - Reset hardware
* @hw: pointer to the HW structure
@ -265,7 +249,7 @@ static s32 igc_init_phy_params_base(struct igc_hw *hw)
if (ret_val)
return ret_val;
igc_check_for_link_base(hw);
igc_check_for_copper_link(hw);
/* Verify phy id and set remaining function pointers */
switch (phy->id) {
@ -512,7 +496,7 @@ void igc_rx_fifo_flush_base(struct igc_hw *hw)
static struct igc_mac_operations igc_mac_ops_base = {
.init_hw = igc_init_hw_base,
.check_for_link = igc_check_for_link_base,
.check_for_link = igc_check_for_copper_link,
.rar_set = igc_rar_set,
.read_mac_addr = igc_read_mac_addr_base,
.get_speed_and_duplex = igc_get_link_up_info_base,

3
drivers/net/ethernet/intel/igc/igc_base.h
View File

@ -90,9 +90,6 @@ union igc_adv_rx_desc {
} wb; /* writeback */
};
/* Adv Transmit Descriptor Config Masks */
#define IGC_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */
/* Additional Transmit Descriptor Control definitions */
#define IGC_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */

1
drivers/net/ethernet/intel/igc/igc_regs.h
View File

@ -188,7 +188,6 @@
#define IGC_HGOTCL 0x04130 /* Host Good Octets Transmit Count Low */
#define IGC_HGOTCH 0x04134 /* Host Good Octets Transmit Count High */
#define IGC_LENERRS 0x04138 /* Length Errors Count */
#define IGC_SCVPC 0x04228 /* SerDes/SGMII Code Violation Pkt Count */
#define IGC_HRMPC 0x0A018 /* Header Redirection Missed Packet Count */
/* Management registers */