mirror of https://gitee.com/openkylin/linux.git
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (53 commits) mmc: dw_mmc: support mmc power control with regulator mmc: dw_mmc: fix suspend/resume operation mmc: dw_mmc: add quirks for unreliable card detect, and capabilities mmc: tmio: fix address in kunmap_atomic() calls mmc: core: reset card voltage after power off mmc: core: export function mmc_do_release_host() mmc: sdio: remember new card RCA when redetecting card mmc: dw_mmc: Remove set-but-unused variable. mmc: sdhci-esdhc-imx: add card detect on custom GPIO for mx25/35 mmc: sdhci-esdhc: broken card detection is not a default quirk mmc: sdhci-esdhc-imx: add write protect on custom GPIO on mx25/35 mmc: msm_sdcc: remove needless cache flush after dma_unmap_sg() mmc: sh_mmcif: support aggressive clock gating mmc: check if mmc cards < 2GB do sector addressing mmc: core: comment on why sdio_reset is done at init time mmc: dw_mmc: support DDR mode mmc: via-sdmmc: Remove set-but-unused variable. mmc: cb710: Return err value in cb710_wait_while_busy() mmc: sdhci-pci: Remove set-but-unused variable. mmc: mxs-mmc: add mmc host driver for i.MX23/28 ...
This commit is contained in:
commit
a8c91da549
|
@ -0,0 +1,21 @@
|
|||
What: /sys/devices/.../mmc_host/mmcX/mmcX:XXXX/enhanced_area_offset
|
||||
Date: January 2011
|
||||
Contact: Chuanxiao Dong <chuanxiao.dong@intel.com>
|
||||
Description:
|
||||
Enhanced area is a new feature defined in eMMC4.4 standard.
|
||||
eMMC4.4 or later card can support such feature. This kind of
|
||||
area can help to improve the card performance. If the feature
|
||||
is enabled, this attribute will indicate the start address of
|
||||
enhanced data area. If not, this attribute will be -EINVAL.
|
||||
Unit Byte. Format decimal.
|
||||
|
||||
What: /sys/devices/.../mmc_host/mmcX/mmcX:XXXX/enhanced_area_size
|
||||
Date: January 2011
|
||||
Contact: Chuanxiao Dong <chuanxiao.dong@intel.com>
|
||||
Description:
|
||||
Enhanced area is a new feature defined in eMMC4.4 standard.
|
||||
eMMC4.4 or later card can support such feature. This kind of
|
||||
area can help to improve the card performance. If the feature
|
||||
is enabled, this attribute will indicate the size of enhanced
|
||||
data area. If not, this attribute will be -EINVAL.
|
||||
Unit KByte. Format decimal.
|
|
@ -0,0 +1,18 @@
|
|||
/*
|
||||
* Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_MXS_MMC_H__
|
||||
#define __MACH_MXS_MMC_H__
|
||||
|
||||
struct mxs_mmc_platform_data {
|
||||
int wp_gpio; /* write protect pin */
|
||||
unsigned int flags;
|
||||
#define SLOTF_4_BIT_CAPABLE (1 << 0)
|
||||
#define SLOTF_8_BIT_CAPABLE (1 << 1)
|
||||
};
|
||||
#endif /* __MACH_MXS_MMC_H__ */
|
|
@ -10,7 +10,17 @@
|
|||
#ifndef __ASM_ARCH_IMX_ESDHC_H
|
||||
#define __ASM_ARCH_IMX_ESDHC_H
|
||||
|
||||
/**
|
||||
* struct esdhc_platform_data - optional platform data for esdhc on i.MX
|
||||
*
|
||||
* strongly recommended for i.MX25/35, not needed for other variants
|
||||
*
|
||||
* @wp_gpio: gpio for write_protect (-EINVAL if unused)
|
||||
* @cd_gpio: gpio for card_detect interrupt (-EINVAL if unused)
|
||||
*/
|
||||
|
||||
struct esdhc_platform_data {
|
||||
unsigned int wp_gpio; /* write protect pin */
|
||||
unsigned int wp_gpio;
|
||||
unsigned int cd_gpio;
|
||||
};
|
||||
#endif /* __ASM_ARCH_IMX_ESDHC_H */
|
||||
|
|
|
@ -58,12 +58,11 @@ config SDIO_UART
|
|||
|
||||
config MMC_TEST
|
||||
tristate "MMC host test driver"
|
||||
default n
|
||||
help
|
||||
Development driver that performs a series of reads and writes
|
||||
to a memory card in order to expose certain well known bugs
|
||||
in host controllers. The tests are executed by writing to the
|
||||
"test" file in sysfs under each card. Note that whatever is
|
||||
"test" file in debugfs under each card. Note that whatever is
|
||||
on your card will be overwritten by these tests.
|
||||
|
||||
This driver is only of interest to those developing or
|
||||
|
|
|
@ -621,6 +621,7 @@ static struct mmc_blk_data *mmc_blk_alloc(struct mmc_card *card)
|
|||
md->disk->private_data = md;
|
||||
md->disk->queue = md->queue.queue;
|
||||
md->disk->driverfs_dev = &card->dev;
|
||||
set_disk_ro(md->disk, md->read_only);
|
||||
|
||||
/*
|
||||
* As discussed on lkml, GENHD_FL_REMOVABLE should:
|
||||
|
|
|
@ -88,6 +88,7 @@ struct mmc_test_area {
|
|||
* @sectors: amount of sectors to check in one group
|
||||
* @ts: time values of transfer
|
||||
* @rate: calculated transfer rate
|
||||
* @iops: I/O operations per second (times 100)
|
||||
*/
|
||||
struct mmc_test_transfer_result {
|
||||
struct list_head link;
|
||||
|
@ -95,6 +96,7 @@ struct mmc_test_transfer_result {
|
|||
unsigned int sectors;
|
||||
struct timespec ts;
|
||||
unsigned int rate;
|
||||
unsigned int iops;
|
||||
};
|
||||
|
||||
/**
|
||||
|
@ -226,9 +228,10 @@ static int mmc_test_wait_busy(struct mmc_test_card *test)
|
|||
|
||||
if (!busy && mmc_test_busy(&cmd)) {
|
||||
busy = 1;
|
||||
printk(KERN_INFO "%s: Warning: Host did not "
|
||||
"wait for busy state to end.\n",
|
||||
mmc_hostname(test->card->host));
|
||||
if (test->card->host->caps & MMC_CAP_WAIT_WHILE_BUSY)
|
||||
printk(KERN_INFO "%s: Warning: Host did not "
|
||||
"wait for busy state to end.\n",
|
||||
mmc_hostname(test->card->host));
|
||||
}
|
||||
} while (mmc_test_busy(&cmd));
|
||||
|
||||
|
@ -494,7 +497,7 @@ static unsigned int mmc_test_rate(uint64_t bytes, struct timespec *ts)
|
|||
*/
|
||||
static void mmc_test_save_transfer_result(struct mmc_test_card *test,
|
||||
unsigned int count, unsigned int sectors, struct timespec ts,
|
||||
unsigned int rate)
|
||||
unsigned int rate, unsigned int iops)
|
||||
{
|
||||
struct mmc_test_transfer_result *tr;
|
||||
|
||||
|
@ -509,6 +512,7 @@ static void mmc_test_save_transfer_result(struct mmc_test_card *test,
|
|||
tr->sectors = sectors;
|
||||
tr->ts = ts;
|
||||
tr->rate = rate;
|
||||
tr->iops = iops;
|
||||
|
||||
list_add_tail(&tr->link, &test->gr->tr_lst);
|
||||
}
|
||||
|
@ -519,20 +523,22 @@ static void mmc_test_save_transfer_result(struct mmc_test_card *test,
|
|||
static void mmc_test_print_rate(struct mmc_test_card *test, uint64_t bytes,
|
||||
struct timespec *ts1, struct timespec *ts2)
|
||||
{
|
||||
unsigned int rate, sectors = bytes >> 9;
|
||||
unsigned int rate, iops, sectors = bytes >> 9;
|
||||
struct timespec ts;
|
||||
|
||||
ts = timespec_sub(*ts2, *ts1);
|
||||
|
||||
rate = mmc_test_rate(bytes, &ts);
|
||||
iops = mmc_test_rate(100, &ts); /* I/O ops per sec x 100 */
|
||||
|
||||
printk(KERN_INFO "%s: Transfer of %u sectors (%u%s KiB) took %lu.%09lu "
|
||||
"seconds (%u kB/s, %u KiB/s)\n",
|
||||
"seconds (%u kB/s, %u KiB/s, %u.%02u IOPS)\n",
|
||||
mmc_hostname(test->card->host), sectors, sectors >> 1,
|
||||
(sectors & 1 ? ".5" : ""), (unsigned long)ts.tv_sec,
|
||||
(unsigned long)ts.tv_nsec, rate / 1000, rate / 1024);
|
||||
(unsigned long)ts.tv_nsec, rate / 1000, rate / 1024,
|
||||
iops / 100, iops % 100);
|
||||
|
||||
mmc_test_save_transfer_result(test, 1, sectors, ts, rate);
|
||||
mmc_test_save_transfer_result(test, 1, sectors, ts, rate, iops);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -542,22 +548,24 @@ static void mmc_test_print_avg_rate(struct mmc_test_card *test, uint64_t bytes,
|
|||
unsigned int count, struct timespec *ts1,
|
||||
struct timespec *ts2)
|
||||
{
|
||||
unsigned int rate, sectors = bytes >> 9;
|
||||
unsigned int rate, iops, sectors = bytes >> 9;
|
||||
uint64_t tot = bytes * count;
|
||||
struct timespec ts;
|
||||
|
||||
ts = timespec_sub(*ts2, *ts1);
|
||||
|
||||
rate = mmc_test_rate(tot, &ts);
|
||||
iops = mmc_test_rate(count * 100, &ts); /* I/O ops per sec x 100 */
|
||||
|
||||
printk(KERN_INFO "%s: Transfer of %u x %u sectors (%u x %u%s KiB) took "
|
||||
"%lu.%09lu seconds (%u kB/s, %u KiB/s)\n",
|
||||
"%lu.%09lu seconds (%u kB/s, %u KiB/s, "
|
||||
"%u.%02u IOPS)\n",
|
||||
mmc_hostname(test->card->host), count, sectors, count,
|
||||
sectors >> 1, (sectors & 1 ? ".5" : ""),
|
||||
(unsigned long)ts.tv_sec, (unsigned long)ts.tv_nsec,
|
||||
rate / 1000, rate / 1024);
|
||||
rate / 1000, rate / 1024, iops / 100, iops % 100);
|
||||
|
||||
mmc_test_save_transfer_result(test, count, sectors, ts, rate);
|
||||
mmc_test_save_transfer_result(test, count, sectors, ts, rate, iops);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -1425,28 +1433,29 @@ static int mmc_test_area_cleanup(struct mmc_test_card *test)
|
|||
}
|
||||
|
||||
/*
|
||||
* Initialize an area for testing large transfers. The size of the area is the
|
||||
* preferred erase size which is a good size for optimal transfer speed. Note
|
||||
* that is typically 4MiB for modern cards. The test area is set to the middle
|
||||
* of the card because cards may have different charateristics at the front
|
||||
* (for FAT file system optimization). Optionally, the area is erased (if the
|
||||
* card supports it) which may improve write performance. Optionally, the area
|
||||
* is filled with data for subsequent read tests.
|
||||
* Initialize an area for testing large transfers. The test area is set to the
|
||||
* middle of the card because cards may have different charateristics at the
|
||||
* front (for FAT file system optimization). Optionally, the area is erased
|
||||
* (if the card supports it) which may improve write performance. Optionally,
|
||||
* the area is filled with data for subsequent read tests.
|
||||
*/
|
||||
static int mmc_test_area_init(struct mmc_test_card *test, int erase, int fill)
|
||||
{
|
||||
struct mmc_test_area *t = &test->area;
|
||||
unsigned long min_sz = 64 * 1024;
|
||||
unsigned long min_sz = 64 * 1024, sz;
|
||||
int ret;
|
||||
|
||||
ret = mmc_test_set_blksize(test, 512);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (test->card->pref_erase > TEST_AREA_MAX_SIZE >> 9)
|
||||
t->max_sz = TEST_AREA_MAX_SIZE;
|
||||
else
|
||||
t->max_sz = (unsigned long)test->card->pref_erase << 9;
|
||||
/* Make the test area size about 4MiB */
|
||||
sz = (unsigned long)test->card->pref_erase << 9;
|
||||
t->max_sz = sz;
|
||||
while (t->max_sz < 4 * 1024 * 1024)
|
||||
t->max_sz += sz;
|
||||
while (t->max_sz > TEST_AREA_MAX_SIZE && t->max_sz > sz)
|
||||
t->max_sz -= sz;
|
||||
|
||||
t->max_segs = test->card->host->max_segs;
|
||||
t->max_seg_sz = test->card->host->max_seg_size;
|
||||
|
@ -1766,6 +1775,188 @@ static int mmc_test_profile_seq_trim_perf(struct mmc_test_card *test)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int rnd_next = 1;
|
||||
|
||||
static unsigned int mmc_test_rnd_num(unsigned int rnd_cnt)
|
||||
{
|
||||
uint64_t r;
|
||||
|
||||
rnd_next = rnd_next * 1103515245 + 12345;
|
||||
r = (rnd_next >> 16) & 0x7fff;
|
||||
return (r * rnd_cnt) >> 15;
|
||||
}
|
||||
|
||||
static int mmc_test_rnd_perf(struct mmc_test_card *test, int write, int print,
|
||||
unsigned long sz)
|
||||
{
|
||||
unsigned int dev_addr, cnt, rnd_addr, range1, range2, last_ea = 0, ea;
|
||||
unsigned int ssz;
|
||||
struct timespec ts1, ts2, ts;
|
||||
int ret;
|
||||
|
||||
ssz = sz >> 9;
|
||||
|
||||
rnd_addr = mmc_test_capacity(test->card) / 4;
|
||||
range1 = rnd_addr / test->card->pref_erase;
|
||||
range2 = range1 / ssz;
|
||||
|
||||
getnstimeofday(&ts1);
|
||||
for (cnt = 0; cnt < UINT_MAX; cnt++) {
|
||||
getnstimeofday(&ts2);
|
||||
ts = timespec_sub(ts2, ts1);
|
||||
if (ts.tv_sec >= 10)
|
||||
break;
|
||||
ea = mmc_test_rnd_num(range1);
|
||||
if (ea == last_ea)
|
||||
ea -= 1;
|
||||
last_ea = ea;
|
||||
dev_addr = rnd_addr + test->card->pref_erase * ea +
|
||||
ssz * mmc_test_rnd_num(range2);
|
||||
ret = mmc_test_area_io(test, sz, dev_addr, write, 0, 0);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
if (print)
|
||||
mmc_test_print_avg_rate(test, sz, cnt, &ts1, &ts2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mmc_test_random_perf(struct mmc_test_card *test, int write)
|
||||
{
|
||||
unsigned int next;
|
||||
unsigned long sz;
|
||||
int ret;
|
||||
|
||||
for (sz = 512; sz < test->area.max_tfr; sz <<= 1) {
|
||||
/*
|
||||
* When writing, try to get more consistent results by running
|
||||
* the test twice with exactly the same I/O but outputting the
|
||||
* results only for the 2nd run.
|
||||
*/
|
||||
if (write) {
|
||||
next = rnd_next;
|
||||
ret = mmc_test_rnd_perf(test, write, 0, sz);
|
||||
if (ret)
|
||||
return ret;
|
||||
rnd_next = next;
|
||||
}
|
||||
ret = mmc_test_rnd_perf(test, write, 1, sz);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
sz = test->area.max_tfr;
|
||||
if (write) {
|
||||
next = rnd_next;
|
||||
ret = mmc_test_rnd_perf(test, write, 0, sz);
|
||||
if (ret)
|
||||
return ret;
|
||||
rnd_next = next;
|
||||
}
|
||||
return mmc_test_rnd_perf(test, write, 1, sz);
|
||||
}
|
||||
|
||||
/*
|
||||
* Random read performance by transfer size.
|
||||
*/
|
||||
static int mmc_test_random_read_perf(struct mmc_test_card *test)
|
||||
{
|
||||
return mmc_test_random_perf(test, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Random write performance by transfer size.
|
||||
*/
|
||||
static int mmc_test_random_write_perf(struct mmc_test_card *test)
|
||||
{
|
||||
return mmc_test_random_perf(test, 1);
|
||||
}
|
||||
|
||||
static int mmc_test_seq_perf(struct mmc_test_card *test, int write,
|
||||
unsigned int tot_sz, int max_scatter)
|
||||
{
|
||||
unsigned int dev_addr, i, cnt, sz, ssz;
|
||||
struct timespec ts1, ts2, ts;
|
||||
int ret;
|
||||
|
||||
sz = test->area.max_tfr;
|
||||
/*
|
||||
* In the case of a maximally scattered transfer, the maximum transfer
|
||||
* size is further limited by using PAGE_SIZE segments.
|
||||
*/
|
||||
if (max_scatter) {
|
||||
struct mmc_test_area *t = &test->area;
|
||||
unsigned long max_tfr;
|
||||
|
||||
if (t->max_seg_sz >= PAGE_SIZE)
|
||||
max_tfr = t->max_segs * PAGE_SIZE;
|
||||
else
|
||||
max_tfr = t->max_segs * t->max_seg_sz;
|
||||
if (sz > max_tfr)
|
||||
sz = max_tfr;
|
||||
}
|
||||
|
||||
ssz = sz >> 9;
|
||||
dev_addr = mmc_test_capacity(test->card) / 4;
|
||||
if (tot_sz > dev_addr << 9)
|
||||
tot_sz = dev_addr << 9;
|
||||
cnt = tot_sz / sz;
|
||||
dev_addr &= 0xffff0000; /* Round to 64MiB boundary */
|
||||
|
||||
getnstimeofday(&ts1);
|
||||
for (i = 0; i < cnt; i++) {
|
||||
ret = mmc_test_area_io(test, sz, dev_addr, write,
|
||||
max_scatter, 0);
|
||||
if (ret)
|
||||
return ret;
|
||||
dev_addr += ssz;
|
||||
}
|
||||
getnstimeofday(&ts2);
|
||||
|
||||
ts = timespec_sub(ts2, ts1);
|
||||
mmc_test_print_avg_rate(test, sz, cnt, &ts1, &ts2);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mmc_test_large_seq_perf(struct mmc_test_card *test, int write)
|
||||
{
|
||||
int ret, i;
|
||||
|
||||
for (i = 0; i < 10; i++) {
|
||||
ret = mmc_test_seq_perf(test, write, 10 * 1024 * 1024, 1);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
for (i = 0; i < 5; i++) {
|
||||
ret = mmc_test_seq_perf(test, write, 100 * 1024 * 1024, 1);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
for (i = 0; i < 3; i++) {
|
||||
ret = mmc_test_seq_perf(test, write, 1000 * 1024 * 1024, 1);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Large sequential read performance.
|
||||
*/
|
||||
static int mmc_test_large_seq_read_perf(struct mmc_test_card *test)
|
||||
{
|
||||
return mmc_test_large_seq_perf(test, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Large sequential write performance.
|
||||
*/
|
||||
static int mmc_test_large_seq_write_perf(struct mmc_test_card *test)
|
||||
{
|
||||
return mmc_test_large_seq_perf(test, 1);
|
||||
}
|
||||
|
||||
static const struct mmc_test_case mmc_test_cases[] = {
|
||||
{
|
||||
.name = "Basic write (no data verification)",
|
||||
|
@ -2005,6 +2196,34 @@ static const struct mmc_test_case mmc_test_cases[] = {
|
|||
.cleanup = mmc_test_area_cleanup,
|
||||
},
|
||||
|
||||
{
|
||||
.name = "Random read performance by transfer size",
|
||||
.prepare = mmc_test_area_prepare,
|
||||
.run = mmc_test_random_read_perf,
|
||||
.cleanup = mmc_test_area_cleanup,
|
||||
},
|
||||
|
||||
{
|
||||
.name = "Random write performance by transfer size",
|
||||
.prepare = mmc_test_area_prepare,
|
||||
.run = mmc_test_random_write_perf,
|
||||
.cleanup = mmc_test_area_cleanup,
|
||||
},
|
||||
|
||||
{
|
||||
.name = "Large sequential read into scattered pages",
|
||||
.prepare = mmc_test_area_prepare,
|
||||
.run = mmc_test_large_seq_read_perf,
|
||||
.cleanup = mmc_test_area_cleanup,
|
||||
},
|
||||
|
||||
{
|
||||
.name = "Large sequential write from scattered pages",
|
||||
.prepare = mmc_test_area_prepare,
|
||||
.run = mmc_test_large_seq_write_perf,
|
||||
.cleanup = mmc_test_area_cleanup,
|
||||
},
|
||||
|
||||
};
|
||||
|
||||
static DEFINE_MUTEX(mmc_test_lock);
|
||||
|
@ -2148,11 +2367,11 @@ static int mtf_test_show(struct seq_file *sf, void *data)
|
|||
seq_printf(sf, "Test %d: %d\n", gr->testcase + 1, gr->result);
|
||||
|
||||
list_for_each_entry(tr, &gr->tr_lst, link) {
|
||||
seq_printf(sf, "%u %d %lu.%09lu %u\n",
|
||||
seq_printf(sf, "%u %d %lu.%09lu %u %u.%02u\n",
|
||||
tr->count, tr->sectors,
|
||||
(unsigned long)tr->ts.tv_sec,
|
||||
(unsigned long)tr->ts.tv_nsec,
|
||||
tr->rate);
|
||||
tr->rate, tr->iops / 100, tr->iops % 100);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -6,6 +6,7 @@ obj-$(CONFIG_MMC) += mmc_core.o
|
|||
mmc_core-y := core.o bus.o host.o \
|
||||
mmc.o mmc_ops.o sd.o sd_ops.o \
|
||||
sdio.o sdio_ops.o sdio_bus.o \
|
||||
sdio_cis.o sdio_io.o sdio_irq.o
|
||||
sdio_cis.o sdio_io.o sdio_irq.o \
|
||||
quirks.o
|
||||
|
||||
mmc_core-$(CONFIG_DEBUG_FS) += debugfs.o
|
||||
|
|
|
@ -167,8 +167,6 @@ mmc_start_request(struct mmc_host *host, struct mmc_request *mrq)
|
|||
|
||||
WARN_ON(!host->claimed);
|
||||
|
||||
led_trigger_event(host->led, LED_FULL);
|
||||
|
||||
mrq->cmd->error = 0;
|
||||
mrq->cmd->mrq = mrq;
|
||||
if (mrq->data) {
|
||||
|
@ -194,6 +192,7 @@ mmc_start_request(struct mmc_host *host, struct mmc_request *mrq)
|
|||
}
|
||||
}
|
||||
mmc_host_clk_ungate(host);
|
||||
led_trigger_event(host->led, LED_FULL);
|
||||
host->ops->request(host, mrq);
|
||||
}
|
||||
|
||||
|
@ -528,7 +527,14 @@ int mmc_try_claim_host(struct mmc_host *host)
|
|||
}
|
||||
EXPORT_SYMBOL(mmc_try_claim_host);
|
||||
|
||||
static void mmc_do_release_host(struct mmc_host *host)
|
||||
/**
|
||||
* mmc_do_release_host - release a claimed host
|
||||
* @host: mmc host to release
|
||||
*
|
||||
* If you successfully claimed a host, this function will
|
||||
* release it again.
|
||||
*/
|
||||
void mmc_do_release_host(struct mmc_host *host)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
|
@ -543,6 +549,7 @@ static void mmc_do_release_host(struct mmc_host *host)
|
|||
wake_up(&host->wq);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(mmc_do_release_host);
|
||||
|
||||
void mmc_host_deeper_disable(struct work_struct *work)
|
||||
{
|
||||
|
@ -1002,6 +1009,13 @@ static void mmc_power_off(struct mmc_host *host)
|
|||
{
|
||||
host->ios.clock = 0;
|
||||
host->ios.vdd = 0;
|
||||
|
||||
/*
|
||||
* Reset ocr mask to be the highest possible voltage supported for
|
||||
* this mmc host. This value will be used at next power up.
|
||||
*/
|
||||
host->ocr = 1 << (fls(host->ocr_avail) - 1);
|
||||
|
||||
if (!mmc_host_is_spi(host)) {
|
||||
host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
|
||||
host->ios.chip_select = MMC_CS_DONTCARE;
|
||||
|
@ -1495,6 +1509,12 @@ static int mmc_rescan_try_freq(struct mmc_host *host, unsigned freq)
|
|||
mmc_hostname(host), __func__, host->f_init);
|
||||
#endif
|
||||
mmc_power_up(host);
|
||||
|
||||
/*
|
||||
* sdio_reset sends CMD52 to reset card. Since we do not know
|
||||
* if the card is being re-initialized, just send it. CMD52
|
||||
* should be ignored by SD/eMMC cards.
|
||||
*/
|
||||
sdio_reset(host);
|
||||
mmc_go_idle(host);
|
||||
|
||||
|
|
|
@ -61,6 +61,8 @@ int mmc_attach_mmc(struct mmc_host *host);
|
|||
int mmc_attach_sd(struct mmc_host *host);
|
||||
int mmc_attach_sdio(struct mmc_host *host);
|
||||
|
||||
void mmc_fixup_device(struct mmc_card *card);
|
||||
|
||||
/* Module parameters */
|
||||
extern int use_spi_crc;
|
||||
|
||||
|
|
|
@ -160,10 +160,7 @@ static bool mmc_host_may_gate_card(struct mmc_card *card)
|
|||
* gate the clock, because there is somebody out there that may still
|
||||
* be using it.
|
||||
*/
|
||||
if (mmc_card_sdio(card))
|
||||
return false;
|
||||
|
||||
return true;
|
||||
return !(card->quirks & MMC_QUIRK_BROKEN_CLK_GATING);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -302,6 +302,44 @@ static int mmc_read_ext_csd(struct mmc_card *card)
|
|||
}
|
||||
|
||||
if (card->ext_csd.rev >= 4) {
|
||||
/*
|
||||
* Enhanced area feature support -- check whether the eMMC
|
||||
* card has the Enhanced area enabled. If so, export enhanced
|
||||
* area offset and size to user by adding sysfs interface.
|
||||
*/
|
||||
if ((ext_csd[EXT_CSD_PARTITION_SUPPORT] & 0x2) &&
|
||||
(ext_csd[EXT_CSD_PARTITION_ATTRIBUTE] & 0x1)) {
|
||||
u8 hc_erase_grp_sz =
|
||||
ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
|
||||
u8 hc_wp_grp_sz =
|
||||
ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
|
||||
|
||||
card->ext_csd.enhanced_area_en = 1;
|
||||
/*
|
||||
* calculate the enhanced data area offset, in bytes
|
||||
*/
|
||||
card->ext_csd.enhanced_area_offset =
|
||||
(ext_csd[139] << 24) + (ext_csd[138] << 16) +
|
||||
(ext_csd[137] << 8) + ext_csd[136];
|
||||
if (mmc_card_blockaddr(card))
|
||||
card->ext_csd.enhanced_area_offset <<= 9;
|
||||
/*
|
||||
* calculate the enhanced data area size, in kilobytes
|
||||
*/
|
||||
card->ext_csd.enhanced_area_size =
|
||||
(ext_csd[142] << 16) + (ext_csd[141] << 8) +
|
||||
ext_csd[140];
|
||||
card->ext_csd.enhanced_area_size *=
|
||||
(size_t)(hc_erase_grp_sz * hc_wp_grp_sz);
|
||||
card->ext_csd.enhanced_area_size <<= 9;
|
||||
} else {
|
||||
/*
|
||||
* If the enhanced area is not enabled, disable these
|
||||
* device attributes.
|
||||
*/
|
||||
card->ext_csd.enhanced_area_offset = -EINVAL;
|
||||
card->ext_csd.enhanced_area_size = -EINVAL;
|
||||
}
|
||||
card->ext_csd.sec_trim_mult =
|
||||
ext_csd[EXT_CSD_SEC_TRIM_MULT];
|
||||
card->ext_csd.sec_erase_mult =
|
||||
|
@ -336,6 +374,9 @@ MMC_DEV_ATTR(manfid, "0x%06x\n", card->cid.manfid);
|
|||
MMC_DEV_ATTR(name, "%s\n", card->cid.prod_name);
|
||||
MMC_DEV_ATTR(oemid, "0x%04x\n", card->cid.oemid);
|
||||
MMC_DEV_ATTR(serial, "0x%08x\n", card->cid.serial);
|
||||
MMC_DEV_ATTR(enhanced_area_offset, "%llu\n",
|
||||
card->ext_csd.enhanced_area_offset);
|
||||
MMC_DEV_ATTR(enhanced_area_size, "%u\n", card->ext_csd.enhanced_area_size);
|
||||
|
||||
static struct attribute *mmc_std_attrs[] = {
|
||||
&dev_attr_cid.attr,
|
||||
|
@ -349,6 +390,8 @@ static struct attribute *mmc_std_attrs[] = {
|
|||
&dev_attr_name.attr,
|
||||
&dev_attr_oemid.attr,
|
||||
&dev_attr_serial.attr,
|
||||
&dev_attr_enhanced_area_offset.attr,
|
||||
&dev_attr_enhanced_area_size.attr,
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
@ -378,6 +421,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
|
|||
int err, ddr = 0;
|
||||
u32 cid[4];
|
||||
unsigned int max_dtr;
|
||||
u32 rocr;
|
||||
|
||||
BUG_ON(!host);
|
||||
WARN_ON(!host->claimed);
|
||||
|
@ -391,7 +435,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
|
|||
mmc_go_idle(host);
|
||||
|
||||
/* The extra bit indicates that we support high capacity */
|
||||
err = mmc_send_op_cond(host, ocr | (1 << 30), NULL);
|
||||
err = mmc_send_op_cond(host, ocr | (1 << 30), &rocr);
|
||||
if (err)
|
||||
goto err;
|
||||
|
||||
|
@ -479,10 +523,50 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
|
|||
err = mmc_read_ext_csd(card);
|
||||
if (err)
|
||||
goto free_card;
|
||||
|
||||
/* If doing byte addressing, check if required to do sector
|
||||
* addressing. Handle the case of <2GB cards needing sector
|
||||
* addressing. See section 8.1 JEDEC Standard JED84-A441;
|
||||
* ocr register has bit 30 set for sector addressing.
|
||||
*/
|
||||
if (!(mmc_card_blockaddr(card)) && (rocr & (1<<30)))
|
||||
mmc_card_set_blockaddr(card);
|
||||
|
||||
/* Erase size depends on CSD and Extended CSD */
|
||||
mmc_set_erase_size(card);
|
||||
}
|
||||
|
||||
/*
|
||||
* If enhanced_area_en is TRUE, host needs to enable ERASE_GRP_DEF
|
||||
* bit. This bit will be lost everytime after a reset or power off.
|
||||
*/
|
||||
if (card->ext_csd.enhanced_area_en) {
|
||||
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
|
||||
EXT_CSD_ERASE_GROUP_DEF, 1);
|
||||
|
||||
if (err && err != -EBADMSG)
|
||||
goto free_card;
|
||||
|
||||
if (err) {
|
||||
err = 0;
|
||||
/*
|
||||
* Just disable enhanced area off & sz
|
||||
* will try to enable ERASE_GROUP_DEF
|
||||
* during next time reinit
|
||||
*/
|
||||
card->ext_csd.enhanced_area_offset = -EINVAL;
|
||||
card->ext_csd.enhanced_area_size = -EINVAL;
|
||||
} else {
|
||||
card->ext_csd.erase_group_def = 1;
|
||||
/*
|
||||
* enable ERASE_GRP_DEF successfully.
|
||||
* This will affect the erase size, so
|
||||
* here need to reset erase size
|
||||
*/
|
||||
mmc_set_erase_size(card);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Activate high speed (if supported)
|
||||
*/
|
||||
|
|
|
@ -0,0 +1,84 @@
|
|||
/*
|
||||
* This file contains work-arounds for many known sdio hardware
|
||||
* bugs.
|
||||
*
|
||||
* Copyright (c) 2011 Pierre Tardy <tardyp@gmail.com>
|
||||
* Inspired from pci fixup code:
|
||||
* Copyright (c) 1999 Martin Mares <mj@ucw.cz>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mmc/card.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
|
||||
/*
|
||||
* The world is not perfect and supplies us with broken mmc/sdio devices.
|
||||
* For at least a part of these bugs we need a work-around
|
||||
*/
|
||||
|
||||
struct mmc_fixup {
|
||||
u16 vendor, device; /* You can use SDIO_ANY_ID here of course */
|
||||
void (*vendor_fixup)(struct mmc_card *card, int data);
|
||||
int data;
|
||||
};
|
||||
|
||||
/*
|
||||
* This hook just adds a quirk unconditionnally
|
||||
*/
|
||||
static void __maybe_unused add_quirk(struct mmc_card *card, int data)
|
||||
{
|
||||
card->quirks |= data;
|
||||
}
|
||||
|
||||
/*
|
||||
* This hook just removes a quirk unconditionnally
|
||||
*/
|
||||
static void __maybe_unused remove_quirk(struct mmc_card *card, int data)
|
||||
{
|
||||
card->quirks &= ~data;
|
||||
}
|
||||
|
||||
/*
|
||||
* This hook just adds a quirk for all sdio devices
|
||||
*/
|
||||
static void add_quirk_for_sdio_devices(struct mmc_card *card, int data)
|
||||
{
|
||||
if (mmc_card_sdio(card))
|
||||
card->quirks |= data;
|
||||
}
|
||||
|
||||
#ifndef SDIO_VENDOR_ID_TI
|
||||
#define SDIO_VENDOR_ID_TI 0x0097
|
||||
#endif
|
||||
|
||||
#ifndef SDIO_DEVICE_ID_TI_WL1271
|
||||
#define SDIO_DEVICE_ID_TI_WL1271 0x4076
|
||||
#endif
|
||||
|
||||
static const struct mmc_fixup mmc_fixup_methods[] = {
|
||||
/* by default sdio devices are considered CLK_GATING broken */
|
||||
/* good cards will be whitelisted as they are tested */
|
||||
{ SDIO_ANY_ID, SDIO_ANY_ID,
|
||||
add_quirk_for_sdio_devices, MMC_QUIRK_BROKEN_CLK_GATING },
|
||||
{ SDIO_VENDOR_ID_TI, SDIO_DEVICE_ID_TI_WL1271,
|
||||
remove_quirk, MMC_QUIRK_BROKEN_CLK_GATING },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
void mmc_fixup_device(struct mmc_card *card)
|
||||
{
|
||||
const struct mmc_fixup *f;
|
||||
|
||||
for (f = mmc_fixup_methods; f->vendor_fixup; f++) {
|
||||
if ((f->vendor == card->cis.vendor
|
||||
|| f->vendor == (u16) SDIO_ANY_ID) &&
|
||||
(f->device == card->cis.device
|
||||
|| f->device == (u16) SDIO_ANY_ID)) {
|
||||
dev_dbg(&card->dev, "calling %pF\n", f->vendor_fixup);
|
||||
f->vendor_fixup(card, f->data);
|
||||
}
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(mmc_fixup_device);
|
|
@ -21,6 +21,7 @@
|
|||
#include "core.h"
|
||||
#include "bus.h"
|
||||
#include "mmc_ops.h"
|
||||
#include "sd.h"
|
||||
#include "sd_ops.h"
|
||||
|
||||
static const unsigned int tran_exp[] = {
|
||||
|
|
|
@ -395,6 +395,14 @@ static int mmc_sdio_init_card(struct mmc_host *host, u32 ocr,
|
|||
if (err)
|
||||
goto remove;
|
||||
|
||||
/*
|
||||
* Update oldcard with the new RCA received from the SDIO
|
||||
* device -- we're doing this so that it's updated in the
|
||||
* "card" struct when oldcard overwrites that later.
|
||||
*/
|
||||
if (oldcard)
|
||||
oldcard->rca = card->rca;
|
||||
|
||||
mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL);
|
||||
}
|
||||
|
||||
|
@ -458,6 +466,7 @@ static int mmc_sdio_init_card(struct mmc_host *host, u32 ocr,
|
|||
|
||||
card = oldcard;
|
||||
}
|
||||
mmc_fixup_device(card);
|
||||
|
||||
if (card->type == MMC_TYPE_SD_COMBO) {
|
||||
err = mmc_sd_setup_card(host, card, oldcard != NULL);
|
||||
|
|
|
@ -311,7 +311,7 @@ config MMC_MSM
|
|||
|
||||
config MMC_MXC
|
||||
tristate "Freescale i.MX2/3 Multimedia Card Interface support"
|
||||
depends on ARCH_MXC
|
||||
depends on MACH_MX21 || MACH_MX27 || ARCH_MX31
|
||||
help
|
||||
This selects the Freescale i.MX2/3 Multimedia card Interface.
|
||||
If you have a i.MX platform with a Multimedia Card slot,
|
||||
|
@ -319,6 +319,15 @@ config MMC_MXC
|
|||
|
||||
If unsure, say N.
|
||||
|
||||
config MMC_MXS
|
||||
tristate "Freescale MXS Multimedia Card Interface support"
|
||||
depends on ARCH_MXS && MXS_DMA
|
||||
help
|
||||
This selects the Freescale SSP MMC controller found on MXS based
|
||||
platforms like mx23/28.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
config MMC_TIFM_SD
|
||||
tristate "TI Flash Media MMC/SD Interface support (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL && PCI
|
||||
|
|
|
@ -6,6 +6,7 @@ obj-$(CONFIG_MMC_ARMMMCI) += mmci.o
|
|||
obj-$(CONFIG_MMC_PXA) += pxamci.o
|
||||
obj-$(CONFIG_MMC_IMX) += imxmmc.o
|
||||
obj-$(CONFIG_MMC_MXC) += mxcmmc.o
|
||||
obj-$(CONFIG_MMC_MXS) += mxs-mmc.o
|
||||
obj-$(CONFIG_MMC_SDHCI) += sdhci.o
|
||||
obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o
|
||||
obj-$(CONFIG_MMC_SDHCI_PXA) += sdhci-pxa.o
|
||||
|
|
|
@ -578,7 +578,8 @@ static void atmci_dma_cleanup(struct atmel_mci *host)
|
|||
struct mmc_data *data = host->data;
|
||||
|
||||
if (data)
|
||||
dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
|
||||
dma_unmap_sg(host->dma.chan->device->dev,
|
||||
data->sg, data->sg_len,
|
||||
((data->flags & MMC_DATA_WRITE)
|
||||
? DMA_TO_DEVICE : DMA_FROM_DEVICE));
|
||||
}
|
||||
|
@ -588,7 +589,7 @@ static void atmci_stop_dma(struct atmel_mci *host)
|
|||
struct dma_chan *chan = host->data_chan;
|
||||
|
||||
if (chan) {
|
||||
chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
|
||||
dmaengine_terminate_all(chan);
|
||||
atmci_dma_cleanup(host);
|
||||
} else {
|
||||
/* Data transfer was stopped by the interrupt handler */
|
||||
|
@ -684,11 +685,11 @@ atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
|
|||
else
|
||||
direction = DMA_TO_DEVICE;
|
||||
|
||||
sglen = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, direction);
|
||||
if (sglen != data->sg_len)
|
||||
goto unmap_exit;
|
||||
sglen = dma_map_sg(chan->device->dev, data->sg,
|
||||
data->sg_len, direction);
|
||||
|
||||
desc = chan->device->device_prep_slave_sg(chan,
|
||||
data->sg, data->sg_len, direction,
|
||||
data->sg, sglen, direction,
|
||||
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
|
||||
if (!desc)
|
||||
goto unmap_exit;
|
||||
|
@ -699,7 +700,7 @@ atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
|
|||
|
||||
return 0;
|
||||
unmap_exit:
|
||||
dma_unmap_sg(&host->pdev->dev, data->sg, sglen, direction);
|
||||
dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
|
@ -709,8 +710,8 @@ static void atmci_submit_data(struct atmel_mci *host)
|
|||
struct dma_async_tx_descriptor *desc = host->dma.data_desc;
|
||||
|
||||
if (chan) {
|
||||
desc->tx_submit(desc);
|
||||
chan->device->device_issue_pending(chan);
|
||||
dmaengine_submit(desc);
|
||||
dma_async_issue_pending(chan);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -205,7 +205,7 @@ static int cb710_wait_while_busy(struct cb710_slot *slot, uint8_t mask)
|
|||
"WAIT12: waited %d loops, mask %02X, entry val %08X, exit val %08X\n",
|
||||
limit, mask, e, x);
|
||||
#endif
|
||||
return 0;
|
||||
return err;
|
||||
}
|
||||
|
||||
static void cb710_mmc_set_transfer_size(struct cb710_slot *slot,
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
#include <linux/mmc/mmc.h>
|
||||
#include <linux/mmc/dw_mmc.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
|
||||
#include "dw_mmc.h"
|
||||
|
||||
|
@ -562,7 +563,8 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot)
|
|||
SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
|
||||
|
||||
/* enable clock */
|
||||
mci_writel(host, CLKENA, SDMMC_CLKEN_ENABLE);
|
||||
mci_writel(host, CLKENA, SDMMC_CLKEN_ENABLE |
|
||||
SDMMC_CLKEN_LOW_PWR);
|
||||
|
||||
/* inform CIU */
|
||||
mci_send_cmd(slot,
|
||||
|
@ -661,6 +663,7 @@ static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
|
|||
static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
||||
{
|
||||
struct dw_mci_slot *slot = mmc_priv(mmc);
|
||||
u32 regs;
|
||||
|
||||
/* set default 1 bit mode */
|
||||
slot->ctype = SDMMC_CTYPE_1BIT;
|
||||
|
@ -672,6 +675,16 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
|||
case MMC_BUS_WIDTH_4:
|
||||
slot->ctype = SDMMC_CTYPE_4BIT;
|
||||
break;
|
||||
case MMC_BUS_WIDTH_8:
|
||||
slot->ctype = SDMMC_CTYPE_8BIT;
|
||||
break;
|
||||
}
|
||||
|
||||
/* DDR mode set */
|
||||
if (ios->ddr) {
|
||||
regs = mci_readl(slot->host, UHS_REG);
|
||||
regs |= (0x1 << slot->id) << 16;
|
||||
mci_writel(slot->host, UHS_REG, regs);
|
||||
}
|
||||
|
||||
if (ios->clock) {
|
||||
|
@ -717,7 +730,9 @@ static int dw_mci_get_cd(struct mmc_host *mmc)
|
|||
struct dw_mci_board *brd = slot->host->pdata;
|
||||
|
||||
/* Use platform get_cd function, else try onboard card detect */
|
||||
if (brd->get_cd)
|
||||
if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION)
|
||||
present = 1;
|
||||
else if (brd->get_cd)
|
||||
present = !brd->get_cd(slot->id);
|
||||
else
|
||||
present = (mci_readl(slot->host, CDETECT) & (1 << slot->id))
|
||||
|
@ -1019,13 +1034,10 @@ static void dw_mci_read_data_pio(struct dw_mci *host)
|
|||
struct mmc_data *data = host->data;
|
||||
int shift = host->data_shift;
|
||||
u32 status;
|
||||
unsigned int nbytes = 0, len, old_len, count = 0;
|
||||
unsigned int nbytes = 0, len;
|
||||
|
||||
do {
|
||||
len = SDMMC_GET_FCNT(mci_readl(host, STATUS)) << shift;
|
||||
if (count == 0)
|
||||
old_len = len;
|
||||
|
||||
if (offset + len <= sg->length) {
|
||||
host->pull_data(host, (void *)(buf + offset), len);
|
||||
|
||||
|
@ -1070,7 +1082,6 @@ static void dw_mci_read_data_pio(struct dw_mci *host)
|
|||
tasklet_schedule(&host->tasklet);
|
||||
return;
|
||||
}
|
||||
count++;
|
||||
} while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/
|
||||
len = SDMMC_GET_FCNT(mci_readl(host, STATUS));
|
||||
host->pio_offset = offset;
|
||||
|
@ -1395,7 +1406,11 @@ static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id)
|
|||
if (host->pdata->setpower)
|
||||
host->pdata->setpower(id, 0);
|
||||
|
||||
mmc->caps = 0;
|
||||
if (host->pdata->caps)
|
||||
mmc->caps = host->pdata->caps;
|
||||
else
|
||||
mmc->caps = 0;
|
||||
|
||||
if (host->pdata->get_bus_wd)
|
||||
if (host->pdata->get_bus_wd(slot->id) >= 4)
|
||||
mmc->caps |= MMC_CAP_4_BIT_DATA;
|
||||
|
@ -1426,6 +1441,13 @@ static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id)
|
|||
}
|
||||
#endif /* CONFIG_MMC_DW_IDMAC */
|
||||
|
||||
host->vmmc = regulator_get(mmc_dev(mmc), "vmmc");
|
||||
if (IS_ERR(host->vmmc)) {
|
||||
printk(KERN_INFO "%s: no vmmc regulator found\n", mmc_hostname(mmc));
|
||||
host->vmmc = NULL;
|
||||
} else
|
||||
regulator_enable(host->vmmc);
|
||||
|
||||
if (dw_mci_get_cd(mmc))
|
||||
set_bit(DW_MMC_CARD_PRESENT, &slot->flags);
|
||||
else
|
||||
|
@ -1441,6 +1463,12 @@ static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id)
|
|||
/* Card initially undetected */
|
||||
slot->last_detect_state = 0;
|
||||
|
||||
/*
|
||||
* Card may have been plugged in prior to boot so we
|
||||
* need to run the detect tasklet
|
||||
*/
|
||||
tasklet_schedule(&host->card_tasklet);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -1619,8 +1647,9 @@ static int dw_mci_probe(struct platform_device *pdev)
|
|||
*/
|
||||
fifo_size = mci_readl(host, FIFOTH);
|
||||
fifo_size = (fifo_size >> 16) & 0x7ff;
|
||||
mci_writel(host, FIFOTH, ((0x2 << 28) | ((fifo_size/2 - 1) << 16) |
|
||||
((fifo_size/2) << 0)));
|
||||
host->fifoth_val = ((0x2 << 28) | ((fifo_size/2 - 1) << 16) |
|
||||
((fifo_size/2) << 0));
|
||||
mci_writel(host, FIFOTH, host->fifoth_val);
|
||||
|
||||
/* disable clock to CIU */
|
||||
mci_writel(host, CLKENA, 0);
|
||||
|
@ -1683,6 +1712,12 @@ static int dw_mci_probe(struct platform_device *pdev)
|
|||
host->sg_cpu, host->sg_dma);
|
||||
iounmap(host->regs);
|
||||
|
||||
if (host->vmmc) {
|
||||
regulator_disable(host->vmmc);
|
||||
regulator_put(host->vmmc);
|
||||
}
|
||||
|
||||
|
||||
err_freehost:
|
||||
kfree(host);
|
||||
return ret;
|
||||
|
@ -1714,6 +1749,11 @@ static int __exit dw_mci_remove(struct platform_device *pdev)
|
|||
if (host->use_dma && host->dma_ops->exit)
|
||||
host->dma_ops->exit(host);
|
||||
|
||||
if (host->vmmc) {
|
||||
regulator_disable(host->vmmc);
|
||||
regulator_put(host->vmmc);
|
||||
}
|
||||
|
||||
iounmap(host->regs);
|
||||
|
||||
kfree(host);
|
||||
|
@ -1729,6 +1769,9 @@ static int dw_mci_suspend(struct platform_device *pdev, pm_message_t mesg)
|
|||
int i, ret;
|
||||
struct dw_mci *host = platform_get_drvdata(pdev);
|
||||
|
||||
if (host->vmmc)
|
||||
regulator_enable(host->vmmc);
|
||||
|
||||
for (i = 0; i < host->num_slots; i++) {
|
||||
struct dw_mci_slot *slot = host->slot[i];
|
||||
if (!slot)
|
||||
|
@ -1744,6 +1787,9 @@ static int dw_mci_suspend(struct platform_device *pdev, pm_message_t mesg)
|
|||
}
|
||||
}
|
||||
|
||||
if (host->vmmc)
|
||||
regulator_disable(host->vmmc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -1752,6 +1798,23 @@ static int dw_mci_resume(struct platform_device *pdev)
|
|||
int i, ret;
|
||||
struct dw_mci *host = platform_get_drvdata(pdev);
|
||||
|
||||
if (host->dma_ops->init)
|
||||
host->dma_ops->init(host);
|
||||
|
||||
if (!mci_wait_reset(&pdev->dev, host)) {
|
||||
ret = -ENODEV;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Restore the old value at FIFOTH register */
|
||||
mci_writel(host, FIFOTH, host->fifoth_val);
|
||||
|
||||
mci_writel(host, RINTSTS, 0xFFFFFFFF);
|
||||
mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
|
||||
SDMMC_INT_TXDR | SDMMC_INT_RXDR |
|
||||
DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
|
||||
mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);
|
||||
|
||||
for (i = 0; i < host->num_slots; i++) {
|
||||
struct dw_mci_slot *slot = host->slot[i];
|
||||
if (!slot)
|
||||
|
|
|
@ -43,6 +43,7 @@
|
|||
#define SDMMC_USRID 0x068
|
||||
#define SDMMC_VERID 0x06c
|
||||
#define SDMMC_HCON 0x070
|
||||
#define SDMMC_UHS_REG 0x074
|
||||
#define SDMMC_BMOD 0x080
|
||||
#define SDMMC_PLDMND 0x084
|
||||
#define SDMMC_DBADDR 0x088
|
||||
|
@ -51,7 +52,6 @@
|
|||
#define SDMMC_DSCADDR 0x094
|
||||
#define SDMMC_BUFADDR 0x098
|
||||
#define SDMMC_DATA 0x100
|
||||
#define SDMMC_DATA_ADR 0x100
|
||||
|
||||
/* shift bit field */
|
||||
#define _SBF(f, v) ((v) << (f))
|
||||
|
|
|
@ -267,14 +267,6 @@ msmsdcc_dma_complete_tlet(unsigned long data)
|
|||
dma_unmap_sg(mmc_dev(host->mmc), host->dma.sg, host->dma.num_ents,
|
||||
host->dma.dir);
|
||||
|
||||
if (host->curr.user_pages) {
|
||||
struct scatterlist *sg = host->dma.sg;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < host->dma.num_ents; i++)
|
||||
flush_dcache_page(sg_page(sg++));
|
||||
}
|
||||
|
||||
host->dma.sg = NULL;
|
||||
host->dma.busy = 0;
|
||||
|
||||
|
|
|
@ -32,16 +32,14 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/dmaengine.h>
|
||||
|
||||
#include <asm/dma.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <mach/mmc.h>
|
||||
|
||||
#ifdef CONFIG_ARCH_MX2
|
||||
#include <mach/dma-mx1-mx2.h>
|
||||
#define HAS_DMA
|
||||
#endif
|
||||
#include <mach/dma.h>
|
||||
|
||||
#define DRIVER_NAME "mxc-mmc"
|
||||
|
||||
|
@ -118,7 +116,8 @@ struct mxcmci_host {
|
|||
void __iomem *base;
|
||||
int irq;
|
||||
int detect_irq;
|
||||
int dma;
|
||||
struct dma_chan *dma;
|
||||
struct dma_async_tx_descriptor *desc;
|
||||
int do_dma;
|
||||
int default_irq_mask;
|
||||
int use_sdio;
|
||||
|
@ -129,7 +128,6 @@ struct mxcmci_host {
|
|||
struct mmc_command *cmd;
|
||||
struct mmc_data *data;
|
||||
|
||||
unsigned int dma_nents;
|
||||
unsigned int datasize;
|
||||
unsigned int dma_dir;
|
||||
|
||||
|
@ -144,6 +142,11 @@ struct mxcmci_host {
|
|||
spinlock_t lock;
|
||||
|
||||
struct regulator *vcc;
|
||||
|
||||
int burstlen;
|
||||
int dmareq;
|
||||
struct dma_slave_config dma_slave_config;
|
||||
struct imx_dma_data dma_data;
|
||||
};
|
||||
|
||||
static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios);
|
||||
|
@ -206,17 +209,16 @@ static void mxcmci_softreset(struct mxcmci_host *host)
|
|||
|
||||
writew(0xff, host->base + MMC_REG_RES_TO);
|
||||
}
|
||||
static int mxcmci_setup_dma(struct mmc_host *mmc);
|
||||
|
||||
static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
|
||||
{
|
||||
unsigned int nob = data->blocks;
|
||||
unsigned int blksz = data->blksz;
|
||||
unsigned int datasize = nob * blksz;
|
||||
#ifdef HAS_DMA
|
||||
struct scatterlist *sg;
|
||||
int i;
|
||||
int ret;
|
||||
#endif
|
||||
int i, nents;
|
||||
|
||||
if (data->flags & MMC_DATA_STREAM)
|
||||
nob = 0xffff;
|
||||
|
||||
|
@ -227,7 +229,9 @@ static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
|
|||
writew(blksz, host->base + MMC_REG_BLK_LEN);
|
||||
host->datasize = datasize;
|
||||
|
||||
#ifdef HAS_DMA
|
||||
if (!mxcmci_use_dma(host))
|
||||
return 0;
|
||||
|
||||
for_each_sg(data->sg, sg, data->sg_len, i) {
|
||||
if (sg->offset & 3 || sg->length & 3) {
|
||||
host->do_dma = 0;
|
||||
|
@ -235,34 +239,30 @@ static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
|
|||
}
|
||||
}
|
||||
|
||||
if (data->flags & MMC_DATA_READ) {
|
||||
if (data->flags & MMC_DATA_READ)
|
||||
host->dma_dir = DMA_FROM_DEVICE;
|
||||
host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
|
||||
data->sg_len, host->dma_dir);
|
||||
|
||||
ret = imx_dma_setup_sg(host->dma, data->sg, host->dma_nents,
|
||||
datasize,
|
||||
host->res->start + MMC_REG_BUFFER_ACCESS,
|
||||
DMA_MODE_READ);
|
||||
} else {
|
||||
else
|
||||
host->dma_dir = DMA_TO_DEVICE;
|
||||
host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
|
||||
data->sg_len, host->dma_dir);
|
||||
|
||||
ret = imx_dma_setup_sg(host->dma, data->sg, host->dma_nents,
|
||||
datasize,
|
||||
host->res->start + MMC_REG_BUFFER_ACCESS,
|
||||
DMA_MODE_WRITE);
|
||||
}
|
||||
nents = dma_map_sg(host->dma->device->dev, data->sg,
|
||||
data->sg_len, host->dma_dir);
|
||||
if (nents != data->sg_len)
|
||||
return -EINVAL;
|
||||
|
||||
if (ret) {
|
||||
dev_err(mmc_dev(host->mmc), "failed to setup DMA : %d\n", ret);
|
||||
return ret;
|
||||
host->desc = host->dma->device->device_prep_slave_sg(host->dma,
|
||||
data->sg, data->sg_len, host->dma_dir,
|
||||
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
|
||||
|
||||
if (!host->desc) {
|
||||
dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len,
|
||||
host->dma_dir);
|
||||
host->do_dma = 0;
|
||||
return 0; /* Fall back to PIO */
|
||||
}
|
||||
wmb();
|
||||
|
||||
imx_dma_enable(host->dma);
|
||||
#endif /* HAS_DMA */
|
||||
dmaengine_submit(host->desc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -337,13 +337,11 @@ static int mxcmci_finish_data(struct mxcmci_host *host, unsigned int stat)
|
|||
struct mmc_data *data = host->data;
|
||||
int data_error;
|
||||
|
||||
#ifdef HAS_DMA
|
||||
if (mxcmci_use_dma(host)) {
|
||||
imx_dma_disable(host->dma);
|
||||
dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_nents,
|
||||
dmaengine_terminate_all(host->dma);
|
||||
dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len,
|
||||
host->dma_dir);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (stat & STATUS_ERR_MASK) {
|
||||
dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n",
|
||||
|
@ -545,7 +543,6 @@ static void mxcmci_datawork(struct work_struct *work)
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef HAS_DMA
|
||||
static void mxcmci_data_done(struct mxcmci_host *host, unsigned int stat)
|
||||
{
|
||||
struct mmc_data *data = host->data;
|
||||
|
@ -568,7 +565,6 @@ static void mxcmci_data_done(struct mxcmci_host *host, unsigned int stat)
|
|||
mxcmci_finish_request(host, host->req);
|
||||
}
|
||||
}
|
||||
#endif /* HAS_DMA */
|
||||
|
||||
static void mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat)
|
||||
{
|
||||
|
@ -606,12 +602,10 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
|
|||
sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio;
|
||||
spin_unlock_irqrestore(&host->lock, flags);
|
||||
|
||||
#ifdef HAS_DMA
|
||||
if (mxcmci_use_dma(host) &&
|
||||
(stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE)))
|
||||
writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
|
||||
host->base + MMC_REG_STATUS);
|
||||
#endif
|
||||
|
||||
if (sdio_irq) {
|
||||
writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
|
||||
|
@ -621,14 +615,14 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
|
|||
if (stat & STATUS_END_CMD_RESP)
|
||||
mxcmci_cmd_done(host, stat);
|
||||
|
||||
#ifdef HAS_DMA
|
||||
if (mxcmci_use_dma(host) &&
|
||||
(stat & (STATUS_DATA_TRANS_DONE | STATUS_WRITE_OP_DONE)))
|
||||
mxcmci_data_done(host, stat);
|
||||
#endif
|
||||
|
||||
if (host->default_irq_mask &&
|
||||
(stat & (STATUS_CARD_INSERTION | STATUS_CARD_REMOVAL)))
|
||||
mmc_detect_change(host->mmc, msecs_to_jiffies(200));
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
@ -642,9 +636,10 @@ static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req)
|
|||
|
||||
host->req = req;
|
||||
host->cmdat &= ~CMD_DAT_CONT_INIT;
|
||||
#ifdef HAS_DMA
|
||||
host->do_dma = 1;
|
||||
#endif
|
||||
|
||||
if (host->dma)
|
||||
host->do_dma = 1;
|
||||
|
||||
if (req->data) {
|
||||
error = mxcmci_setup_data(host, req->data);
|
||||
if (error) {
|
||||
|
@ -660,6 +655,7 @@ static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req)
|
|||
}
|
||||
|
||||
error = mxcmci_start_cmd(host, req->cmd, cmdat);
|
||||
|
||||
out:
|
||||
if (error)
|
||||
mxcmci_finish_request(host, req);
|
||||
|
@ -698,22 +694,46 @@ static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios)
|
|||
prescaler, divider, clk_in, clk_ios);
|
||||
}
|
||||
|
||||
static int mxcmci_setup_dma(struct mmc_host *mmc)
|
||||
{
|
||||
struct mxcmci_host *host = mmc_priv(mmc);
|
||||
struct dma_slave_config *config = &host->dma_slave_config;
|
||||
|
||||
config->dst_addr = host->res->start + MMC_REG_BUFFER_ACCESS;
|
||||
config->src_addr = host->res->start + MMC_REG_BUFFER_ACCESS;
|
||||
config->dst_addr_width = 4;
|
||||
config->src_addr_width = 4;
|
||||
config->dst_maxburst = host->burstlen;
|
||||
config->src_maxburst = host->burstlen;
|
||||
|
||||
return dmaengine_slave_config(host->dma, config);
|
||||
}
|
||||
|
||||
static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
||||
{
|
||||
struct mxcmci_host *host = mmc_priv(mmc);
|
||||
#ifdef HAS_DMA
|
||||
unsigned int blen;
|
||||
int burstlen, ret;
|
||||
|
||||
/*
|
||||
* use burstlen of 64 in 4 bit mode (--> reg value 0)
|
||||
* use burstlen of 16 in 1 bit mode (--> reg value 16)
|
||||
*/
|
||||
if (ios->bus_width == MMC_BUS_WIDTH_4)
|
||||
blen = 0;
|
||||
burstlen = 64;
|
||||
else
|
||||
blen = 16;
|
||||
burstlen = 16;
|
||||
|
||||
if (mxcmci_use_dma(host) && burstlen != host->burstlen) {
|
||||
host->burstlen = burstlen;
|
||||
ret = mxcmci_setup_dma(mmc);
|
||||
if (ret) {
|
||||
dev_err(mmc_dev(host->mmc),
|
||||
"failed to config DMA channel. Falling back to PIO\n");
|
||||
dma_release_channel(host->dma);
|
||||
host->do_dma = 0;
|
||||
}
|
||||
}
|
||||
|
||||
imx_dma_config_burstlen(host->dma, blen);
|
||||
#endif
|
||||
if (ios->bus_width == MMC_BUS_WIDTH_4)
|
||||
host->cmdat |= CMD_DAT_CONT_BUS_WIDTH_4;
|
||||
else
|
||||
|
@ -794,6 +814,18 @@ static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card)
|
|||
host->caps |= MMC_CAP_4_BIT_DATA;
|
||||
}
|
||||
|
||||
static bool filter(struct dma_chan *chan, void *param)
|
||||
{
|
||||
struct mxcmci_host *host = param;
|
||||
|
||||
if (!imx_dma_is_general_purpose(chan))
|
||||
return false;
|
||||
|
||||
chan->private = &host->dma_data;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static const struct mmc_host_ops mxcmci_ops = {
|
||||
.request = mxcmci_request,
|
||||
.set_ios = mxcmci_set_ios,
|
||||
|
@ -808,6 +840,7 @@ static int mxcmci_probe(struct platform_device *pdev)
|
|||
struct mxcmci_host *host = NULL;
|
||||
struct resource *iores, *r;
|
||||
int ret = 0, irq;
|
||||
dma_cap_mask_t mask;
|
||||
|
||||
printk(KERN_INFO "i.MX SDHC driver\n");
|
||||
|
||||
|
@ -883,29 +916,23 @@ static int mxcmci_probe(struct platform_device *pdev)
|
|||
|
||||
writel(host->default_irq_mask, host->base + MMC_REG_INT_CNTR);
|
||||
|
||||
#ifdef HAS_DMA
|
||||
host->dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW);
|
||||
if (host->dma < 0) {
|
||||
dev_err(mmc_dev(host->mmc), "imx_dma_request_by_prio failed\n");
|
||||
ret = -EBUSY;
|
||||
goto out_clk_put;
|
||||
}
|
||||
|
||||
r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
|
||||
if (!r) {
|
||||
ret = -EINVAL;
|
||||
goto out_free_dma;
|
||||
if (r) {
|
||||
host->dmareq = r->start;
|
||||
host->dma_data.peripheral_type = IMX_DMATYPE_SDHC;
|
||||
host->dma_data.priority = DMA_PRIO_LOW;
|
||||
host->dma_data.dma_request = host->dmareq;
|
||||
dma_cap_zero(mask);
|
||||
dma_cap_set(DMA_SLAVE, mask);
|
||||
host->dma = dma_request_channel(mask, filter, host);
|
||||
if (host->dma)
|
||||
mmc->max_seg_size = dma_get_max_seg_size(
|
||||
host->dma->device->dev);
|
||||
}
|
||||
|
||||
ret = imx_dma_config_channel(host->dma,
|
||||
IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_FIFO,
|
||||
IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR,
|
||||
r->start, 0);
|
||||
if (ret) {
|
||||
dev_err(mmc_dev(host->mmc), "failed to config DMA channel\n");
|
||||
goto out_free_dma;
|
||||
}
|
||||
#endif
|
||||
if (!host->dma)
|
||||
dev_info(mmc_dev(host->mmc), "dma not available. Using PIO\n");
|
||||
|
||||
INIT_WORK(&host->datawork, mxcmci_datawork);
|
||||
|
||||
ret = request_irq(host->irq, mxcmci_irq, 0, DRIVER_NAME, host);
|
||||
|
@ -928,9 +955,8 @@ static int mxcmci_probe(struct platform_device *pdev)
|
|||
out_free_irq:
|
||||
free_irq(host->irq, host);
|
||||
out_free_dma:
|
||||
#ifdef HAS_DMA
|
||||
imx_dma_free(host->dma);
|
||||
#endif
|
||||
if (host->dma)
|
||||
dma_release_channel(host->dma);
|
||||
out_clk_put:
|
||||
clk_disable(host->clk);
|
||||
clk_put(host->clk);
|
||||
|
@ -960,9 +986,10 @@ static int mxcmci_remove(struct platform_device *pdev)
|
|||
|
||||
free_irq(host->irq, host);
|
||||
iounmap(host->base);
|
||||
#ifdef HAS_DMA
|
||||
imx_dma_free(host->dma);
|
||||
#endif
|
||||
|
||||
if (host->dma)
|
||||
dma_release_channel(host->dma);
|
||||
|
||||
clk_disable(host->clk);
|
||||
clk_put(host->clk);
|
||||
|
||||
|
|
|
@ -0,0 +1,874 @@
|
|||
/*
|
||||
* Portions copyright (C) 2003 Russell King, PXA MMCI Driver
|
||||
* Portions copyright (C) 2004-2005 Pierre Ossman, W83L51xD SD/MMC driver
|
||||
*
|
||||
* Copyright 2008 Embedded Alley Solutions, Inc.
|
||||
* Copyright 2009-2011 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/dmaengine.h>
|
||||
#include <linux/highmem.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/completion.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/mmc/mmc.h>
|
||||
#include <linux/mmc/sdio.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
|
||||
#include <mach/mxs.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/dma.h>
|
||||
#include <mach/mmc.h>
|
||||
|
||||
#define DRIVER_NAME "mxs-mmc"
|
||||
|
||||
/* card detect polling timeout */
|
||||
#define MXS_MMC_DETECT_TIMEOUT (HZ/2)
|
||||
|
||||
#define SSP_VERSION_LATEST 4
|
||||
#define ssp_is_old() (host->version < SSP_VERSION_LATEST)
|
||||
|
||||
/* SSP registers */
|
||||
#define HW_SSP_CTRL0 0x000
|
||||
#define BM_SSP_CTRL0_RUN (1 << 29)
|
||||
#define BM_SSP_CTRL0_SDIO_IRQ_CHECK (1 << 28)
|
||||
#define BM_SSP_CTRL0_IGNORE_CRC (1 << 26)
|
||||
#define BM_SSP_CTRL0_READ (1 << 25)
|
||||
#define BM_SSP_CTRL0_DATA_XFER (1 << 24)
|
||||
#define BP_SSP_CTRL0_BUS_WIDTH (22)
|
||||
#define BM_SSP_CTRL0_BUS_WIDTH (0x3 << 22)
|
||||
#define BM_SSP_CTRL0_WAIT_FOR_IRQ (1 << 21)
|
||||
#define BM_SSP_CTRL0_LONG_RESP (1 << 19)
|
||||
#define BM_SSP_CTRL0_GET_RESP (1 << 17)
|
||||
#define BM_SSP_CTRL0_ENABLE (1 << 16)
|
||||
#define BP_SSP_CTRL0_XFER_COUNT (0)
|
||||
#define BM_SSP_CTRL0_XFER_COUNT (0xffff)
|
||||
#define HW_SSP_CMD0 0x010
|
||||
#define BM_SSP_CMD0_DBL_DATA_RATE_EN (1 << 25)
|
||||
#define BM_SSP_CMD0_SLOW_CLKING_EN (1 << 22)
|
||||
#define BM_SSP_CMD0_CONT_CLKING_EN (1 << 21)
|
||||
#define BM_SSP_CMD0_APPEND_8CYC (1 << 20)
|
||||
#define BP_SSP_CMD0_BLOCK_SIZE (16)
|
||||
#define BM_SSP_CMD0_BLOCK_SIZE (0xf << 16)
|
||||
#define BP_SSP_CMD0_BLOCK_COUNT (8)
|
||||
#define BM_SSP_CMD0_BLOCK_COUNT (0xff << 8)
|
||||
#define BP_SSP_CMD0_CMD (0)
|
||||
#define BM_SSP_CMD0_CMD (0xff)
|
||||
#define HW_SSP_CMD1 0x020
|
||||
#define HW_SSP_XFER_SIZE 0x030
|
||||
#define HW_SSP_BLOCK_SIZE 0x040
|
||||
#define BP_SSP_BLOCK_SIZE_BLOCK_COUNT (4)
|
||||
#define BM_SSP_BLOCK_SIZE_BLOCK_COUNT (0xffffff << 4)
|
||||
#define BP_SSP_BLOCK_SIZE_BLOCK_SIZE (0)
|
||||
#define BM_SSP_BLOCK_SIZE_BLOCK_SIZE (0xf)
|
||||
#define HW_SSP_TIMING (ssp_is_old() ? 0x050 : 0x070)
|
||||
#define BP_SSP_TIMING_TIMEOUT (16)
|
||||
#define BM_SSP_TIMING_TIMEOUT (0xffff << 16)
|
||||
#define BP_SSP_TIMING_CLOCK_DIVIDE (8)
|
||||
#define BM_SSP_TIMING_CLOCK_DIVIDE (0xff << 8)
|
||||
#define BP_SSP_TIMING_CLOCK_RATE (0)
|
||||
#define BM_SSP_TIMING_CLOCK_RATE (0xff)
|
||||
#define HW_SSP_CTRL1 (ssp_is_old() ? 0x060 : 0x080)
|
||||
#define BM_SSP_CTRL1_SDIO_IRQ (1 << 31)
|
||||
#define BM_SSP_CTRL1_SDIO_IRQ_EN (1 << 30)
|
||||
#define BM_SSP_CTRL1_RESP_ERR_IRQ (1 << 29)
|
||||
#define BM_SSP_CTRL1_RESP_ERR_IRQ_EN (1 << 28)
|
||||
#define BM_SSP_CTRL1_RESP_TIMEOUT_IRQ (1 << 27)
|
||||
#define BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN (1 << 26)
|
||||
#define BM_SSP_CTRL1_DATA_TIMEOUT_IRQ (1 << 25)
|
||||
#define BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN (1 << 24)
|
||||
#define BM_SSP_CTRL1_DATA_CRC_IRQ (1 << 23)
|
||||
#define BM_SSP_CTRL1_DATA_CRC_IRQ_EN (1 << 22)
|
||||
#define BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ (1 << 21)
|
||||
#define BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ_EN (1 << 20)
|
||||
#define BM_SSP_CTRL1_RECV_TIMEOUT_IRQ (1 << 17)
|
||||
#define BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN (1 << 16)
|
||||
#define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ (1 << 15)
|
||||
#define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ_EN (1 << 14)
|
||||
#define BM_SSP_CTRL1_DMA_ENABLE (1 << 13)
|
||||
#define BM_SSP_CTRL1_POLARITY (1 << 9)
|
||||
#define BP_SSP_CTRL1_WORD_LENGTH (4)
|
||||
#define BM_SSP_CTRL1_WORD_LENGTH (0xf << 4)
|
||||
#define BP_SSP_CTRL1_SSP_MODE (0)
|
||||
#define BM_SSP_CTRL1_SSP_MODE (0xf)
|
||||
#define HW_SSP_SDRESP0 (ssp_is_old() ? 0x080 : 0x0a0)
|
||||
#define HW_SSP_SDRESP1 (ssp_is_old() ? 0x090 : 0x0b0)
|
||||
#define HW_SSP_SDRESP2 (ssp_is_old() ? 0x0a0 : 0x0c0)
|
||||
#define HW_SSP_SDRESP3 (ssp_is_old() ? 0x0b0 : 0x0d0)
|
||||
#define HW_SSP_STATUS (ssp_is_old() ? 0x0c0 : 0x100)
|
||||
#define BM_SSP_STATUS_CARD_DETECT (1 << 28)
|
||||
#define BM_SSP_STATUS_SDIO_IRQ (1 << 17)
|
||||
#define HW_SSP_VERSION (cpu_is_mx23() ? 0x110 : 0x130)
|
||||
#define BP_SSP_VERSION_MAJOR (24)
|
||||
|
||||
#define BF_SSP(value, field) (((value) << BP_SSP_##field) & BM_SSP_##field)
|
||||
|
||||
#define MXS_MMC_IRQ_BITS (BM_SSP_CTRL1_SDIO_IRQ | \
|
||||
BM_SSP_CTRL1_RESP_ERR_IRQ | \
|
||||
BM_SSP_CTRL1_RESP_TIMEOUT_IRQ | \
|
||||
BM_SSP_CTRL1_DATA_TIMEOUT_IRQ | \
|
||||
BM_SSP_CTRL1_DATA_CRC_IRQ | \
|
||||
BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ | \
|
||||
BM_SSP_CTRL1_RECV_TIMEOUT_IRQ | \
|
||||
BM_SSP_CTRL1_FIFO_OVERRUN_IRQ)
|
||||
|
||||
#define SSP_PIO_NUM 3
|
||||
|
||||
struct mxs_mmc_host {
|
||||
struct mmc_host *mmc;
|
||||
struct mmc_request *mrq;
|
||||
struct mmc_command *cmd;
|
||||
struct mmc_data *data;
|
||||
|
||||
void __iomem *base;
|
||||
int irq;
|
||||
struct resource *res;
|
||||
struct resource *dma_res;
|
||||
struct clk *clk;
|
||||
unsigned int clk_rate;
|
||||
|
||||
struct dma_chan *dmach;
|
||||
struct mxs_dma_data dma_data;
|
||||
unsigned int dma_dir;
|
||||
u32 ssp_pio_words[SSP_PIO_NUM];
|
||||
|
||||
unsigned int version;
|
||||
unsigned char bus_width;
|
||||
spinlock_t lock;
|
||||
int sdio_irq_en;
|
||||
};
|
||||
|
||||
static int mxs_mmc_get_ro(struct mmc_host *mmc)
|
||||
{
|
||||
struct mxs_mmc_host *host = mmc_priv(mmc);
|
||||
struct mxs_mmc_platform_data *pdata =
|
||||
mmc_dev(host->mmc)->platform_data;
|
||||
|
||||
if (!pdata)
|
||||
return -EFAULT;
|
||||
|
||||
if (!gpio_is_valid(pdata->wp_gpio))
|
||||
return -EINVAL;
|
||||
|
||||
return gpio_get_value(pdata->wp_gpio);
|
||||
}
|
||||
|
||||
static int mxs_mmc_get_cd(struct mmc_host *mmc)
|
||||
{
|
||||
struct mxs_mmc_host *host = mmc_priv(mmc);
|
||||
|
||||
return !(readl(host->base + HW_SSP_STATUS) &
|
||||
BM_SSP_STATUS_CARD_DETECT);
|
||||
}
|
||||
|
||||
static void mxs_mmc_reset(struct mxs_mmc_host *host)
|
||||
{
|
||||
u32 ctrl0, ctrl1;
|
||||
|
||||
mxs_reset_block(host->base);
|
||||
|
||||
ctrl0 = BM_SSP_CTRL0_IGNORE_CRC;
|
||||
ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |
|
||||
BF_SSP(0x7, CTRL1_WORD_LENGTH) |
|
||||
BM_SSP_CTRL1_DMA_ENABLE |
|
||||
BM_SSP_CTRL1_POLARITY |
|
||||
BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN |
|
||||
BM_SSP_CTRL1_DATA_CRC_IRQ_EN |
|
||||
BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN |
|
||||
BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN |
|
||||
BM_SSP_CTRL1_RESP_ERR_IRQ_EN;
|
||||
|
||||
writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
|
||||
BF_SSP(2, TIMING_CLOCK_DIVIDE) |
|
||||
BF_SSP(0, TIMING_CLOCK_RATE),
|
||||
host->base + HW_SSP_TIMING);
|
||||
|
||||
if (host->sdio_irq_en) {
|
||||
ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
|
||||
ctrl1 |= BM_SSP_CTRL1_SDIO_IRQ_EN;
|
||||
}
|
||||
|
||||
writel(ctrl0, host->base + HW_SSP_CTRL0);
|
||||
writel(ctrl1, host->base + HW_SSP_CTRL1);
|
||||
}
|
||||
|
||||
static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
|
||||
struct mmc_command *cmd);
|
||||
|
||||
static void mxs_mmc_request_done(struct mxs_mmc_host *host)
|
||||
{
|
||||
struct mmc_command *cmd = host->cmd;
|
||||
struct mmc_data *data = host->data;
|
||||
struct mmc_request *mrq = host->mrq;
|
||||
|
||||
if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) {
|
||||
if (mmc_resp_type(cmd) & MMC_RSP_136) {
|
||||
cmd->resp[3] = readl(host->base + HW_SSP_SDRESP0);
|
||||
cmd->resp[2] = readl(host->base + HW_SSP_SDRESP1);
|
||||
cmd->resp[1] = readl(host->base + HW_SSP_SDRESP2);
|
||||
cmd->resp[0] = readl(host->base + HW_SSP_SDRESP3);
|
||||
} else {
|
||||
cmd->resp[0] = readl(host->base + HW_SSP_SDRESP0);
|
||||
}
|
||||
}
|
||||
|
||||
if (data) {
|
||||
dma_unmap_sg(mmc_dev(host->mmc), data->sg,
|
||||
data->sg_len, host->dma_dir);
|
||||
/*
|
||||
* If there was an error on any block, we mark all
|
||||
* data blocks as being in error.
|
||||
*/
|
||||
if (!data->error)
|
||||
data->bytes_xfered = data->blocks * data->blksz;
|
||||
else
|
||||
data->bytes_xfered = 0;
|
||||
|
||||
host->data = NULL;
|
||||
if (mrq->stop) {
|
||||
mxs_mmc_start_cmd(host, mrq->stop);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
host->mrq = NULL;
|
||||
mmc_request_done(host->mmc, mrq);
|
||||
}
|
||||
|
||||
static void mxs_mmc_dma_irq_callback(void *param)
|
||||
{
|
||||
struct mxs_mmc_host *host = param;
|
||||
|
||||
mxs_mmc_request_done(host);
|
||||
}
|
||||
|
||||
static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
|
||||
{
|
||||
struct mxs_mmc_host *host = dev_id;
|
||||
struct mmc_command *cmd = host->cmd;
|
||||
struct mmc_data *data = host->data;
|
||||
u32 stat;
|
||||
|
||||
spin_lock(&host->lock);
|
||||
|
||||
stat = readl(host->base + HW_SSP_CTRL1);
|
||||
writel(stat & MXS_MMC_IRQ_BITS,
|
||||
host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR);
|
||||
|
||||
if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
|
||||
mmc_signal_sdio_irq(host->mmc);
|
||||
|
||||
spin_unlock(&host->lock);
|
||||
|
||||
if (stat & BM_SSP_CTRL1_RESP_TIMEOUT_IRQ)
|
||||
cmd->error = -ETIMEDOUT;
|
||||
else if (stat & BM_SSP_CTRL1_RESP_ERR_IRQ)
|
||||
cmd->error = -EIO;
|
||||
|
||||
if (data) {
|
||||
if (stat & (BM_SSP_CTRL1_DATA_TIMEOUT_IRQ |
|
||||
BM_SSP_CTRL1_RECV_TIMEOUT_IRQ))
|
||||
data->error = -ETIMEDOUT;
|
||||
else if (stat & BM_SSP_CTRL1_DATA_CRC_IRQ)
|
||||
data->error = -EILSEQ;
|
||||
else if (stat & (BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ |
|
||||
BM_SSP_CTRL1_FIFO_OVERRUN_IRQ))
|
||||
data->error = -EIO;
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct dma_async_tx_descriptor *mxs_mmc_prep_dma(
|
||||
struct mxs_mmc_host *host, unsigned int append)
|
||||
{
|
||||
struct dma_async_tx_descriptor *desc;
|
||||
struct mmc_data *data = host->data;
|
||||
struct scatterlist * sgl;
|
||||
unsigned int sg_len;
|
||||
|
||||
if (data) {
|
||||
/* data */
|
||||
dma_map_sg(mmc_dev(host->mmc), data->sg,
|
||||
data->sg_len, host->dma_dir);
|
||||
sgl = data->sg;
|
||||
sg_len = data->sg_len;
|
||||
} else {
|
||||
/* pio */
|
||||
sgl = (struct scatterlist *) host->ssp_pio_words;
|
||||
sg_len = SSP_PIO_NUM;
|
||||
}
|
||||
|
||||
desc = host->dmach->device->device_prep_slave_sg(host->dmach,
|
||||
sgl, sg_len, host->dma_dir, append);
|
||||
if (desc) {
|
||||
desc->callback = mxs_mmc_dma_irq_callback;
|
||||
desc->callback_param = host;
|
||||
} else {
|
||||
if (data)
|
||||
dma_unmap_sg(mmc_dev(host->mmc), data->sg,
|
||||
data->sg_len, host->dma_dir);
|
||||
}
|
||||
|
||||
return desc;
|
||||
}
|
||||
|
||||
static void mxs_mmc_bc(struct mxs_mmc_host *host)
|
||||
{
|
||||
struct mmc_command *cmd = host->cmd;
|
||||
struct dma_async_tx_descriptor *desc;
|
||||
u32 ctrl0, cmd0, cmd1;
|
||||
|
||||
ctrl0 = BM_SSP_CTRL0_ENABLE | BM_SSP_CTRL0_IGNORE_CRC;
|
||||
cmd0 = BF_SSP(cmd->opcode, CMD0_CMD) | BM_SSP_CMD0_APPEND_8CYC;
|
||||
cmd1 = cmd->arg;
|
||||
|
||||
if (host->sdio_irq_en) {
|
||||
ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
|
||||
cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
|
||||
}
|
||||
|
||||
host->ssp_pio_words[0] = ctrl0;
|
||||
host->ssp_pio_words[1] = cmd0;
|
||||
host->ssp_pio_words[2] = cmd1;
|
||||
host->dma_dir = DMA_NONE;
|
||||
desc = mxs_mmc_prep_dma(host, 0);
|
||||
if (!desc)
|
||||
goto out;
|
||||
|
||||
dmaengine_submit(desc);
|
||||
return;
|
||||
|
||||
out:
|
||||
dev_warn(mmc_dev(host->mmc),
|
||||
"%s: failed to prep dma\n", __func__);
|
||||
}
|
||||
|
||||
static void mxs_mmc_ac(struct mxs_mmc_host *host)
|
||||
{
|
||||
struct mmc_command *cmd = host->cmd;
|
||||
struct dma_async_tx_descriptor *desc;
|
||||
u32 ignore_crc, get_resp, long_resp;
|
||||
u32 ctrl0, cmd0, cmd1;
|
||||
|
||||
ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
|
||||
0 : BM_SSP_CTRL0_IGNORE_CRC;
|
||||
get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
|
||||
BM_SSP_CTRL0_GET_RESP : 0;
|
||||
long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
|
||||
BM_SSP_CTRL0_LONG_RESP : 0;
|
||||
|
||||
ctrl0 = BM_SSP_CTRL0_ENABLE | ignore_crc | get_resp | long_resp;
|
||||
cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
|
||||
cmd1 = cmd->arg;
|
||||
|
||||
if (host->sdio_irq_en) {
|
||||
ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
|
||||
cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
|
||||
}
|
||||
|
||||
host->ssp_pio_words[0] = ctrl0;
|
||||
host->ssp_pio_words[1] = cmd0;
|
||||
host->ssp_pio_words[2] = cmd1;
|
||||
host->dma_dir = DMA_NONE;
|
||||
desc = mxs_mmc_prep_dma(host, 0);
|
||||
if (!desc)
|
||||
goto out;
|
||||
|
||||
dmaengine_submit(desc);
|
||||
return;
|
||||
|
||||
out:
|
||||
dev_warn(mmc_dev(host->mmc),
|
||||
"%s: failed to prep dma\n", __func__);
|
||||
}
|
||||
|
||||
static unsigned short mxs_ns_to_ssp_ticks(unsigned clock_rate, unsigned ns)
|
||||
{
|
||||
const unsigned int ssp_timeout_mul = 4096;
|
||||
/*
|
||||
* Calculate ticks in ms since ns are large numbers
|
||||
* and might overflow
|
||||
*/
|
||||
const unsigned int clock_per_ms = clock_rate / 1000;
|
||||
const unsigned int ms = ns / 1000;
|
||||
const unsigned int ticks = ms * clock_per_ms;
|
||||
const unsigned int ssp_ticks = ticks / ssp_timeout_mul;
|
||||
|
||||
WARN_ON(ssp_ticks == 0);
|
||||
return ssp_ticks;
|
||||
}
|
||||
|
||||
static void mxs_mmc_adtc(struct mxs_mmc_host *host)
|
||||
{
|
||||
struct mmc_command *cmd = host->cmd;
|
||||
struct mmc_data *data = cmd->data;
|
||||
struct dma_async_tx_descriptor *desc;
|
||||
struct scatterlist *sgl = data->sg, *sg;
|
||||
unsigned int sg_len = data->sg_len;
|
||||
int i;
|
||||
|
||||
unsigned short dma_data_dir, timeout;
|
||||
unsigned int data_size = 0, log2_blksz;
|
||||
unsigned int blocks = data->blocks;
|
||||
|
||||
u32 ignore_crc, get_resp, long_resp, read;
|
||||
u32 ctrl0, cmd0, cmd1, val;
|
||||
|
||||
ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
|
||||
0 : BM_SSP_CTRL0_IGNORE_CRC;
|
||||
get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
|
||||
BM_SSP_CTRL0_GET_RESP : 0;
|
||||
long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
|
||||
BM_SSP_CTRL0_LONG_RESP : 0;
|
||||
|
||||
if (data->flags & MMC_DATA_WRITE) {
|
||||
dma_data_dir = DMA_TO_DEVICE;
|
||||
read = 0;
|
||||
} else {
|
||||
dma_data_dir = DMA_FROM_DEVICE;
|
||||
read = BM_SSP_CTRL0_READ;
|
||||
}
|
||||
|
||||
ctrl0 = BF_SSP(host->bus_width, CTRL0_BUS_WIDTH) |
|
||||
ignore_crc | get_resp | long_resp |
|
||||
BM_SSP_CTRL0_DATA_XFER | read |
|
||||
BM_SSP_CTRL0_WAIT_FOR_IRQ |
|
||||
BM_SSP_CTRL0_ENABLE;
|
||||
|
||||
cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
|
||||
|
||||
/* get logarithm to base 2 of block size for setting register */
|
||||
log2_blksz = ilog2(data->blksz);
|
||||
|
||||
/*
|
||||
* take special care of the case that data size from data->sg
|
||||
* is not equal to blocks x blksz
|
||||
*/
|
||||
for_each_sg(sgl, sg, sg_len, i)
|
||||
data_size += sg->length;
|
||||
|
||||
if (data_size != data->blocks * data->blksz)
|
||||
blocks = 1;
|
||||
|
||||
/* xfer count, block size and count need to be set differently */
|
||||
if (ssp_is_old()) {
|
||||
ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT);
|
||||
cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) |
|
||||
BF_SSP(blocks - 1, CMD0_BLOCK_COUNT);
|
||||
} else {
|
||||
writel(data_size, host->base + HW_SSP_XFER_SIZE);
|
||||
writel(BF_SSP(log2_blksz, BLOCK_SIZE_BLOCK_SIZE) |
|
||||
BF_SSP(blocks - 1, BLOCK_SIZE_BLOCK_COUNT),
|
||||
host->base + HW_SSP_BLOCK_SIZE);
|
||||
}
|
||||
|
||||
if ((cmd->opcode == MMC_STOP_TRANSMISSION) ||
|
||||
(cmd->opcode == SD_IO_RW_EXTENDED))
|
||||
cmd0 |= BM_SSP_CMD0_APPEND_8CYC;
|
||||
|
||||
cmd1 = cmd->arg;
|
||||
|
||||
if (host->sdio_irq_en) {
|
||||
ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
|
||||
cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
|
||||
}
|
||||
|
||||
/* set the timeout count */
|
||||
timeout = mxs_ns_to_ssp_ticks(host->clk_rate, data->timeout_ns);
|
||||
val = readl(host->base + HW_SSP_TIMING);
|
||||
val &= ~(BM_SSP_TIMING_TIMEOUT);
|
||||
val |= BF_SSP(timeout, TIMING_TIMEOUT);
|
||||
writel(val, host->base + HW_SSP_TIMING);
|
||||
|
||||
/* pio */
|
||||
host->ssp_pio_words[0] = ctrl0;
|
||||
host->ssp_pio_words[1] = cmd0;
|
||||
host->ssp_pio_words[2] = cmd1;
|
||||
host->dma_dir = DMA_NONE;
|
||||
desc = mxs_mmc_prep_dma(host, 0);
|
||||
if (!desc)
|
||||
goto out;
|
||||
|
||||
/* append data sg */
|
||||
WARN_ON(host->data != NULL);
|
||||
host->data = data;
|
||||
host->dma_dir = dma_data_dir;
|
||||
desc = mxs_mmc_prep_dma(host, 1);
|
||||
if (!desc)
|
||||
goto out;
|
||||
|
||||
dmaengine_submit(desc);
|
||||
return;
|
||||
out:
|
||||
dev_warn(mmc_dev(host->mmc),
|
||||
"%s: failed to prep dma\n", __func__);
|
||||
}
|
||||
|
||||
static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
|
||||
struct mmc_command *cmd)
|
||||
{
|
||||
host->cmd = cmd;
|
||||
|
||||
switch (mmc_cmd_type(cmd)) {
|
||||
case MMC_CMD_BC:
|
||||
mxs_mmc_bc(host);
|
||||
break;
|
||||
case MMC_CMD_BCR:
|
||||
mxs_mmc_ac(host);
|
||||
break;
|
||||
case MMC_CMD_AC:
|
||||
mxs_mmc_ac(host);
|
||||
break;
|
||||
case MMC_CMD_ADTC:
|
||||
mxs_mmc_adtc(host);
|
||||
break;
|
||||
default:
|
||||
dev_warn(mmc_dev(host->mmc),
|
||||
"%s: unknown MMC command\n", __func__);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void mxs_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
|
||||
{
|
||||
struct mxs_mmc_host *host = mmc_priv(mmc);
|
||||
|
||||
WARN_ON(host->mrq != NULL);
|
||||
host->mrq = mrq;
|
||||
mxs_mmc_start_cmd(host, mrq->cmd);
|
||||
}
|
||||
|
||||
static void mxs_mmc_set_clk_rate(struct mxs_mmc_host *host, unsigned int rate)
|
||||
{
|
||||
unsigned int ssp_rate, bit_rate;
|
||||
u32 div1, div2;
|
||||
u32 val;
|
||||
|
||||
ssp_rate = clk_get_rate(host->clk);
|
||||
|
||||
for (div1 = 2; div1 < 254; div1 += 2) {
|
||||
div2 = ssp_rate / rate / div1;
|
||||
if (div2 < 0x100)
|
||||
break;
|
||||
}
|
||||
|
||||
if (div1 >= 254) {
|
||||
dev_err(mmc_dev(host->mmc),
|
||||
"%s: cannot set clock to %d\n", __func__, rate);
|
||||
return;
|
||||
}
|
||||
|
||||
if (div2 == 0)
|
||||
bit_rate = ssp_rate / div1;
|
||||
else
|
||||
bit_rate = ssp_rate / div1 / div2;
|
||||
|
||||
val = readl(host->base + HW_SSP_TIMING);
|
||||
val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE);
|
||||
val |= BF_SSP(div1, TIMING_CLOCK_DIVIDE);
|
||||
val |= BF_SSP(div2 - 1, TIMING_CLOCK_RATE);
|
||||
writel(val, host->base + HW_SSP_TIMING);
|
||||
|
||||
host->clk_rate = bit_rate;
|
||||
|
||||
dev_dbg(mmc_dev(host->mmc),
|
||||
"%s: div1 %d, div2 %d, ssp %d, bit %d, rate %d\n",
|
||||
__func__, div1, div2, ssp_rate, bit_rate, rate);
|
||||
}
|
||||
|
||||
static void mxs_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
||||
{
|
||||
struct mxs_mmc_host *host = mmc_priv(mmc);
|
||||
|
||||
if (ios->bus_width == MMC_BUS_WIDTH_8)
|
||||
host->bus_width = 2;
|
||||
else if (ios->bus_width == MMC_BUS_WIDTH_4)
|
||||
host->bus_width = 1;
|
||||
else
|
||||
host->bus_width = 0;
|
||||
|
||||
if (ios->clock)
|
||||
mxs_mmc_set_clk_rate(host, ios->clock);
|
||||
}
|
||||
|
||||
static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
|
||||
{
|
||||
struct mxs_mmc_host *host = mmc_priv(mmc);
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&host->lock, flags);
|
||||
|
||||
host->sdio_irq_en = enable;
|
||||
|
||||
if (enable) {
|
||||
writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
|
||||
host->base + HW_SSP_CTRL0 + MXS_SET_ADDR);
|
||||
writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
|
||||
host->base + HW_SSP_CTRL1 + MXS_SET_ADDR);
|
||||
|
||||
if (readl(host->base + HW_SSP_STATUS) & BM_SSP_STATUS_SDIO_IRQ)
|
||||
mmc_signal_sdio_irq(host->mmc);
|
||||
|
||||
} else {
|
||||
writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
|
||||
host->base + HW_SSP_CTRL0 + MXS_CLR_ADDR);
|
||||
writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
|
||||
host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&host->lock, flags);
|
||||
}
|
||||
|
||||
static const struct mmc_host_ops mxs_mmc_ops = {
|
||||
.request = mxs_mmc_request,
|
||||
.get_ro = mxs_mmc_get_ro,
|
||||
.get_cd = mxs_mmc_get_cd,
|
||||
.set_ios = mxs_mmc_set_ios,
|
||||
.enable_sdio_irq = mxs_mmc_enable_sdio_irq,
|
||||
};
|
||||
|
||||
static bool mxs_mmc_dma_filter(struct dma_chan *chan, void *param)
|
||||
{
|
||||
struct mxs_mmc_host *host = param;
|
||||
|
||||
if (!mxs_dma_is_apbh(chan))
|
||||
return false;
|
||||
|
||||
if (chan->chan_id != host->dma_res->start)
|
||||
return false;
|
||||
|
||||
chan->private = &host->dma_data;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static int mxs_mmc_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct mxs_mmc_host *host;
|
||||
struct mmc_host *mmc;
|
||||
struct resource *iores, *dmares, *r;
|
||||
struct mxs_mmc_platform_data *pdata;
|
||||
int ret = 0, irq_err, irq_dma;
|
||||
dma_cap_mask_t mask;
|
||||
|
||||
iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
|
||||
irq_err = platform_get_irq(pdev, 0);
|
||||
irq_dma = platform_get_irq(pdev, 1);
|
||||
if (!iores || !dmares || irq_err < 0 || irq_dma < 0)
|
||||
return -EINVAL;
|
||||
|
||||
r = request_mem_region(iores->start, resource_size(iores), pdev->name);
|
||||
if (!r)
|
||||
return -EBUSY;
|
||||
|
||||
mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev);
|
||||
if (!mmc) {
|
||||
ret = -ENOMEM;
|
||||
goto out_release_mem;
|
||||
}
|
||||
|
||||
host = mmc_priv(mmc);
|
||||
host->base = ioremap(r->start, resource_size(r));
|
||||
if (!host->base) {
|
||||
ret = -ENOMEM;
|
||||
goto out_mmc_free;
|
||||
}
|
||||
|
||||
/* only major verion does matter */
|
||||
host->version = readl(host->base + HW_SSP_VERSION) >>
|
||||
BP_SSP_VERSION_MAJOR;
|
||||
|
||||
host->mmc = mmc;
|
||||
host->res = r;
|
||||
host->dma_res = dmares;
|
||||
host->irq = irq_err;
|
||||
host->sdio_irq_en = 0;
|
||||
|
||||
host->clk = clk_get(&pdev->dev, NULL);
|
||||
if (IS_ERR(host->clk)) {
|
||||
ret = PTR_ERR(host->clk);
|
||||
goto out_iounmap;
|
||||
}
|
||||
clk_enable(host->clk);
|
||||
|
||||
mxs_mmc_reset(host);
|
||||
|
||||
dma_cap_zero(mask);
|
||||
dma_cap_set(DMA_SLAVE, mask);
|
||||
host->dma_data.chan_irq = irq_dma;
|
||||
host->dmach = dma_request_channel(mask, mxs_mmc_dma_filter, host);
|
||||
if (!host->dmach) {
|
||||
dev_err(mmc_dev(host->mmc),
|
||||
"%s: failed to request dma\n", __func__);
|
||||
goto out_clk_put;
|
||||
}
|
||||
|
||||
/* set mmc core parameters */
|
||||
mmc->ops = &mxs_mmc_ops;
|
||||
mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
|
||||
MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL;
|
||||
|
||||
pdata = mmc_dev(host->mmc)->platform_data;
|
||||
if (pdata) {
|
||||
if (pdata->flags & SLOTF_8_BIT_CAPABLE)
|
||||
mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
|
||||
if (pdata->flags & SLOTF_4_BIT_CAPABLE)
|
||||
mmc->caps |= MMC_CAP_4_BIT_DATA;
|
||||
}
|
||||
|
||||
mmc->f_min = 400000;
|
||||
mmc->f_max = 288000000;
|
||||
mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
|
||||
|
||||
mmc->max_segs = 52;
|
||||
mmc->max_blk_size = 1 << 0xf;
|
||||
mmc->max_blk_count = (ssp_is_old()) ? 0xff : 0xffffff;
|
||||
mmc->max_req_size = (ssp_is_old()) ? 0xffff : 0xffffffff;
|
||||
mmc->max_seg_size = dma_get_max_seg_size(host->dmach->device->dev);
|
||||
|
||||
platform_set_drvdata(pdev, mmc);
|
||||
|
||||
ret = request_irq(host->irq, mxs_mmc_irq_handler, 0, DRIVER_NAME, host);
|
||||
if (ret)
|
||||
goto out_free_dma;
|
||||
|
||||
spin_lock_init(&host->lock);
|
||||
|
||||
ret = mmc_add_host(mmc);
|
||||
if (ret)
|
||||
goto out_free_irq;
|
||||
|
||||
dev_info(mmc_dev(host->mmc), "initialized\n");
|
||||
|
||||
return 0;
|
||||
|
||||
out_free_irq:
|
||||
free_irq(host->irq, host);
|
||||
out_free_dma:
|
||||
if (host->dmach)
|
||||
dma_release_channel(host->dmach);
|
||||
out_clk_put:
|
||||
clk_disable(host->clk);
|
||||
clk_put(host->clk);
|
||||
out_iounmap:
|
||||
iounmap(host->base);
|
||||
out_mmc_free:
|
||||
mmc_free_host(mmc);
|
||||
out_release_mem:
|
||||
release_mem_region(iores->start, resource_size(iores));
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int mxs_mmc_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
||||
struct mxs_mmc_host *host = mmc_priv(mmc);
|
||||
struct resource *res = host->res;
|
||||
|
||||
mmc_remove_host(mmc);
|
||||
|
||||
free_irq(host->irq, host);
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
if (host->dmach)
|
||||
dma_release_channel(host->dmach);
|
||||
|
||||
clk_disable(host->clk);
|
||||
clk_put(host->clk);
|
||||
|
||||
iounmap(host->base);
|
||||
|
||||
mmc_free_host(mmc);
|
||||
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int mxs_mmc_suspend(struct device *dev)
|
||||
{
|
||||
struct mmc_host *mmc = dev_get_drvdata(dev);
|
||||
struct mxs_mmc_host *host = mmc_priv(mmc);
|
||||
int ret = 0;
|
||||
|
||||
ret = mmc_suspend_host(mmc);
|
||||
|
||||
clk_disable(host->clk);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int mxs_mmc_resume(struct device *dev)
|
||||
{
|
||||
struct mmc_host *mmc = dev_get_drvdata(dev);
|
||||
struct mxs_mmc_host *host = mmc_priv(mmc);
|
||||
int ret = 0;
|
||||
|
||||
clk_enable(host->clk);
|
||||
|
||||
ret = mmc_resume_host(mmc);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops mxs_mmc_pm_ops = {
|
||||
.suspend = mxs_mmc_suspend,
|
||||
.resume = mxs_mmc_resume,
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct platform_driver mxs_mmc_driver = {
|
||||
.probe = mxs_mmc_probe,
|
||||
.remove = mxs_mmc_remove,
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
#ifdef CONFIG_PM
|
||||
.pm = &mxs_mmc_pm_ops,
|
||||
#endif
|
||||
},
|
||||
};
|
||||
|
||||
static int __init mxs_mmc_init(void)
|
||||
{
|
||||
return platform_driver_register(&mxs_mmc_driver);
|
||||
}
|
||||
|
||||
static void __exit mxs_mmc_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&mxs_mmc_driver);
|
||||
}
|
||||
|
||||
module_init(mxs_mmc_init);
|
||||
module_exit(mxs_mmc_exit);
|
||||
|
||||
MODULE_DESCRIPTION("FREESCALE MXS MMC peripheral");
|
||||
MODULE_AUTHOR("Freescale Semiconductor");
|
||||
MODULE_LICENSE("GPL");
|
|
@ -15,9 +15,11 @@
|
|||
#include <linux/delay.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/mmc/sdhci-pltfm.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/esdhc.h>
|
||||
#include "sdhci.h"
|
||||
#include "sdhci-pltfm.h"
|
||||
#include "sdhci-esdhc.h"
|
||||
|
@ -30,6 +32,39 @@ static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, i
|
|||
writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);
|
||||
}
|
||||
|
||||
static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
|
||||
{
|
||||
/* fake CARD_PRESENT flag on mx25/35 */
|
||||
u32 val = readl(host->ioaddr + reg);
|
||||
|
||||
if (unlikely(reg == SDHCI_PRESENT_STATE)) {
|
||||
struct esdhc_platform_data *boarddata =
|
||||
host->mmc->parent->platform_data;
|
||||
|
||||
if (boarddata && gpio_is_valid(boarddata->cd_gpio)
|
||||
&& gpio_get_value(boarddata->cd_gpio))
|
||||
/* no card, if a valid gpio says so... */
|
||||
val &= SDHCI_CARD_PRESENT;
|
||||
else
|
||||
/* ... in all other cases assume card is present */
|
||||
val |= SDHCI_CARD_PRESENT;
|
||||
}
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
|
||||
{
|
||||
if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE))
|
||||
/*
|
||||
* these interrupts won't work with a custom card_detect gpio
|
||||
* (only applied to mx25/35)
|
||||
*/
|
||||
val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT);
|
||||
|
||||
writel(val, host->ioaddr + reg);
|
||||
}
|
||||
|
||||
static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
|
||||
{
|
||||
if (unlikely(reg == SDHCI_HOST_VERSION))
|
||||
|
@ -100,10 +135,39 @@ static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)
|
|||
return clk_get_rate(pltfm_host->clk) / 256 / 16;
|
||||
}
|
||||
|
||||
static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
|
||||
{
|
||||
struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data;
|
||||
|
||||
if (boarddata && gpio_is_valid(boarddata->wp_gpio))
|
||||
return gpio_get_value(boarddata->wp_gpio);
|
||||
else
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static struct sdhci_ops sdhci_esdhc_ops = {
|
||||
.read_w = esdhc_readw_le,
|
||||
.write_w = esdhc_writew_le,
|
||||
.write_b = esdhc_writeb_le,
|
||||
.set_clock = esdhc_set_clock,
|
||||
.get_max_clock = esdhc_pltfm_get_max_clock,
|
||||
.get_min_clock = esdhc_pltfm_get_min_clock,
|
||||
};
|
||||
|
||||
static irqreturn_t cd_irq(int irq, void *data)
|
||||
{
|
||||
struct sdhci_host *sdhost = (struct sdhci_host *)data;
|
||||
|
||||
tasklet_schedule(&sdhost->card_tasklet);
|
||||
return IRQ_HANDLED;
|
||||
};
|
||||
|
||||
static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pdata)
|
||||
{
|
||||
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
|
||||
struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data;
|
||||
struct clk *clk;
|
||||
int err;
|
||||
|
||||
clk = clk_get(mmc_dev(host->mmc), NULL);
|
||||
if (IS_ERR(clk)) {
|
||||
|
@ -116,32 +180,78 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd
|
|||
if (cpu_is_mx35() || cpu_is_mx51())
|
||||
host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
|
||||
|
||||
/* Fix errata ENGcm07207 which is present on i.MX25 and i.MX35 */
|
||||
if (cpu_is_mx25() || cpu_is_mx35())
|
||||
if (cpu_is_mx25() || cpu_is_mx35()) {
|
||||
/* Fix errata ENGcm07207 present on i.MX25 and i.MX35 */
|
||||
host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK;
|
||||
/* write_protect can't be routed to controller, use gpio */
|
||||
sdhci_esdhc_ops.get_ro = esdhc_pltfm_get_ro;
|
||||
}
|
||||
|
||||
if (boarddata) {
|
||||
err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP");
|
||||
if (err) {
|
||||
dev_warn(mmc_dev(host->mmc),
|
||||
"no write-protect pin available!\n");
|
||||
boarddata->wp_gpio = err;
|
||||
}
|
||||
|
||||
err = gpio_request_one(boarddata->cd_gpio, GPIOF_IN, "ESDHC_CD");
|
||||
if (err) {
|
||||
dev_warn(mmc_dev(host->mmc),
|
||||
"no card-detect pin available!\n");
|
||||
goto no_card_detect_pin;
|
||||
}
|
||||
|
||||
/* i.MX5x has issues to be researched */
|
||||
if (!cpu_is_mx25() && !cpu_is_mx35())
|
||||
goto not_supported;
|
||||
|
||||
err = request_irq(gpio_to_irq(boarddata->cd_gpio), cd_irq,
|
||||
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
|
||||
mmc_hostname(host->mmc), host);
|
||||
if (err) {
|
||||
dev_warn(mmc_dev(host->mmc), "request irq error\n");
|
||||
goto no_card_detect_irq;
|
||||
}
|
||||
|
||||
sdhci_esdhc_ops.write_l = esdhc_writel_le;
|
||||
sdhci_esdhc_ops.read_l = esdhc_readl_le;
|
||||
/* Now we have a working card_detect again */
|
||||
host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
no_card_detect_irq:
|
||||
gpio_free(boarddata->cd_gpio);
|
||||
no_card_detect_pin:
|
||||
boarddata->cd_gpio = err;
|
||||
not_supported:
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void esdhc_pltfm_exit(struct sdhci_host *host)
|
||||
{
|
||||
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
|
||||
struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data;
|
||||
|
||||
if (boarddata && gpio_is_valid(boarddata->wp_gpio))
|
||||
gpio_free(boarddata->wp_gpio);
|
||||
|
||||
if (boarddata && gpio_is_valid(boarddata->cd_gpio)) {
|
||||
gpio_free(boarddata->cd_gpio);
|
||||
|
||||
if (!(host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION))
|
||||
free_irq(gpio_to_irq(boarddata->cd_gpio), host);
|
||||
}
|
||||
|
||||
clk_disable(pltfm_host->clk);
|
||||
clk_put(pltfm_host->clk);
|
||||
}
|
||||
|
||||
static struct sdhci_ops sdhci_esdhc_ops = {
|
||||
.read_w = esdhc_readw_le,
|
||||
.write_w = esdhc_writew_le,
|
||||
.write_b = esdhc_writeb_le,
|
||||
.set_clock = esdhc_set_clock,
|
||||
.get_max_clock = esdhc_pltfm_get_max_clock,
|
||||
.get_min_clock = esdhc_pltfm_get_min_clock,
|
||||
};
|
||||
|
||||
struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
|
||||
.quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_ADMA,
|
||||
.quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_ADMA
|
||||
| SDHCI_QUIRK_BROKEN_CARD_DETECTION,
|
||||
/* ADMA has issues. Might be fixable */
|
||||
.ops = &sdhci_esdhc_ops,
|
||||
.init = esdhc_pltfm_init,
|
||||
|
|
|
@ -19,7 +19,6 @@
|
|||
*/
|
||||
|
||||
#define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \
|
||||
SDHCI_QUIRK_BROKEN_CARD_DETECTION | \
|
||||
SDHCI_QUIRK_NO_BUSY_IRQ | \
|
||||
SDHCI_QUIRK_NONSTANDARD_CLOCK | \
|
||||
SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \
|
||||
|
|
|
@ -73,7 +73,8 @@ static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host)
|
|||
}
|
||||
|
||||
struct sdhci_of_data sdhci_esdhc = {
|
||||
.quirks = ESDHC_DEFAULT_QUIRKS,
|
||||
/* card detection could be handled via GPIO */
|
||||
.quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION,
|
||||
.ops = {
|
||||
.read_l = sdhci_be32bs_readl,
|
||||
.read_w = esdhc_readw,
|
||||
|
|
|
@ -546,6 +546,14 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
|
|||
.driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
|
||||
},
|
||||
|
||||
{
|
||||
.vendor = PCI_VENDOR_ID_RICOH,
|
||||
.device = 0xe823,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = PCI_ANY_ID,
|
||||
.driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
|
||||
},
|
||||
|
||||
{
|
||||
.vendor = PCI_VENDOR_ID_ENE,
|
||||
.device = PCI_DEVICE_ID_ENE_CB712_SD,
|
||||
|
@ -900,9 +908,6 @@ static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
|
|||
{
|
||||
struct sdhci_pci_slot *slot;
|
||||
struct sdhci_host *host;
|
||||
|
||||
resource_size_t addr;
|
||||
|
||||
int ret;
|
||||
|
||||
if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
|
||||
|
@ -949,7 +954,6 @@ static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
|
|||
goto free;
|
||||
}
|
||||
|
||||
addr = pci_resource_start(pdev, bar);
|
||||
host->ioaddr = pci_ioremap_bar(pdev, bar);
|
||||
if (!host->ioaddr) {
|
||||
dev_err(&pdev->dev, "failed to remap registers\n");
|
||||
|
|
|
@ -499,6 +499,9 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
|
|||
* SDHCI block, or a missing configuration that needs to be set. */
|
||||
host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
|
||||
|
||||
/* This host supports the Auto CMD12 */
|
||||
host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
|
||||
|
||||
if (pdata->cd_type == S3C_SDHCI_CD_NONE ||
|
||||
pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
|
||||
host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
|
||||
|
|
|
@ -169,7 +169,7 @@ static int tegra_sdhci_pltfm_init(struct sdhci_host *host,
|
|||
if (rc) {
|
||||
dev_err(mmc_dev(host->mmc),
|
||||
"failed to allocate wp gpio\n");
|
||||
goto out_cd;
|
||||
goto out_irq;
|
||||
}
|
||||
tegra_gpio_enable(plat->wp_gpio);
|
||||
gpio_direction_input(plat->wp_gpio);
|
||||
|
@ -195,6 +195,9 @@ static int tegra_sdhci_pltfm_init(struct sdhci_host *host,
|
|||
gpio_free(plat->wp_gpio);
|
||||
}
|
||||
|
||||
out_irq:
|
||||
if (gpio_is_valid(plat->cd_gpio))
|
||||
free_irq(gpio_to_irq(plat->cd_gpio), host);
|
||||
out_cd:
|
||||
if (gpio_is_valid(plat->cd_gpio)) {
|
||||
tegra_gpio_disable(plat->cd_gpio);
|
||||
|
@ -225,6 +228,7 @@ static void tegra_sdhci_pltfm_exit(struct sdhci_host *host)
|
|||
}
|
||||
|
||||
if (gpio_is_valid(plat->cd_gpio)) {
|
||||
free_irq(gpio_to_irq(plat->cd_gpio), host);
|
||||
tegra_gpio_disable(plat->cd_gpio);
|
||||
gpio_free(plat->cd_gpio);
|
||||
}
|
||||
|
|
|
@ -169,7 +169,7 @@ struct sh_mmcif_host {
|
|||
struct dma_chan *chan_rx;
|
||||
struct dma_chan *chan_tx;
|
||||
struct completion dma_complete;
|
||||
unsigned int dma_sglen;
|
||||
bool dma_active;
|
||||
};
|
||||
|
||||
static inline void sh_mmcif_bitset(struct sh_mmcif_host *host,
|
||||
|
@ -194,10 +194,12 @@ static void mmcif_dma_complete(void *arg)
|
|||
return;
|
||||
|
||||
if (host->data->flags & MMC_DATA_READ)
|
||||
dma_unmap_sg(&host->pd->dev, host->data->sg, host->dma_sglen,
|
||||
dma_unmap_sg(host->chan_rx->device->dev,
|
||||
host->data->sg, host->data->sg_len,
|
||||
DMA_FROM_DEVICE);
|
||||
else
|
||||
dma_unmap_sg(&host->pd->dev, host->data->sg, host->dma_sglen,
|
||||
dma_unmap_sg(host->chan_tx->device->dev,
|
||||
host->data->sg, host->data->sg_len,
|
||||
DMA_TO_DEVICE);
|
||||
|
||||
complete(&host->dma_complete);
|
||||
|
@ -211,9 +213,10 @@ static void sh_mmcif_start_dma_rx(struct sh_mmcif_host *host)
|
|||
dma_cookie_t cookie = -EINVAL;
|
||||
int ret;
|
||||
|
||||
ret = dma_map_sg(&host->pd->dev, sg, host->data->sg_len, DMA_FROM_DEVICE);
|
||||
ret = dma_map_sg(chan->device->dev, sg, host->data->sg_len,
|
||||
DMA_FROM_DEVICE);
|
||||
if (ret > 0) {
|
||||
host->dma_sglen = ret;
|
||||
host->dma_active = true;
|
||||
desc = chan->device->device_prep_slave_sg(chan, sg, ret,
|
||||
DMA_FROM_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
|
||||
}
|
||||
|
@ -221,14 +224,9 @@ static void sh_mmcif_start_dma_rx(struct sh_mmcif_host *host)
|
|||
if (desc) {
|
||||
desc->callback = mmcif_dma_complete;
|
||||
desc->callback_param = host;
|
||||
cookie = desc->tx_submit(desc);
|
||||
if (cookie < 0) {
|
||||
desc = NULL;
|
||||
ret = cookie;
|
||||
} else {
|
||||
sh_mmcif_bitset(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAREN);
|
||||
chan->device->device_issue_pending(chan);
|
||||
}
|
||||
cookie = dmaengine_submit(desc);
|
||||
sh_mmcif_bitset(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAREN);
|
||||
dma_async_issue_pending(chan);
|
||||
}
|
||||
dev_dbg(&host->pd->dev, "%s(): mapped %d -> %d, cookie %d\n",
|
||||
__func__, host->data->sg_len, ret, cookie);
|
||||
|
@ -238,7 +236,7 @@ static void sh_mmcif_start_dma_rx(struct sh_mmcif_host *host)
|
|||
if (ret >= 0)
|
||||
ret = -EIO;
|
||||
host->chan_rx = NULL;
|
||||
host->dma_sglen = 0;
|
||||
host->dma_active = false;
|
||||
dma_release_channel(chan);
|
||||
/* Free the Tx channel too */
|
||||
chan = host->chan_tx;
|
||||
|
@ -263,9 +261,10 @@ static void sh_mmcif_start_dma_tx(struct sh_mmcif_host *host)
|
|||
dma_cookie_t cookie = -EINVAL;
|
||||
int ret;
|
||||
|
||||
ret = dma_map_sg(&host->pd->dev, sg, host->data->sg_len, DMA_TO_DEVICE);
|
||||
ret = dma_map_sg(chan->device->dev, sg, host->data->sg_len,
|
||||
DMA_TO_DEVICE);
|
||||
if (ret > 0) {
|
||||
host->dma_sglen = ret;
|
||||
host->dma_active = true;
|
||||
desc = chan->device->device_prep_slave_sg(chan, sg, ret,
|
||||
DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
|
||||
}
|
||||
|
@ -273,14 +272,9 @@ static void sh_mmcif_start_dma_tx(struct sh_mmcif_host *host)
|
|||
if (desc) {
|
||||
desc->callback = mmcif_dma_complete;
|
||||
desc->callback_param = host;
|
||||
cookie = desc->tx_submit(desc);
|
||||
if (cookie < 0) {
|
||||
desc = NULL;
|
||||
ret = cookie;
|
||||
} else {
|
||||
sh_mmcif_bitset(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAWEN);
|
||||
chan->device->device_issue_pending(chan);
|
||||
}
|
||||
cookie = dmaengine_submit(desc);
|
||||
sh_mmcif_bitset(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAWEN);
|
||||
dma_async_issue_pending(chan);
|
||||
}
|
||||
dev_dbg(&host->pd->dev, "%s(): mapped %d -> %d, cookie %d\n",
|
||||
__func__, host->data->sg_len, ret, cookie);
|
||||
|
@ -290,7 +284,7 @@ static void sh_mmcif_start_dma_tx(struct sh_mmcif_host *host)
|
|||
if (ret >= 0)
|
||||
ret = -EIO;
|
||||
host->chan_tx = NULL;
|
||||
host->dma_sglen = 0;
|
||||
host->dma_active = false;
|
||||
dma_release_channel(chan);
|
||||
/* Free the Rx channel too */
|
||||
chan = host->chan_rx;
|
||||
|
@ -317,7 +311,7 @@ static bool sh_mmcif_filter(struct dma_chan *chan, void *arg)
|
|||
static void sh_mmcif_request_dma(struct sh_mmcif_host *host,
|
||||
struct sh_mmcif_plat_data *pdata)
|
||||
{
|
||||
host->dma_sglen = 0;
|
||||
host->dma_active = false;
|
||||
|
||||
/* We can only either use DMA for both Tx and Rx or not use it at all */
|
||||
if (pdata->dma) {
|
||||
|
@ -364,7 +358,7 @@ static void sh_mmcif_release_dma(struct sh_mmcif_host *host)
|
|||
dma_release_channel(chan);
|
||||
}
|
||||
|
||||
host->dma_sglen = 0;
|
||||
host->dma_active = false;
|
||||
}
|
||||
|
||||
static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)
|
||||
|
@ -753,7 +747,7 @@ static void sh_mmcif_start_cmd(struct sh_mmcif_host *host,
|
|||
}
|
||||
sh_mmcif_get_response(host, cmd);
|
||||
if (host->data) {
|
||||
if (!host->dma_sglen) {
|
||||
if (!host->dma_active) {
|
||||
ret = sh_mmcif_data_trans(host, mrq, cmd->opcode);
|
||||
} else {
|
||||
long time =
|
||||
|
@ -765,7 +759,7 @@ static void sh_mmcif_start_cmd(struct sh_mmcif_host *host,
|
|||
ret = time;
|
||||
sh_mmcif_bitclr(host, MMCIF_CE_BUF_ACC,
|
||||
BUF_ACC_DMAREN | BUF_ACC_DMAWEN);
|
||||
host->dma_sglen = 0;
|
||||
host->dma_active = false;
|
||||
}
|
||||
if (ret < 0)
|
||||
mrq->data->bytes_xfered = 0;
|
||||
|
@ -850,15 +844,15 @@ static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
|||
struct sh_mmcif_host *host = mmc_priv(mmc);
|
||||
struct sh_mmcif_plat_data *p = host->pd->dev.platform_data;
|
||||
|
||||
if (ios->power_mode == MMC_POWER_OFF) {
|
||||
/* clock stop */
|
||||
sh_mmcif_clock_control(host, 0);
|
||||
if (p->down_pwr)
|
||||
p->down_pwr(host->pd);
|
||||
return;
|
||||
} else if (ios->power_mode == MMC_POWER_UP) {
|
||||
if (ios->power_mode == MMC_POWER_UP) {
|
||||
if (p->set_pwr)
|
||||
p->set_pwr(host->pd, ios->power_mode);
|
||||
} else if (ios->power_mode == MMC_POWER_OFF || !ios->clock) {
|
||||
/* clock stop */
|
||||
sh_mmcif_clock_control(host, 0);
|
||||
if (ios->power_mode == MMC_POWER_OFF && p->down_pwr)
|
||||
p->down_pwr(host->pd);
|
||||
return;
|
||||
}
|
||||
|
||||
if (ios->clock)
|
||||
|
|
|
@ -152,7 +152,6 @@ struct tmio_mmc_host {
|
|||
struct tasklet_struct dma_complete;
|
||||
struct tasklet_struct dma_issue;
|
||||
#ifdef CONFIG_TMIO_MMC_DMA
|
||||
unsigned int dma_sglen;
|
||||
u8 bounce_buf[PAGE_CACHE_SIZE] __attribute__((aligned(MAX_ALIGN)));
|
||||
struct scatterlist bounce_sg;
|
||||
#endif
|
||||
|
@ -220,44 +219,48 @@ static char *tmio_mmc_kmap_atomic(struct scatterlist *sg, unsigned long *flags)
|
|||
return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
|
||||
}
|
||||
|
||||
static void tmio_mmc_kunmap_atomic(void *virt, unsigned long *flags)
|
||||
static void tmio_mmc_kunmap_atomic(struct scatterlist *sg, unsigned long *flags, void *virt)
|
||||
{
|
||||
kunmap_atomic(virt, KM_BIO_SRC_IRQ);
|
||||
kunmap_atomic(virt - sg->offset, KM_BIO_SRC_IRQ);
|
||||
local_irq_restore(*flags);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MMC_DEBUG
|
||||
|
||||
#define STATUS_TO_TEXT(a) \
|
||||
#define STATUS_TO_TEXT(a, status, i) \
|
||||
do { \
|
||||
if (status & TMIO_STAT_##a) \
|
||||
if (status & TMIO_STAT_##a) { \
|
||||
if (i++) \
|
||||
printk(" | "); \
|
||||
printk(#a); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
void pr_debug_status(u32 status)
|
||||
{
|
||||
int i = 0;
|
||||
printk(KERN_DEBUG "status: %08x = ", status);
|
||||
STATUS_TO_TEXT(CARD_REMOVE);
|
||||
STATUS_TO_TEXT(CARD_INSERT);
|
||||
STATUS_TO_TEXT(SIGSTATE);
|
||||
STATUS_TO_TEXT(WRPROTECT);
|
||||
STATUS_TO_TEXT(CARD_REMOVE_A);
|
||||
STATUS_TO_TEXT(CARD_INSERT_A);
|
||||
STATUS_TO_TEXT(SIGSTATE_A);
|
||||
STATUS_TO_TEXT(CMD_IDX_ERR);
|
||||
STATUS_TO_TEXT(STOPBIT_ERR);
|
||||
STATUS_TO_TEXT(ILL_FUNC);
|
||||
STATUS_TO_TEXT(CMD_BUSY);
|
||||
STATUS_TO_TEXT(CMDRESPEND);
|
||||
STATUS_TO_TEXT(DATAEND);
|
||||
STATUS_TO_TEXT(CRCFAIL);
|
||||
STATUS_TO_TEXT(DATATIMEOUT);
|
||||
STATUS_TO_TEXT(CMDTIMEOUT);
|
||||
STATUS_TO_TEXT(RXOVERFLOW);
|
||||
STATUS_TO_TEXT(TXUNDERRUN);
|
||||
STATUS_TO_TEXT(RXRDY);
|
||||
STATUS_TO_TEXT(TXRQ);
|
||||
STATUS_TO_TEXT(ILL_ACCESS);
|
||||
STATUS_TO_TEXT(CARD_REMOVE, status, i);
|
||||
STATUS_TO_TEXT(CARD_INSERT, status, i);
|
||||
STATUS_TO_TEXT(SIGSTATE, status, i);
|
||||
STATUS_TO_TEXT(WRPROTECT, status, i);
|
||||
STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
|
||||
STATUS_TO_TEXT(CARD_INSERT_A, status, i);
|
||||
STATUS_TO_TEXT(SIGSTATE_A, status, i);
|
||||
STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
|
||||
STATUS_TO_TEXT(STOPBIT_ERR, status, i);
|
||||
STATUS_TO_TEXT(ILL_FUNC, status, i);
|
||||
STATUS_TO_TEXT(CMD_BUSY, status, i);
|
||||
STATUS_TO_TEXT(CMDRESPEND, status, i);
|
||||
STATUS_TO_TEXT(DATAEND, status, i);
|
||||
STATUS_TO_TEXT(CRCFAIL, status, i);
|
||||
STATUS_TO_TEXT(DATATIMEOUT, status, i);
|
||||
STATUS_TO_TEXT(CMDTIMEOUT, status, i);
|
||||
STATUS_TO_TEXT(RXOVERFLOW, status, i);
|
||||
STATUS_TO_TEXT(TXUNDERRUN, status, i);
|
||||
STATUS_TO_TEXT(RXRDY, status, i);
|
||||
STATUS_TO_TEXT(TXRQ, status, i);
|
||||
STATUS_TO_TEXT(ILL_ACCESS, status, i);
|
||||
printk("\n");
|
||||
}
|
||||
|
||||
|
@ -507,7 +510,7 @@ static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
|
|||
|
||||
host->sg_off += count;
|
||||
|
||||
tmio_mmc_kunmap_atomic(sg_virt, &flags);
|
||||
tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
|
||||
|
||||
if (host->sg_off == host->sg_ptr->length)
|
||||
tmio_mmc_next_sg(host);
|
||||
|
@ -767,7 +770,7 @@ static void tmio_check_bounce_buffer(struct tmio_mmc_host *host)
|
|||
unsigned long flags;
|
||||
void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
|
||||
memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
|
||||
tmio_mmc_kunmap_atomic(sg_vaddr, &flags);
|
||||
tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -825,23 +828,16 @@ static void tmio_mmc_start_dma_rx(struct tmio_mmc_host *host)
|
|||
sg = host->sg_ptr;
|
||||
}
|
||||
|
||||
ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, DMA_FROM_DEVICE);
|
||||
if (ret > 0) {
|
||||
host->dma_sglen = ret;
|
||||
ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
|
||||
if (ret > 0)
|
||||
desc = chan->device->device_prep_slave_sg(chan, sg, ret,
|
||||
DMA_FROM_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
|
||||
}
|
||||
|
||||
if (desc) {
|
||||
desc->callback = tmio_dma_complete;
|
||||
desc->callback_param = host;
|
||||
cookie = desc->tx_submit(desc);
|
||||
if (cookie < 0) {
|
||||
desc = NULL;
|
||||
ret = cookie;
|
||||
} else {
|
||||
chan->device->device_issue_pending(chan);
|
||||
}
|
||||
cookie = dmaengine_submit(desc);
|
||||
dma_async_issue_pending(chan);
|
||||
}
|
||||
dev_dbg(&host->pdev->dev, "%s(): mapped %d -> %d, cookie %d, rq %p\n",
|
||||
__func__, host->sg_len, ret, cookie, host->mrq);
|
||||
|
@ -901,26 +897,20 @@ static void tmio_mmc_start_dma_tx(struct tmio_mmc_host *host)
|
|||
void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
|
||||
sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
|
||||
memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
|
||||
tmio_mmc_kunmap_atomic(sg_vaddr, &flags);
|
||||
tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
|
||||
host->sg_ptr = &host->bounce_sg;
|
||||
sg = host->sg_ptr;
|
||||
}
|
||||
|
||||
ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, DMA_TO_DEVICE);
|
||||
if (ret > 0) {
|
||||
host->dma_sglen = ret;
|
||||
ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
|
||||
if (ret > 0)
|
||||
desc = chan->device->device_prep_slave_sg(chan, sg, ret,
|
||||
DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
|
||||
}
|
||||
|
||||
if (desc) {
|
||||
desc->callback = tmio_dma_complete;
|
||||
desc->callback_param = host;
|
||||
cookie = desc->tx_submit(desc);
|
||||
if (cookie < 0) {
|
||||
desc = NULL;
|
||||
ret = cookie;
|
||||
}
|
||||
cookie = dmaengine_submit(desc);
|
||||
}
|
||||
dev_dbg(&host->pdev->dev, "%s(): mapped %d -> %d, cookie %d, rq %p\n",
|
||||
__func__, host->sg_len, ret, cookie, host->mrq);
|
||||
|
@ -964,7 +954,7 @@ static void tmio_issue_tasklet_fn(unsigned long priv)
|
|||
struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
|
||||
struct dma_chan *chan = host->chan_tx;
|
||||
|
||||
chan->device->device_issue_pending(chan);
|
||||
dma_async_issue_pending(chan);
|
||||
}
|
||||
|
||||
static void tmio_tasklet_fn(unsigned long arg)
|
||||
|
@ -978,10 +968,12 @@ static void tmio_tasklet_fn(unsigned long arg)
|
|||
goto out;
|
||||
|
||||
if (host->data->flags & MMC_DATA_READ)
|
||||
dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->dma_sglen,
|
||||
dma_unmap_sg(host->chan_rx->device->dev,
|
||||
host->sg_ptr, host->sg_len,
|
||||
DMA_FROM_DEVICE);
|
||||
else
|
||||
dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->dma_sglen,
|
||||
dma_unmap_sg(host->chan_tx->device->dev,
|
||||
host->sg_ptr, host->sg_len,
|
||||
DMA_TO_DEVICE);
|
||||
|
||||
tmio_mmc_do_data_irq(host);
|
||||
|
|
|
@ -802,12 +802,9 @@ static const struct mmc_host_ops via_sdc_ops = {
|
|||
|
||||
static void via_reset_pcictrl(struct via_crdr_mmc_host *host)
|
||||
{
|
||||
void __iomem *addrbase;
|
||||
unsigned long flags;
|
||||
u8 gatt;
|
||||
|
||||
addrbase = host->pcictrl_mmiobase;
|
||||
|
||||
spin_lock_irqsave(&host->lock, flags);
|
||||
|
||||
via_save_pcictrlreg(host);
|
||||
|
|
|
@ -54,6 +54,9 @@ struct mmc_ext_csd {
|
|||
unsigned int sec_trim_mult; /* Secure trim multiplier */
|
||||
unsigned int sec_erase_mult; /* Secure erase multiplier */
|
||||
unsigned int trim_timeout; /* In milliseconds */
|
||||
bool enhanced_area_en; /* enable bit */
|
||||
unsigned long long enhanced_area_offset; /* Units: Byte */
|
||||
unsigned int enhanced_area_size; /* Units: KB */
|
||||
};
|
||||
|
||||
struct sd_scr {
|
||||
|
@ -121,6 +124,7 @@ struct mmc_card {
|
|||
/* for byte mode */
|
||||
#define MMC_QUIRK_NONSTD_SDIO (1<<2) /* non-standard SDIO card attached */
|
||||
/* (missing CIA registers) */
|
||||
#define MMC_QUIRK_BROKEN_CLK_GATING (1<<3) /* clock gating the sdio bus will make card fail */
|
||||
|
||||
unsigned int erase_size; /* erase size in sectors */
|
||||
unsigned int erase_shift; /* if erase unit is power 2 */
|
||||
|
@ -148,6 +152,8 @@ struct mmc_card {
|
|||
struct dentry *debugfs_root;
|
||||
};
|
||||
|
||||
void mmc_fixup_device(struct mmc_card *dev);
|
||||
|
||||
#define mmc_card_mmc(c) ((c)->type == MMC_TYPE_MMC)
|
||||
#define mmc_card_sd(c) ((c)->type == MMC_TYPE_SD)
|
||||
#define mmc_card_sdio(c) ((c)->type == MMC_TYPE_SDIO)
|
||||
|
|
|
@ -160,6 +160,7 @@ extern unsigned int mmc_align_data_size(struct mmc_card *, unsigned int);
|
|||
|
||||
extern int __mmc_claim_host(struct mmc_host *host, atomic_t *abort);
|
||||
extern void mmc_release_host(struct mmc_host *host);
|
||||
extern void mmc_do_release_host(struct mmc_host *host);
|
||||
extern int mmc_try_claim_host(struct mmc_host *host);
|
||||
|
||||
/**
|
||||
|
|
|
@ -140,6 +140,7 @@ struct dw_mci {
|
|||
u32 bus_hz;
|
||||
u32 current_speed;
|
||||
u32 num_slots;
|
||||
u32 fifoth_val;
|
||||
struct platform_device *pdev;
|
||||
struct dw_mci_board *pdata;
|
||||
struct dw_mci_slot *slot[MAX_MCI_SLOTS];
|
||||
|
@ -151,6 +152,8 @@ struct dw_mci {
|
|||
|
||||
/* Workaround flags */
|
||||
u32 quirks;
|
||||
|
||||
struct regulator *vmmc; /* Power regulator */
|
||||
};
|
||||
|
||||
/* DMA ops for Internal/External DMAC interface */
|
||||
|
@ -165,14 +168,14 @@ struct dw_mci_dma_ops {
|
|||
};
|
||||
|
||||
/* IP Quirks/flags. */
|
||||
/* No special quirks or flags to cater for */
|
||||
#define DW_MCI_QUIRK_NONE 0
|
||||
/* DTO fix for command transmission with IDMAC configured */
|
||||
#define DW_MCI_QUIRK_IDMAC_DTO 1
|
||||
#define DW_MCI_QUIRK_IDMAC_DTO BIT(0)
|
||||
/* delay needed between retries on some 2.11a implementations */
|
||||
#define DW_MCI_QUIRK_RETRY_DELAY 2
|
||||
#define DW_MCI_QUIRK_RETRY_DELAY BIT(1)
|
||||
/* High Speed Capable - Supports HS cards (upto 50MHz) */
|
||||
#define DW_MCI_QUIRK_HIGHSPEED 4
|
||||
#define DW_MCI_QUIRK_HIGHSPEED BIT(2)
|
||||
/* Unreliable card detection */
|
||||
#define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3)
|
||||
|
||||
|
||||
struct dma_pdata;
|
||||
|
@ -192,6 +195,8 @@ struct dw_mci_board {
|
|||
u32 quirks; /* Workaround / Quirk flags */
|
||||
unsigned int bus_hz; /* Bus speed */
|
||||
|
||||
unsigned int caps; /* Capabilities */
|
||||
|
||||
/* delay in mS before detecting cards after interrupt */
|
||||
u32 detect_delay_ms;
|
||||
|
||||
|
|
|
@ -253,6 +253,8 @@ struct _mmc_csd {
|
|||
* EXT_CSD fields
|
||||
*/
|
||||
|
||||
#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */
|
||||
#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */
|
||||
#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
|
||||
#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
|
||||
#define EXT_CSD_BUS_WIDTH 183 /* R/W */
|
||||
|
@ -262,6 +264,7 @@ struct _mmc_csd {
|
|||
#define EXT_CSD_CARD_TYPE 196 /* RO */
|
||||
#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
|
||||
#define EXT_CSD_S_A_TIMEOUT 217 /* RO */
|
||||
#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
|
||||
#define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */
|
||||
#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
|
||||
#define EXT_CSD_SEC_TRIM_MULT 229 /* RO */
|
||||
|
|
Loading…
Reference in New Issue