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drm/i915: add GEN5_IRQ_INIT macro 

The goal is to reuse the GEN8 macros, but a few changes are needed, so
let's make things easier to review.

I could also use these macros on older code, but since I plan to
change how the interrupts are initialized, we'll risk breaking the
older code in the next commits, so I'll leave this out for now.

v2: - Rebase.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Paulo Zanoni 2014-04-01 15:37:09 -03:00 committed by Daniel Vetter
parent 83a7280ebc
commit a9d356a6b8
1 changed files with 10 additions and 14 deletions
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24
drivers/gpu/drm/i915/i915_irq.c
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@ -80,6 +80,12 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */
[HPD_PORT_D] = PORTD_HOTPLUG_INT_STATUS
};
#define GEN5_IRQ_INIT(type) do { \
I915_WRITE(type##IMR, 0xffffffff); \
I915_WRITE(type##IER, 0); \
POSTING_READ(type##IER); \
} while (0)
/* For display hotplug interrupt */
static void
ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
@ -2837,17 +2843,9 @@ static void gen5_gt_irq_preinstall(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
/* and GT */
I915_WRITE(GTIMR, 0xffffffff);
I915_WRITE(GTIER, 0x0);
POSTING_READ(GTIER);
if (INTEL_INFO(dev)->gen >= 6) {
/* and PM */
I915_WRITE(GEN6_PMIMR, 0xffffffff);
I915_WRITE(GEN6_PMIER, 0x0);
POSTING_READ(GEN6_PMIER);
}
GEN5_IRQ_INIT(GT);
if (INTEL_INFO(dev)->gen >= 6)
GEN5_IRQ_INIT(GEN6_PM);
}
/* drm_dma.h hooks
@ -2858,9 +2856,7 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
I915_WRITE(HWSTAM, 0xeffe);
I915_WRITE(DEIMR, 0xffffffff);
I915_WRITE(DEIER, 0x0);
POSTING_READ(DEIER);
GEN5_IRQ_INIT(DE);
gen5_gt_irq_preinstall(dev);