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ARM: dts: armada388-clearfog: move I2C nodes 

Move the I2C nodes over to use the label form to reference the I2C
controllers, rather than replicating the device node path.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit is contained in:
Russell King 2017-01-02 15:27:21 +00:00 committed by Gregory CLEMENT
parent fce54ee273
commit aa09b30f1b
1 changed files with 120 additions and 125 deletions
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133
arch/arm/boot/dts/armada-388-clearfog.dtsi
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@ -92,7 +92,62 @@ fixed-link {
};
};
i2c@11000 {
sata@a8000 {
/* pinctrl? */
status = "okay";
};
sata@e0000 {
/* pinctrl? */
status = "okay";
};
sdhci@d8000 {
bus-width = <4>;
cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
no-1-8-v;
pinctrl-0 = <&microsom_sdhci_pins
&clearfog_sdhci_cd_pins>;
pinctrl-names = "default";
status = "okay";
vmmc = <&reg_3p3v>;
wp-inverted;
};
serial@12100 {
/* mikrobus uart */
pinctrl-0 = <&mikro_uart_pins>;
pinctrl-names = "default";
status = "okay";
};
usb@58000 {
/* CON3, nearest power. */
status = "okay";
};
usb3@f8000 {
/* CON7 */
status = "okay";
};
};
pcie-controller {
status = "okay";
/*
* The two PCIe units are accessible through
* the mini-PCIe connectors on the board.
*/
pcie@2,0 {
/* Port 1, Lane 0. CON3, nearest power. */
reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
};
};
&i2c0 {
/* Is there anything on this? */
clock-frequency = <100000>;
pinctrl-0 = <&i2c0_pins>;
@ -121,10 +176,8 @@ i2c@11000 {
expander0: gpio-expander@20 {
/*
* This is how it should be:
* compatible = "onnn,pca9655",
* "nxp,pca9555";
* but you can't do this because of
* the way I2C works.
* compatible = "onnn,pca9655", "nxp,pca9555";
* but you can't do this because of the way I2C works.
*/
compatible = "nxp,pca9555";
gpio-controller;
@ -198,78 +251,20 @@ mikrobus_adc: mcp3021@4c {
};
/* Also something at 0x64 */
};
};
i2c@11100 {
&i2c1 {
/*
* Routed to SFP, mikrobus, and PCIe.
* SFP limits this to 100kHz, and requires
* an AT24C01A/02/04 with address pins tied
* low, which takes addresses 0x50 and 0x51.
* Mikrobus doesn't specify beyond an I2C
* bus being present.
* PCIe uses ARP to assign addresses, or
* 0x63-0x64.
* SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
* address pins tied low, which takes addresses 0x50 and 0x51.
* Mikrobus doesn't specify beyond an I2C bus being present.
* PCIe uses ARP to assign addresses, or 0x63-0x64.
*/
clock-frequency = <100000>;
pinctrl-0 = <&clearfog_i2c1_pins>;
pinctrl-names = "default";
status = "okay";
};
sata@a8000 {
/* pinctrl? */
status = "okay";
};
sata@e0000 {
/* pinctrl? */
status = "okay";
};
sdhci@d8000 {
bus-width = <4>;
cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
no-1-8-v;
pinctrl-0 = <&microsom_sdhci_pins
&clearfog_sdhci_cd_pins>;
pinctrl-names = "default";
status = "okay";
vmmc = <&reg_3p3v>;
wp-inverted;
};
serial@12100 {
/* mikrobus uart */
pinctrl-0 = <&mikro_uart_pins>;
pinctrl-names = "default";
status = "okay";
};
usb@58000 {
/* CON3, nearest power. */
status = "okay";
};
usb3@f8000 {
/* CON7 */
status = "okay";
};
};
pcie-controller {
status = "okay";
/*
* The two PCIe units are accessible through
* the mini-PCIe connectors on the board.
*/
pcie@2,0 {
/* Port 1, Lane 0. CON3, nearest power. */
reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
};
};
&pinctrl {