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[PATCH] more vr4181 removal 

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Cc: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Adrian Bunk 2005-09-03 15:56:07 -07:00 committed by Linus Torvalds
parent 0ad7305f52
commit ab1418a316
2 changed files with 1 additions and 17 deletions
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12
arch/mips/Kconfig
View File

@ -445,11 +445,6 @@ config DDB5477_BUS_FREQUENCY
depends on DDB5477
default 0
config NEC_OSPREY
bool "Support for NEC Osprey board"
select DMA_NONCOHERENT
select IRQ_CPU
config SGI_IP22
bool "Support for SGI IP22 (Indy/Indigo2)"
select ARC
@ -974,7 +969,7 @@ config MIPS_DISABLE_OBSOLETE_IDE
config CPU_LITTLE_ENDIAN
bool "Generate little endian code"
default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || NEC_OSPREY || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
default n if MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
help
Some MIPS machines can be configured for either little or big endian
@ -1091,11 +1086,6 @@ config ARC32
config HAVE_STD_PC_SERIAL_PORT
bool
config VR4181
bool
depends on NEC_OSPREY
default y
config ARC_CONSOLE
bool "ARC console support"
depends on SGI_IP22 || SNI_RM200_PCI

6
arch/mips/kernel/cpu-probe.c
View File

@ -229,15 +229,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_VR41XX:
switch (c->processor_id & 0xf0) {
#ifndef CONFIG_VR4181
case PRID_REV_VR4111:
c->cputype = CPU_VR4111;
break;
#else
case PRID_REV_VR4181:
c->cputype = CPU_VR4181;
break;
#endif
case PRID_REV_VR4121:
c->cputype = CPU_VR4121;
break;