mirror of https://gitee.com/openkylin/linux.git
[PATCH] more vr4181 removal
Signed-off-by: Adrian Bunk <bunk@stusta.de> Cc: Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -445,11 +445,6 @@ config DDB5477_BUS_FREQUENCY
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depends on DDB5477
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depends on DDB5477
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default 0
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default 0
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config NEC_OSPREY
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bool "Support for NEC Osprey board"
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select DMA_NONCOHERENT
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select IRQ_CPU
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config SGI_IP22
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config SGI_IP22
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bool "Support for SGI IP22 (Indy/Indigo2)"
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bool "Support for SGI IP22 (Indy/Indigo2)"
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select ARC
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select ARC
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@ -974,7 +969,7 @@ config MIPS_DISABLE_OBSOLETE_IDE
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config CPU_LITTLE_ENDIAN
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config CPU_LITTLE_ENDIAN
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bool "Generate little endian code"
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bool "Generate little endian code"
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default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || NEC_OSPREY || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
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default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
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default n if MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
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default n if MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
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help
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help
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Some MIPS machines can be configured for either little or big endian
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Some MIPS machines can be configured for either little or big endian
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@ -1091,11 +1086,6 @@ config ARC32
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config HAVE_STD_PC_SERIAL_PORT
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config HAVE_STD_PC_SERIAL_PORT
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bool
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bool
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config VR4181
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bool
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depends on NEC_OSPREY
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default y
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config ARC_CONSOLE
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config ARC_CONSOLE
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bool "ARC console support"
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bool "ARC console support"
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depends on SGI_IP22 || SNI_RM200_PCI
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depends on SGI_IP22 || SNI_RM200_PCI
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@ -229,15 +229,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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break;
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case PRID_IMP_VR41XX:
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case PRID_IMP_VR41XX:
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switch (c->processor_id & 0xf0) {
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switch (c->processor_id & 0xf0) {
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#ifndef CONFIG_VR4181
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case PRID_REV_VR4111:
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case PRID_REV_VR4111:
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c->cputype = CPU_VR4111;
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c->cputype = CPU_VR4111;
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break;
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break;
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#else
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case PRID_REV_VR4181:
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c->cputype = CPU_VR4181;
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break;
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#endif
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case PRID_REV_VR4121:
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case PRID_REV_VR4121:
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c->cputype = CPU_VR4121;
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c->cputype = CPU_VR4121;
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break;
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break;
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