mirror of https://gitee.com/openkylin/linux.git
net: mvpp2: handle too large value in mvpp2_rx_time_coal_set()
When configuring the MVPP2_ISR_RX_THRESHOLD_REG with the RX coalescing time threshold, we do not check for the maximum allowed value supported by the driver, which means we might overflow and use a bogus value. This commit adds a check for this situation, and if a value higher than what is supported by the hardware is provided, then we use the maximum value supported by the hardware. In order to achieve this in a way that avoids overflow and rounding errors, we introduce two utility functions mvpp2_usec_to_cycles() and cycles_to_usec(). Many thanks to Russell King for suggesting this implementation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -154,6 +154,7 @@
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/* Interrupt Cause and Mask registers */
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#define MVPP2_ISR_RX_THRESHOLD_REG(rxq) (0x5200 + 4 * (rxq))
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#define MVPP2_MAX_ISR_RX_THRESHOLD 0xfffff0
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#define MVPP2_ISR_RXQ_GROUP_REG(rxq) (0x5400 + 4 * (rxq))
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#define MVPP2_ISR_ENABLE_REG(port) (0x5420 + 4 * (port))
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#define MVPP2_ISR_ENABLE_INTERRUPT(mask) ((mask) & 0xffff)
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@ -4389,13 +4390,39 @@ static void mvpp2_rx_pkts_coal_set(struct mvpp2_port *port,
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rxq->pkts_coal);
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}
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static u32 mvpp2_usec_to_cycles(u32 usec, unsigned long clk_hz)
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{
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u64 tmp = (u64)clk_hz * usec;
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do_div(tmp, USEC_PER_SEC);
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return tmp > U32_MAX ? U32_MAX : tmp;
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}
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static u32 mvpp2_cycles_to_usec(u32 cycles, unsigned long clk_hz)
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{
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u64 tmp = (u64)cycles * USEC_PER_SEC;
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do_div(tmp, clk_hz);
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return tmp > U32_MAX ? U32_MAX : tmp;
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}
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/* Set the time delay in usec before Rx interrupt */
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static void mvpp2_rx_time_coal_set(struct mvpp2_port *port,
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struct mvpp2_rx_queue *rxq)
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{
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u32 val;
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unsigned long freq = port->priv->tclk;
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u32 val = mvpp2_usec_to_cycles(rxq->time_coal, freq);
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if (val > MVPP2_MAX_ISR_RX_THRESHOLD) {
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rxq->time_coal =
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mvpp2_cycles_to_usec(MVPP2_MAX_ISR_RX_THRESHOLD, freq);
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/* re-evaluate to get actual register value */
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val = mvpp2_usec_to_cycles(rxq->time_coal, freq);
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}
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val = (port->priv->tclk / USEC_PER_SEC) * rxq->time_coal;
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mvpp2_write(port->priv, MVPP2_ISR_RX_THRESHOLD_REG(rxq->id), val);
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}
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