mirror of https://gitee.com/openkylin/linux.git
ASoC: fsi: add master clock control functions
Current FSI driver required set_rate() platform callback function to set audio clock if it was master mode, because it seemed that CPG/FSI-DIV clocks calculation depend on platform/board/cpu. But it was calculable regardless of platform. This patch supports audio clock calculation method, but the sampling rate under 32kHz is not supported at this point. Old type set_rate() is still supported now, but it will be deleted on next version Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
parent
80b4addc9c
commit
ab6f6d8521
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@ -26,6 +26,7 @@
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* A: inversion
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* B: format mode
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* C: chip specific
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* D: clock selecter if master mode
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*/
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/* A: clock inversion */
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@ -44,6 +45,11 @@
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#define SH_FSI_OPTION_MASK 0x00000F00
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#define SH_FSI_ENABLE_STREAM_MODE (1 << 8) /* for 16bit data */
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/* D: clock selecter if master mode */
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#define SH_FSI_CLK_MASK 0x0000F000
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#define SH_FSI_CLK_EXTERNAL (1 << 12)
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#define SH_FSI_CLK_CPG (2 << 12) /* FSIxCK + FSI-DIV */
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/*
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* set_rate return value
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*
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@ -21,6 +21,7 @@
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <sound/soc.h>
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#include <sound/pcm_params.h>
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#include <sound/sh_fsi.h>
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/* PortA/PortB register */
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@ -187,6 +188,14 @@ typedef int (*set_rate_func)(struct device *dev, int rate, int enable);
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* --> go to codecs
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*/
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/*
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* FSI clock
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*
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* FSIxCLK [CPG] (ick) -------> |
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* |-> FSI_DIV (div)-> FSI2
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* FSIxCK [external] (xck) ---> |
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*/
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/*
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* struct
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*/
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@ -227,6 +236,20 @@ struct fsi_stream {
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dma_addr_t dma;
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};
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struct fsi_clk {
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/* see [FSI clock] */
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struct clk *own;
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struct clk *xck;
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struct clk *ick;
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struct clk *div;
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int (*set_rate)(struct device *dev,
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struct fsi_priv *fsi,
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unsigned long rate);
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unsigned long rate;
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unsigned int count;
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};
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struct fsi_priv {
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void __iomem *base;
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struct fsi_master *master;
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@ -235,6 +258,8 @@ struct fsi_priv {
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struct fsi_stream playback;
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struct fsi_stream capture;
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struct fsi_clk clock;
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u32 fmt;
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int chan_num:16;
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@ -716,14 +741,335 @@ static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
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/*
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* clock function
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*/
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static int fsi_clk_init(struct device *dev,
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struct fsi_priv *fsi,
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int xck,
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int ick,
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int div,
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int (*set_rate)(struct device *dev,
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struct fsi_priv *fsi,
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unsigned long rate))
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{
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struct fsi_clk *clock = &fsi->clock;
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int is_porta = fsi_is_port_a(fsi);
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clock->xck = NULL;
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clock->ick = NULL;
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clock->div = NULL;
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clock->rate = 0;
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clock->count = 0;
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clock->set_rate = set_rate;
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clock->own = devm_clk_get(dev, NULL);
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if (IS_ERR(clock->own))
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return -EINVAL;
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/* external clock */
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if (xck) {
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clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb");
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if (IS_ERR(clock->xck)) {
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dev_err(dev, "can't get xck clock\n");
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return -EINVAL;
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}
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if (clock->xck == clock->own) {
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dev_err(dev, "cpu doesn't support xck clock\n");
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return -EINVAL;
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}
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}
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/* FSIACLK/FSIBCLK */
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if (ick) {
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clock->ick = devm_clk_get(dev, is_porta ? "icka" : "ickb");
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if (IS_ERR(clock->ick)) {
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dev_err(dev, "can't get ick clock\n");
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return -EINVAL;
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}
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if (clock->ick == clock->own) {
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dev_err(dev, "cpu doesn't support ick clock\n");
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return -EINVAL;
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}
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}
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/* FSI-DIV */
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if (div) {
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clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb");
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if (IS_ERR(clock->div)) {
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dev_err(dev, "can't get div clock\n");
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return -EINVAL;
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}
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if (clock->div == clock->own) {
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dev_err(dev, "cpu doens't support div clock\n");
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return -EINVAL;
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}
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}
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return 0;
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}
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#define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0)
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static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate)
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{
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fsi->clock.rate = rate;
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}
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static int fsi_clk_is_valid(struct fsi_priv *fsi)
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{
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return fsi->clock.set_rate &&
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fsi->clock.rate;
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}
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static int fsi_clk_enable(struct device *dev,
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struct fsi_priv *fsi,
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unsigned long rate)
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{
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struct fsi_clk *clock = &fsi->clock;
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int ret = -EINVAL;
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if (!fsi_clk_is_valid(fsi))
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return ret;
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if (0 == clock->count) {
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ret = clock->set_rate(dev, fsi, rate);
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if (ret < 0) {
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fsi_clk_invalid(fsi);
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return ret;
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}
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if (clock->xck)
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clk_enable(clock->xck);
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if (clock->ick)
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clk_enable(clock->ick);
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if (clock->div)
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clk_enable(clock->div);
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clock->count++;
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}
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return ret;
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}
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static int fsi_clk_disable(struct device *dev,
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struct fsi_priv *fsi)
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{
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struct fsi_clk *clock = &fsi->clock;
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if (!fsi_clk_is_valid(fsi))
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return -EINVAL;
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if (1 == clock->count--) {
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if (clock->xck)
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clk_disable(clock->xck);
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if (clock->ick)
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clk_disable(clock->ick);
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if (clock->div)
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clk_disable(clock->div);
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}
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return 0;
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}
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static int fsi_clk_set_ackbpf(struct device *dev,
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struct fsi_priv *fsi,
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int ackmd, int bpfmd)
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{
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u32 data = 0;
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/* check ackmd/bpfmd relationship */
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if (bpfmd > ackmd) {
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dev_err(dev, "unsupported rate (%d/%d)\n", ackmd, bpfmd);
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return -EINVAL;
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}
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/* ACKMD */
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switch (ackmd) {
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case 512:
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data |= (0x0 << 12);
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break;
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case 256:
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data |= (0x1 << 12);
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break;
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case 128:
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data |= (0x2 << 12);
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break;
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case 64:
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data |= (0x3 << 12);
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break;
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case 32:
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data |= (0x4 << 12);
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break;
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default:
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dev_err(dev, "unsupported ackmd (%d)\n", ackmd);
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return -EINVAL;
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}
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/* BPFMD */
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switch (bpfmd) {
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case 32:
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data |= (0x0 << 8);
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break;
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case 64:
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data |= (0x1 << 8);
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break;
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case 128:
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data |= (0x2 << 8);
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break;
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case 256:
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data |= (0x3 << 8);
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break;
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case 512:
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data |= (0x4 << 8);
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break;
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case 16:
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data |= (0x7 << 8);
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break;
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default:
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dev_err(dev, "unsupported bpfmd (%d)\n", bpfmd);
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return -EINVAL;
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}
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dev_dbg(dev, "ACKMD/BPFMD = %d/%d\n", ackmd, bpfmd);
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fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
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udelay(10);
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return 0;
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}
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static int fsi_clk_set_rate_external(struct device *dev,
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struct fsi_priv *fsi,
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unsigned long rate)
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{
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struct clk *xck = fsi->clock.xck;
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struct clk *ick = fsi->clock.ick;
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unsigned long xrate;
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int ackmd, bpfmd;
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int ret = 0;
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/* check clock rate */
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xrate = clk_get_rate(xck);
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if (xrate % rate) {
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dev_err(dev, "unsupported clock rate\n");
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return -EINVAL;
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}
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clk_set_parent(ick, xck);
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clk_set_rate(ick, xrate);
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bpfmd = fsi->chan_num * 32;
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ackmd = xrate / rate;
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dev_dbg(dev, "external/rate = %ld/%ld\n", xrate, rate);
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ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
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if (ret < 0)
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dev_err(dev, "%s failed", __func__);
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return ret;
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}
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static int fsi_clk_set_rate_cpg(struct device *dev,
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struct fsi_priv *fsi,
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unsigned long rate)
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{
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struct clk *ick = fsi->clock.ick;
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struct clk *div = fsi->clock.div;
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unsigned long target = 0; /* 12288000 or 11289600 */
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unsigned long actual, cout;
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unsigned long diff, min;
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unsigned long best_cout, best_act;
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int adj;
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int ackmd, bpfmd;
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int ret = -EINVAL;
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if (!(12288000 % rate))
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target = 12288000;
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if (!(11289600 % rate))
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target = 11289600;
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if (!target) {
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dev_err(dev, "unsupported rate\n");
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return ret;
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}
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bpfmd = fsi->chan_num * 32;
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ackmd = target / rate;
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ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
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if (ret < 0) {
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dev_err(dev, "%s failed", __func__);
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return ret;
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}
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/*
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* The clock flow is
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*
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* [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec]
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*
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* But, it needs to find best match of CPG and FSI_DIV
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* combination, since it is difficult to generate correct
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* frequency of audio clock from ick clock only.
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* Because ick is created from its parent clock.
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*
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* target = rate x [512/256/128/64]fs
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* cout = round(target x adjustment)
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* actual = cout / adjustment (by FSI-DIV) ~= target
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* audio = actual
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*/
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min = ~0;
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best_cout = 0;
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best_act = 0;
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for (adj = 1; adj < 0xffff; adj++) {
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cout = target * adj;
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if (cout > 100000000) /* max clock = 100MHz */
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break;
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/* cout/actual audio clock */
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cout = clk_round_rate(ick, cout);
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actual = cout / adj;
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/* find best frequency */
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diff = abs(actual - target);
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if (diff < min) {
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min = diff;
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best_cout = cout;
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best_act = actual;
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}
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}
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ret = clk_set_rate(ick, best_cout);
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if (ret < 0) {
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dev_err(dev, "ick clock failed\n");
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return -EIO;
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}
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ret = clk_set_rate(div, clk_round_rate(div, best_act));
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if (ret < 0) {
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dev_err(dev, "div clock failed\n");
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return -EIO;
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}
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dev_dbg(dev, "ick/div = %ld/%ld\n",
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clk_get_rate(ick), clk_get_rate(div));
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return ret;
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}
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static int fsi_set_master_clk(struct device *dev, struct fsi_priv *fsi,
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long rate, int enable)
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{
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set_rate_func set_rate = fsi_get_info_set_rate(fsi);
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int ret;
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if (!set_rate)
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return 0;
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/*
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* CAUTION
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*
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* set_rate will be deleted
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*/
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if (!set_rate) {
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if (enable)
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return fsi_clk_enable(dev, fsi, rate);
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else
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return fsi_clk_disable(dev, fsi);
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}
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ret = set_rate(dev, rate, enable);
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if (ret < 0) /* error */
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@ -1355,6 +1701,7 @@ static int fsi_dai_startup(struct snd_pcm_substream *substream,
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{
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struct fsi_priv *fsi = fsi_get_priv(substream);
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fsi_clk_invalid(fsi);
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fsi->rate = 0;
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return 0;
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@ -1365,6 +1712,7 @@ static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
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{
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struct fsi_priv *fsi = fsi_get_priv(substream);
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fsi_clk_invalid(fsi);
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fsi->rate = 0;
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}
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@ -1446,9 +1794,25 @@ static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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return -EINVAL;
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}
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if (fsi_is_clk_master(fsi) && !set_rate) {
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dev_err(dai->dev, "platform doesn't have set_rate\n");
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return -EINVAL;
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if (fsi_is_clk_master(fsi)) {
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/*
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* CAUTION
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*
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* set_rate will be deleted
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*/
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if (set_rate)
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dev_warn(dai->dev, "set_rate will be removed soon\n");
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switch (flags & SH_FSI_CLK_MASK) {
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case SH_FSI_CLK_EXTERNAL:
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fsi_clk_init(dai->dev, fsi, 1, 1, 0,
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fsi_clk_set_rate_external);
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break;
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case SH_FSI_CLK_CPG:
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fsi_clk_init(dai->dev, fsi, 0, 1, 1,
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fsi_clk_set_rate_cpg);
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break;
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}
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}
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/* set format */
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{
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struct fsi_priv *fsi = fsi_get_priv(substream);
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if (fsi_is_clk_master(fsi))
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if (fsi_is_clk_master(fsi)) {
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fsi->rate = params_rate(params);
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fsi_clk_valid(fsi, fsi->rate);
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}
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return 0;
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}
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