openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

SoCFPGA DTS update for v4.5, part 2 

- clean up mcvevk dts file, replace space with tab
 - Disable SDMMC node in base socfpga.dtsi file
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWd6LmAAoJEBmUBAuBoyj07VkQAJ3wcDok3sF+dFAQRDSJ7zJN
 ZBkWa12MYmkCSpb2QXwP8kCjgLH9Xs1BQJy/HR9M2b8obnUe6nUeluvkdjzI1KN3
 4CCmfOoO6uHeG90j4zYi4A3DWKjbAODNva8qe6jQrBheBCVq8jgsfdNNxojiDnL6
 b2SSmQcqfcboxXMa5NxwMDYr0V9wVfWguiEO5ZhABADZhBL1hc0kS7QTHpGS9FiA
 rHUF2lOyb6dnj++JLyVnqSMgHHCFPPm1l2DKFXfp14jhLk2LTTPFmciaH0RUklnf
 Csq94ev6iQLqGIqTNkDwyShhxI2CctBYeMhnxQe1ozxgZHprZDXU/TTNcDW2u/YN
 tvn62a/eZEVrO+J2tqbCYK2Bjx3b3eTz18dN7KGn9EgA8i+b8S8bO62kypTLa6UM
 KVC4wjH8+AWavl92sroNp/gsW/QVrMlHMz4K/cJWglQGufe5gA1v01TU7YhvHWNR
 GBMwvbg1pyz7ZmcZQaVfOZlitWTxyqi9oDH6vMw6XPBrr+7Cb0wiSWAh/A1p59Bk
 4X36w52kpn2SGbJDQNgaueAQSqaNlu8JB70j7GoWVJZnNZHEzg6YDDHcxjbKf/N+
 lFSVspqNAMWSjqctJbO7CW4jMqo/2+/q+6o1D4sJvNTz/QGNfXFj8t5gD45CbQVp
 BUqrClNJC6Rx/G/Y4XG7
 =VS3e
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_dts_for_v4.5_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

SoCFPGA DTS update for v4.5, part 2
- clean up mcvevk dts file, replace space with tab
- Disable SDMMC node in base socfpga.dtsi file

* tag 'socfpga_dts_for_v4.5_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: dts: Enable MMC support at correct place in the DT
  ARM: socfpga: Repair incorrectly applied MCV patch

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-12-22 13:18:44 -08:00
parent 84658cbde8 91f69147d6
commit ab7f0bbba4
7 changed files with 60 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/socfpga.dtsi
View File

@ -677,6 +677,7 @@ mmc: dwmmc0@ff704000 {
#size-cells = <0>; #size-cells = <0>;
clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>; clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>;
clock-names = "biu", "ciu"; clock-names = "biu", "ciu";
status = "disabled";
}; };
ocram: sram@ffff0000 { ocram: sram@ffff0000 {

1
arch/arm/boot/dts/socfpga_arria5_socdk.dts
View File

@ -79,6 +79,7 @@ rtc@68 {
&mmc0 { &mmc0 {
vmmc-supply = <&regulator_3_3v>; vmmc-supply = <&regulator_3_3v>;
vqmmc-supply = <&regulator_3_3v>; vqmmc-supply = <&regulator_3_3v>;
status = "okay";
}; };
&usb1 { &usb1 {

1
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
View File

@ -100,6 +100,7 @@ adxl345: adxl345@0 {
&mmc0 { &mmc0 {
vmmc-supply = <&regulator_3_3v>; vmmc-supply = <&regulator_3_3v>;
vqmmc-supply = <&regulator_3_3v>; vqmmc-supply = <&regulator_3_3v>;
status = "okay";
}; };
&uart0 { &uart0 {

19
arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
View File

@ -18,16 +18,17 @@
#include "socfpga_cyclone5.dtsi" #include "socfpga_cyclone5.dtsi"
/ { / {
model = "DENX MCV"; model = "DENX MCV";
compatible = "altr,socfpga-cyclone5", "altr,socfpga"; compatible = "altr,socfpga-cyclone5", "altr,socfpga";
memory { memory {
name = "memory"; name = "memory";
device_type = "memory"; device_type = "memory";
reg = <0x0 0x40000000>; /* 1 GiB */ reg = <0x0 0x40000000>; /* 1 GiB */
}; };
}; };
&mmc0 { /* On-SoM eMMC */ &mmc0 { /* On-SoM eMMC */
bus-width = <8>; bus-width = <8>;
status = "okay";
}; };

90
arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
View File

@ -18,77 +18,77 @@
#include "socfpga_cyclone5_mcv.dtsi" #include "socfpga_cyclone5_mcv.dtsi"
/ { / {
model = "DENX MCV EVK"; model = "DENX MCV EVK";
compatible = "altr,socfpga-cyclone5", "altr,socfpga"; compatible = "altr,socfpga-cyclone5", "altr,socfpga";
aliases { aliases {
ethernet0 = &gmac0; ethernet0 = &gmac0;
stmpe-i2c0 = &stmpe1; stmpe-i2c0 = &stmpe1;
}; };
chosen { chosen {
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
}; };
&can0 { &can0 {
status = "okay"; status = "okay";
}; };
&can1 { &can1 {
status = "okay"; status = "okay";
}; };
&gmac0 { &gmac0 {
phy-mode = "rgmii"; phy-mode = "rgmii";
status = "okay"; status = "okay";
}; };
&gpio0 { /* GPIO 0 ... 28 */ &gpio0 { /* GPIO 0 ... 28 */
status = "okay"; status = "okay";
}; };
&gpio1 { /* GPIO 29 ... 57 */ &gpio1 { /* GPIO 29 ... 57 */
status = "okay"; status = "okay";
}; };
&gpio2 { /* GPIO 58..66 (HLGPI 0..13 at offset 13) */ &gpio2 { /* GPIO 58..66 (HLGPI 0..13 at offset 13) */
status = "okay"; status = "okay";
}; };
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
speed-mode = <0>; speed-mode = <0>;
stmpe1: stmpe811@41 { stmpe1: stmpe811@41 {
compatible = "st,stmpe811"; compatible = "st,stmpe811";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0x41>; reg = <0x41>;
id = <0>; id = <0>;
blocks = <0x5>; blocks = <0x5>;
irq-gpio = <&portb 28 0x4>; /* GPIO 57, trig. level HI */ irq-gpio = <&portb 28 0x4>; /* GPIO 57, trig. level HI */
stmpe_touchscreen { stmpe_touchscreen {
compatible = "st,stmpe-ts"; compatible = "st,stmpe-ts";
reg = <0>; reg = <0>;
ts,sample-time = <4>; ts,sample-time = <4>;
ts,mod-12b = <1>; ts,mod-12b = <1>;
ts,ref-sel = <0>; ts,ref-sel = <0>;
ts,adc-freq = <1>; ts,adc-freq = <1>;
ts,ave-ctrl = <1>; ts,ave-ctrl = <1>;
ts,touch-det-delay = <3>; ts,touch-det-delay = <3>;
ts,settling = <4>; ts,settling = <4>;
ts,fraction-z = <7>; ts,fraction-z = <7>;
ts,i-drive = <1>; ts,i-drive = <1>;
}; };
}; };
}; };
&uart0 { &uart0 {
status = "okay"; status = "okay";
}; };
&usb1 { &usb1 {
status = "okay"; status = "okay";
}; };

1
arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
View File

@ -84,6 +84,7 @@ &mmc0 {
cd-gpios = <&portb 18 0>; cd-gpios = <&portb 18 0>;
vmmc-supply = <&regulator_3_3v>; vmmc-supply = <&regulator_3_3v>;
vqmmc-supply = <&regulator_3_3v>; vqmmc-supply = <&regulator_3_3v>;
status = "okay";
}; };
&usb1 { &usb1 {

1
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
View File

@ -80,6 +80,7 @@ accel1: accelerometer@53 {
&mmc0 { &mmc0 {
vmmc-supply = <&regulator_3_3v>; vmmc-supply = <&regulator_3_3v>;
vqmmc-supply = <&regulator_3_3v>; vqmmc-supply = <&regulator_3_3v>;
status = "okay";
}; };
&usb1 { &usb1 {