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MIPS: math-emu: Always propagate sNaN payload in quieting 

Propagate sNaN payload in quieting in the legacy-NaN mode as well.  If
clearing the quiet bit would produce infinity, then set the next lower
trailing significand field bit, matching the SB-1 and BMIPS5000 hardware
implementations.  Some other MIPS FPU hardware implementations do
produce the default qNaN bit pattern instead.

This reverts some changes made for semantics preservation with commit
dc3ddf42 [MIPS: math-emu: Update sNaN quieting handlers], consequently
bringing back most of the semantics from before commit fdffbafb [Lots of
FPU bug fixes from Kjeld Borch Egevang.], except from the qNaN produced
in the infinity case.  Previously the default qNaN bit pattern was
produced in that case.

Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11483/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Maciej W. Rozycki 2015-11-13 00:48:48 +00:00 committed by Ralf Baechle
parent 2e5832ab58
commit acd9e20cd9
2 changed files with 12 additions and 6 deletions
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9
arch/mips/math-emu/ieee754dp.c
View File

@ -54,10 +54,13 @@ union ieee754dp __cold ieee754dp_nanxcpt(union ieee754dp r)
assert(ieee754dp_issnan(r));
ieee754_setcx(IEEE754_INVALID_OPERATION);
if (ieee754_csr.nan2008)
if (ieee754_csr.nan2008) {
DPMANT(r) |= DP_MBIT(DP_FBITS - 1);
else
r = ieee754dp_indef();
} else {
DPMANT(r) &= ~DP_MBIT(DP_FBITS - 1);
if (!ieee754dp_isnan(r))
DPMANT(r) |= DP_MBIT(DP_FBITS - 2);
}
return r;
}

9
arch/mips/math-emu/ieee754sp.c
View File

@ -54,10 +54,13 @@ union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp r)
assert(ieee754sp_issnan(r));
ieee754_setcx(IEEE754_INVALID_OPERATION);
if (ieee754_csr.nan2008)
if (ieee754_csr.nan2008) {
SPMANT(r) |= SP_MBIT(SP_FBITS - 1);
else
r = ieee754sp_indef();
} else {
SPMANT(r) &= ~SP_MBIT(SP_FBITS - 1);
if (!ieee754sp_isnan(r))
SPMANT(r) |= SP_MBIT(SP_FBITS - 2);
}
return r;
}