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drm/amd/powerplay: add smc msg for NB P-State switch 

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
This commit is contained in:
Rex Zhu 2015-11-19 13:47:36 +08:00 committed by Alex Deucher
parent 73c9f22288
commit aceae1bfd9
2 changed files with 9 additions and 0 deletions
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1
drivers/gpu/drm/amd/powerplay/inc/cz_ppsmc.h
View File

@ -164,6 +164,7 @@ enum DPM_ARRAY {
#define PPSMC_MSG_SetLoggerAddressHigh ((uint16_t) 0x26C)
#define PPSMC_MSG_SetLoggerAddressLow ((uint16_t) 0x26D)
#define PPSMC_MSG_SetWatermarkFrequency ((uint16_t) 0x26E)
#define PPSMC_MSG_SetDisplaySizePowerParams ((uint16_t) 0x26F)
/* REMOVE LATER*/
#define PPSMC_MSG_DPM_ForceState ((uint16_t) 0x104)

8
drivers/gpu/drm/amd/powerplay/inc/smu8_fusion.h
View File

@ -48,6 +48,14 @@ struct SMU8_Port80MonitorTable {
uint8_t EnableDramShadow;
};
/* Display specific power management parameters */
#define PWRMGT_SEPARATION_TIME_SHIFT 0
#define PWRMGT_SEPARATION_TIME_MASK 0xFFFF
#define PWRMGT_DISABLE_CPU_CSTATES_SHIFT 16
#define PWRMGT_DISABLE_CPU_CSTATES_MASK 0x1
#define PWRMGT_DISABLE_CPU_PSTATES_SHIFT 24
#define PWRMGT_DISABLE_CPU_PSTATES_MASK 0x1
/* Clock Table Definitions */
#define NUM_SCLK_LEVELS 8
#define NUM_LCLK_LEVELS 8