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staging: pi433: fix CamelCase for fifo variables 

Fixes checkpatch warnings:

  CHECK: Avoid CamelCase: <fifoEmpty>
  CHECK: Avoid CamelCase: <fifoFillCondition>
  CHECK: Avoid CamelCase: <fifoFull>
  CHECK: Avoid CamelCase: <fifoLevel>
  CHECK: Avoid CamelCase: <fifoLevelBelowThreshold>
  CHECK: Avoid CamelCase: <fifoNotEmpty>
  CHECK: Avoid CamelCase: <fifoOverrun>

Signed-off-by: Valentin Vidic <Valentin.Vidic@CARNet.hr>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Valentin Vidic 2017-12-19 17:02:22 +01:00 committed by Greg Kroah-Hartman
parent dd1114693b
commit acf71f8dfc
4 changed files with 34 additions and 34 deletions
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4
drivers/staging/pi433/Documentation/pi433.txt
View File

@ -110,9 +110,9 @@ rf params:
ramp12 - amp ramps up in 12us
ramp10 - amp ramps up in 10us
tx_start_condition
fifoLevel - transmission starts, if fifo is filled to
fifo_level - transmission starts, if fifo is filled to
threshold level
fifoNotEmpty - transmission starts, as soon as there is one
fifo_not_empty - transmission starts, as soon as there is one
byte in internal fifo
repetitions
This gives the option, to send a telegram multiple times. Default: 1

46
drivers/staging/pi433/rf69.c
View File

@ -505,24 +505,24 @@ int rf69_set_dio_mapping(struct spi_device *spi, u8 DIONumber, u8 value)
bool rf69_get_flag(struct spi_device *spi, enum flag flag)
{
switch (flag) {
case modeSwitchCompleted: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
case readyToReceive: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
case readyToSend: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TX_READY);
case pllLocked: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_PLL_LOCK);
case rssiExceededThreshold: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI);
case timeout: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TIMEOUT);
case automode: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_AUTOMODE);
case syncAddressMatch: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
case fifoFull: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_FULL);
/* case fifoNotEmpty: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY); */
case fifoEmpty: return !(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
case fifoLevelBelowThreshold: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_LEVEL);
case fifoOverrun: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_OVERRUN);
case packetSent: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PACKET_SENT);
case payloadReady: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY);
case crcOk: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_CRC_OK);
case batteryLow: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_LOW_BAT);
default: return false;
case modeSwitchCompleted: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
case readyToReceive: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
case readyToSend: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TX_READY);
case pllLocked: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_PLL_LOCK);
case rssiExceededThreshold: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI);
case timeout: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TIMEOUT);
case automode: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_AUTOMODE);
case syncAddressMatch: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
case fifo_full: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_FULL);
/* case fifo_not_empty: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY); */
case fifo_empty: return !(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
case fifo_level_below_threshold: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_LEVEL);
case fifo_overrun: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_OVERRUN);
case packetSent: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PACKET_SENT);
case payloadReady: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY);
case crcOk: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_CRC_OK);
case batteryLow: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_LOW_BAT);
default: return false;
}
}
@ -531,7 +531,7 @@ int rf69_reset_flag(struct spi_device *spi, enum flag flag)
switch (flag) {
case rssiExceededThreshold: return rf69_write_reg(spi, REG_IRQFLAGS1, MASK_IRQFLAGS1_RSSI);
case syncAddressMatch: return rf69_write_reg(spi, REG_IRQFLAGS1, MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
case fifoOverrun: return rf69_write_reg(spi, REG_IRQFLAGS2, MASK_IRQFLAGS2_FIFO_OVERRUN);
case fifo_overrun: return rf69_write_reg(spi, REG_IRQFLAGS2, MASK_IRQFLAGS2_FIFO_OVERRUN);
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@ -589,9 +589,9 @@ int rf69_disable_sync(struct spi_device *spi)
return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
}
int rf69_set_fifo_fill_condition(struct spi_device *spi, enum fifoFillCondition fifoFillCondition)
int rf69_set_fifo_fill_condition(struct spi_device *spi, enum fifo_fill_condition fifo_fill_condition)
{
switch (fifoFillCondition) {
switch (fifo_fill_condition) {
case always: return rf69_set_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
case afterSyncInterrupt: return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
default:
@ -696,8 +696,8 @@ int rf69_set_broadcast_address(struct spi_device *spi, u8 broadcastAddress)
int rf69_set_tx_start_condition(struct spi_device *spi, enum txStartCondition txStartCondition)
{
switch (txStartCondition) {
case fifoLevel: return rf69_clear_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
case fifoNotEmpty: return rf69_set_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
case fifo_level: return rf69_clear_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
case fifo_not_empty: return rf69_set_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;

2
drivers/staging/pi433/rf69.h
View File

@ -56,7 +56,7 @@ int rf69_set_rssi_timeout(struct spi_device *spi, u8 timeout);
int rf69_set_preamble_length(struct spi_device *spi, u16 preambleLength);
int rf69_enable_sync(struct spi_device *spi);
int rf69_disable_sync(struct spi_device *spi);
int rf69_set_fifo_fill_condition(struct spi_device *spi, enum fifoFillCondition fifoFillCondition);
int rf69_set_fifo_fill_condition(struct spi_device *spi, enum fifo_fill_condition fifo_fill_condition);
int rf69_set_sync_size(struct spi_device *spi, u8 sync_size);
int rf69_set_sync_tolerance(struct spi_device *spi, u8 syncTolerance);
int rf69_set_sync_values(struct spi_device *spi, u8 syncValues[8]);

16
drivers/staging/pi433/rf69_enum.h
View File

@ -130,18 +130,18 @@ enum flag {
timeout,
automode,
syncAddressMatch,
fifoFull,
// fifoNotEmpty, collision with next enum; replaced by following enum...
fifoEmpty,
fifoLevelBelowThreshold,
fifoOverrun,
fifo_full,
// fifo_not_empty, collision with next enum; replaced by following enum...
fifo_empty,
fifo_level_below_threshold,
fifo_overrun,
packetSent,
payloadReady,
crcOk,
batteryLow
};
enum fifoFillCondition {
enum fifo_fill_condition {
afterSyncInterrupt,
always
};
@ -152,8 +152,8 @@ enum packetFormat {
};
enum txStartCondition {
fifoLevel,
fifoNotEmpty
fifo_level,
fifo_not_empty
};
enum addressFiltering {