mirror of https://gitee.com/openkylin/linux.git
PCI: designware-ep: Fix find_first_zero_bit() usage
find_first_zero_bit()'s parameter 'size' is defined in bits,
not in bytes.
find_first_zero_bit() is called with size in bytes rather than bits,
which thus defines a too low upper limit, causing
dw_pcie_ep_inbound_atu() to assign iatu index #4 to both bar 4
and bar 5, which makes bar 5 overwrite the settings set by bar 4.
Since the sizes of the bitmaps are known, dynamically allocate the
bitmaps, and use the correct size when calling find_first_zero_bit().
Additionally, make sure that ep->num_ob_windows and ep->num_ib_windows,
which are obtained from device tree, are smaller than the maximum number
of iATUs (MAX_IATU_IN/MAX_IATU_OUT).
Fixes: f8aed6ec62
("PCI: dwc: designware: Add EP mode support")
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
parent
1291a0d504
commit
ad4a5becc6
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@ -70,8 +70,7 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, enum pci_barno bar,
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u32 free_win;
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struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
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free_win = find_first_zero_bit(&ep->ib_window_map,
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sizeof(ep->ib_window_map));
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free_win = find_first_zero_bit(ep->ib_window_map, ep->num_ib_windows);
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if (free_win >= ep->num_ib_windows) {
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dev_err(pci->dev, "no free inbound window\n");
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return -EINVAL;
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@ -85,7 +84,7 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, enum pci_barno bar,
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}
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ep->bar_to_atu[bar] = free_win;
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set_bit(free_win, &ep->ib_window_map);
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set_bit(free_win, ep->ib_window_map);
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return 0;
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}
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@ -96,8 +95,7 @@ static int dw_pcie_ep_outbound_atu(struct dw_pcie_ep *ep, phys_addr_t phys_addr,
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u32 free_win;
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struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
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free_win = find_first_zero_bit(&ep->ob_window_map,
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sizeof(ep->ob_window_map));
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free_win = find_first_zero_bit(ep->ob_window_map, ep->num_ob_windows);
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if (free_win >= ep->num_ob_windows) {
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dev_err(pci->dev, "no free outbound window\n");
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return -EINVAL;
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@ -106,7 +104,7 @@ static int dw_pcie_ep_outbound_atu(struct dw_pcie_ep *ep, phys_addr_t phys_addr,
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dw_pcie_prog_outbound_atu(pci, free_win, PCIE_ATU_TYPE_MEM,
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phys_addr, pci_addr, size);
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set_bit(free_win, &ep->ob_window_map);
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set_bit(free_win, ep->ob_window_map);
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ep->outbound_addr[free_win] = phys_addr;
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return 0;
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@ -121,7 +119,7 @@ static void dw_pcie_ep_clear_bar(struct pci_epc *epc, enum pci_barno bar)
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dw_pcie_ep_reset_bar(pci, bar);
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dw_pcie_disable_atu(pci, atu_index, DW_PCIE_REGION_INBOUND);
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clear_bit(atu_index, &ep->ib_window_map);
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clear_bit(atu_index, ep->ib_window_map);
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}
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static int dw_pcie_ep_set_bar(struct pci_epc *epc, enum pci_barno bar,
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@ -175,7 +173,7 @@ static void dw_pcie_ep_unmap_addr(struct pci_epc *epc, phys_addr_t addr)
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return;
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dw_pcie_disable_atu(pci, atu_index, DW_PCIE_REGION_OUTBOUND);
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clear_bit(atu_index, &ep->ob_window_map);
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clear_bit(atu_index, ep->ob_window_map);
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}
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static int dw_pcie_ep_map_addr(struct pci_epc *epc, phys_addr_t addr,
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@ -298,12 +296,32 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
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dev_err(dev, "unable to read *num-ib-windows* property\n");
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return ret;
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}
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if (ep->num_ib_windows > MAX_IATU_IN) {
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dev_err(dev, "invalid *num-ib-windows*\n");
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return -EINVAL;
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}
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ret = of_property_read_u32(np, "num-ob-windows", &ep->num_ob_windows);
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if (ret < 0) {
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dev_err(dev, "unable to read *num-ob-windows* property\n");
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return ret;
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}
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if (ep->num_ob_windows > MAX_IATU_OUT) {
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dev_err(dev, "invalid *num-ob-windows*\n");
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return -EINVAL;
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}
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ep->ib_window_map = devm_kzalloc(dev, sizeof(long) *
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BITS_TO_LONGS(ep->num_ib_windows),
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GFP_KERNEL);
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if (!ep->ib_window_map)
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return -ENOMEM;
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ep->ob_window_map = devm_kzalloc(dev, sizeof(long) *
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BITS_TO_LONGS(ep->num_ob_windows),
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GFP_KERNEL);
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if (!ep->ob_window_map)
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return -ENOMEM;
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addr = devm_kzalloc(dev, sizeof(phys_addr_t) * ep->num_ob_windows,
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GFP_KERNEL);
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@ -113,6 +113,10 @@
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#define MAX_MSI_IRQS 32
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#define MAX_MSI_CTRLS (MAX_MSI_IRQS / 32)
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/* Maximum number of inbound/outbound iATUs */
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#define MAX_IATU_IN 256
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#define MAX_IATU_OUT 256
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struct pcie_port;
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struct dw_pcie;
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struct dw_pcie_ep;
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@ -192,8 +196,8 @@ struct dw_pcie_ep {
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size_t page_size;
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u8 bar_to_atu[6];
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phys_addr_t *outbound_addr;
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unsigned long ib_window_map;
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unsigned long ob_window_map;
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unsigned long *ib_window_map;
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unsigned long *ob_window_map;
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u32 num_ib_windows;
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u32 num_ob_windows;
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};
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