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drm/amd/display: add vbios table check for enabling dp ss 

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2018-07-18 15:25:34 -04:00 committed by Alex Deucher
parent 3e27e10e2e
commit ad830e7ab1
4 changed files with 8 additions and 1 deletions
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1
drivers/gpu/drm/amd/display/dc/core/dc_link.c
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@ -1038,6 +1038,7 @@ static bool construct(
link->link_index = init_params->link_index;
link->link_id = bios->funcs->get_connector_id(bios, init_params->connector_index);
link->dp_ss_off = !!dc_ctx->dc_bios->integrated_info->dp_ss_control;;
if (link->link_id.type != OBJECT_TYPE_CONNECTOR) {
dm_error("%s: Invalid Connector ObjectID from Adapter Service for connector index:%d! type %d expected %d\n",

5
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
View File

@ -953,7 +953,10 @@ enum link_training_result dc_link_dp_perform_link_training(
* LINK_SPREAD_05_DOWNSPREAD_30KHZ :
* LINK_SPREAD_DISABLED;
*/
lt_settings.link_settings.link_spread = LINK_SPREAD_05_DOWNSPREAD_30KHZ;
if (link->dp_ss_off)
lt_settings.link_settings.link_spread = LINK_SPREAD_DISABLED;
else
lt_settings.link_settings.link_spread = LINK_SPREAD_05_DOWNSPREAD_30KHZ;
/* 1. set link rate, lane count and spread*/
dpcd_set_link_settings(link, &lt_settings);

1
drivers/gpu/drm/amd/display/dc/dc_link.h
View File

@ -73,6 +73,7 @@ struct dc_link {
enum dc_irq_source irq_source_hpd;
enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */
bool is_hpd_filter_disabled;
bool dp_ss_off;
/* caps is the same as reported_link_cap. link_traing use
* reported_link_cap. Will clean up. TODO

2
drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
View File

@ -395,6 +395,8 @@ struct integrated_info {
struct i2c_reg_info dp3_ext_hdmi_reg_settings[9];
unsigned char dp3_ext_hdmi_6g_reg_num;
struct i2c_reg_info dp3_ext_hdmi_6g_reg_settings[3];
/* V11 */
uint32_t dp_ss_control;
};
/**