mirror of https://gitee.com/openkylin/linux.git
sh: Finish the sh64 migration off of ARCH_USES_GETTIMEOFFSET.
This adds sh_tmu support to the SH-5 subtypes, which subsequently allows us to kill off time_64.c and use the now generic time_32.c. As a bonus, SH-5 now supports highres timers and tickless for the first time. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
parent
c2ecb4c4a7
commit
add47067a8
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@ -141,10 +141,6 @@ config ARCH_NO_VIRT_TO_BUS
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config ARCH_HAS_DEFAULT_IDLE
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def_bool y
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config ARCH_USES_GETTIMEOFFSET
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def_bool y
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depends on SUPERH64
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config IO_TRAPPED
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bool
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@ -190,6 +186,7 @@ config CPU_SH4AL_DSP
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config CPU_SH5
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bool
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select CPU_HAS_FPU
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select SYS_SUPPORTS_TMU
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config CPU_SHX2
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bool
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@ -2,7 +2,7 @@ extra-y := head_64.o init_task.o vmlinux.lds
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obj-y := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \
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ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \
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syscalls_64.o time_64.o topology.o traps.o traps_64.o
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syscalls_64.o time_32.o topology.o traps.o traps_64.o
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obj-y += cpu/ timers/
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obj-$(CONFIG_VSYSCALL) += vsyscall/
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@ -13,6 +13,7 @@
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#include <linux/serial_sci.h>
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#include <linux/io.h>
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#include <linux/mm.h>
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#include <linux/sh_timer.h>
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#include <asm/addrspace.h>
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static struct plat_sci_port sci_platform_data[] = {
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@ -64,6 +65,110 @@ static struct platform_device rtc_device = {
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.resource = rtc_resources,
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};
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#define TMU_BLOCK_OFF 0x01020000
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#define TMU_BASE PHYS_PERIPHERAL_BLOCK + TMU_BLOCK_OFF
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#define TMU0_BASE (TMU_BASE + 0x8 + (0xc * 0x0))
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#define TMU1_BASE (TMU_BASE + 0x8 + (0xc * 0x1))
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#define TMU2_BASE (TMU_BASE + 0x8 + (0xc * 0x2))
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static struct sh_timer_config tmu0_platform_data = {
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.name = "TMU0",
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.channel_offset = 0x04,
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.timer_bit = 0,
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.clk = "module_clk",
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.clockevent_rating = 200,
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};
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static struct resource tmu0_resources[] = {
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[0] = {
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.name = "TMU0",
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.start = TMU0_BASE,
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.end = TMU0_BASE + 0xc - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_TUNI0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device tmu0_device = {
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.name = "sh_tmu",
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.id = 0,
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.dev = {
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.platform_data = &tmu0_platform_data,
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},
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.resource = tmu0_resources,
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.num_resources = ARRAY_SIZE(tmu0_resources),
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};
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static struct sh_timer_config tmu1_platform_data = {
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.name = "TMU1",
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.channel_offset = 0x10,
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.timer_bit = 1,
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.clk = "module_clk",
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.clocksource_rating = 200,
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};
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static struct resource tmu1_resources[] = {
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[0] = {
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.name = "TMU1",
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.start = TMU1_BASE,
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.end = TMU1_BASE + 0xc - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_TUNI1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device tmu1_device = {
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.name = "sh_tmu",
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.id = 1,
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.dev = {
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.platform_data = &tmu1_platform_data,
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},
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.resource = tmu1_resources,
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.num_resources = ARRAY_SIZE(tmu1_resources),
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};
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static struct sh_timer_config tmu2_platform_data = {
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.name = "TMU2",
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.channel_offset = 0x1c,
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.timer_bit = 2,
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.clk = "module_clk",
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};
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static struct resource tmu2_resources[] = {
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[0] = {
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.name = "TMU2",
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.start = TMU2_BASE,
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.end = TMU2_BASE + 0xc - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_TUNI2,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device tmu2_device = {
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.name = "sh_tmu",
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.id = 2,
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.dev = {
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.platform_data = &tmu2_platform_data,
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},
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.resource = tmu2_resources,
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.num_resources = ARRAY_SIZE(tmu2_resources),
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};
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static struct platform_device *sh5_early_devices[] __initdata = {
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&tmu0_device,
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&tmu1_device,
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&tmu2_device,
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};
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static struct platform_device *sh5_devices[] __initdata = {
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&sci_device,
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&rtc_device,
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@ -71,7 +176,20 @@ static struct platform_device *sh5_devices[] __initdata = {
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static int __init sh5_devices_setup(void)
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{
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int ret;
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ret = platform_add_devices(sh5_early_devices,
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ARRAY_SIZE(sh5_early_devices));
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if (unlikely(ret != 0))
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return ret;
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return platform_add_devices(sh5_devices,
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ARRAY_SIZE(sh5_devices));
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}
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__initcall(sh5_devices_setup);
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void __init plat_early_device_setup(void)
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{
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early_platform_add_devices(sh5_early_devices,
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ARRAY_SIZE(sh5_early_devices));
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}
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@ -1,264 +0,0 @@
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/*
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* arch/sh/kernel/time_64.c
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003 - 2007 Paul Mundt
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* Copyright (C) 2003 Richard Curnow
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*
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* Original TMU/RTC code taken from sh version.
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* Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
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* Some code taken from i386 version.
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* Copyright (C) 1991, 1992, 1995 Linus Torvalds
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/errno.h>
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#include <linux/rwsem.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/profile.h>
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#include <linux/smp.h>
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#include <linux/module.h>
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#include <linux/bcd.h>
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#include <linux/timex.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <cpu/registers.h> /* required by inline __asm__ stmt. */
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#include <cpu/irq.h>
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#include <asm/addrspace.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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#include <asm/delay.h>
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#include <asm/clock.h>
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#define TMU_TOCR_INIT 0x00
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#define TMU0_TCR_INIT 0x0020
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#define TMU_TSTR_INIT 1
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#define TMU_TSTR_OFF 0
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/* Time Management Unit */
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#define TMU_BLOCK_OFF 0x01020000
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#define TMU_BASE PHYS_PERIPHERAL_BLOCK + TMU_BLOCK_OFF
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#define TMU0_BASE tmu_base + 0x8 + (0xc * 0x0)
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#define TMU1_BASE tmu_base + 0x8 + (0xc * 0x1)
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#define TMU2_BASE tmu_base + 0x8 + (0xc * 0x2)
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#define TMU_TOCR tmu_base+0x0 /* Byte access */
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#define TMU_TSTR tmu_base+0x4 /* Byte access */
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#define TMU0_TCOR TMU0_BASE+0x0 /* Long access */
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#define TMU0_TCNT TMU0_BASE+0x4 /* Long access */
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#define TMU0_TCR TMU0_BASE+0x8 /* Word access */
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#define TICK_SIZE (tick_nsec / 1000)
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static unsigned long tmu_base;
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/* Variables to allow interpolation of time of day to resolution better than a
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* jiffy. */
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/* This is effectively protected by xtime_lock */
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static unsigned long ctc_last_interrupt;
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static unsigned long long usecs_per_jiffy = 1000000/HZ; /* Approximation */
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#define CTC_JIFFY_SCALE_SHIFT 40
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/* 2**CTC_JIFFY_SCALE_SHIFT / ctc_ticks_per_jiffy */
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static unsigned long long scaled_recip_ctc_ticks_per_jiffy;
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/* Estimate number of microseconds that have elapsed since the last timer tick,
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by scaling the delta that has occurred in the CTC register.
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WARNING WARNING WARNING : This algorithm relies on the CTC decrementing at
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the CPU clock rate. If the CPU sleeps, the CTC stops counting. Bear this
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in mind if enabling SLEEP_WORKS in process.c. In that case, this algorithm
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probably needs to use TMU.TCNT0 instead. This will work even if the CPU is
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sleeping, though will be coarser.
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FIXME : What if usecs_per_tick is moving around too much, e.g. if an adjtime
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is running or if the freq or tick arguments of adjtimex are modified after
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we have calibrated the scaling factor? This will result in either a jump at
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the end of a tick period, or a wrap backwards at the start of the next one,
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if the application is reading the time of day often enough. I think we
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ought to do better than this. For this reason, usecs_per_jiffy is left
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separated out in the calculation below. This allows some future hook into
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the adjtime-related stuff in kernel/timer.c to remove this hazard.
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*/
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static unsigned long usecs_since_tick(void)
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{
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unsigned long long current_ctc;
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long ctc_ticks_since_interrupt;
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unsigned long long ull_ctc_ticks_since_interrupt;
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unsigned long result;
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unsigned long long mul1_out;
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unsigned long long mul1_out_high;
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unsigned long long mul2_out_low, mul2_out_high;
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/* Read CTC register */
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asm ("getcon cr62, %0" : "=r" (current_ctc));
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/* Note, the CTC counts down on each CPU clock, not up.
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Note(2), use long type to get correct wraparound arithmetic when
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the counter crosses zero. */
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ctc_ticks_since_interrupt = (long) ctc_last_interrupt - (long) current_ctc;
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ull_ctc_ticks_since_interrupt = (unsigned long long) ctc_ticks_since_interrupt;
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/* Inline assembly to do 32x32x32->64 multiplier */
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asm volatile ("mulu.l %1, %2, %0" :
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"=r" (mul1_out) :
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"r" (ull_ctc_ticks_since_interrupt), "r" (usecs_per_jiffy));
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mul1_out_high = mul1_out >> 32;
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asm volatile ("mulu.l %1, %2, %0" :
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"=r" (mul2_out_low) :
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"r" (mul1_out), "r" (scaled_recip_ctc_ticks_per_jiffy));
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#if 1
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asm volatile ("mulu.l %1, %2, %0" :
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"=r" (mul2_out_high) :
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"r" (mul1_out_high), "r" (scaled_recip_ctc_ticks_per_jiffy));
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#endif
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result = (unsigned long) (((mul2_out_high << 32) + mul2_out_low) >> CTC_JIFFY_SCALE_SHIFT);
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return result;
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}
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u32 arch_gettimeoffset(void)
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{
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return usecs_since_tick() * 1000;
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}
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/* Dummy RTC ops */
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static void null_rtc_get_time(struct timespec *tv)
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{
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tv->tv_sec = mktime(2000, 1, 1, 0, 0, 0);
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tv->tv_nsec = 0;
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}
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static int null_rtc_set_time(const time_t secs)
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{
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return 0;
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}
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void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
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int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
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/* last time the RTC clock got updated */
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static long last_rtc_update;
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/*
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* timer_interrupt() needs to keep up the real-time clock,
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* as well as call the "do_timer()" routine every clocktick
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*/
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static inline void do_timer_interrupt(void)
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{
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unsigned long long current_ctc;
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if (current->pid)
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profile_tick(CPU_PROFILING);
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/*
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* Here we are in the timer irq handler. We just have irqs locally
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* disabled but we don't know if the timer_bh is running on the other
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* CPU. We need to avoid to SMP race with it. NOTE: we don' t need
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* the irq version of write_lock because as just said we have irq
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* locally disabled. -arca
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*/
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write_seqlock(&xtime_lock);
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asm ("getcon cr62, %0" : "=r" (current_ctc));
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ctc_last_interrupt = (unsigned long) current_ctc;
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do_timer(1);
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/*
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* If we have an externally synchronized Linux clock, then update
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* RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
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* called as close as possible to 500 ms before the new second starts.
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*/
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if (ntp_synced() &&
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xtime.tv_sec > last_rtc_update + 660 &&
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(xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
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(xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
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if (rtc_sh_set_time(xtime.tv_sec) == 0)
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last_rtc_update = xtime.tv_sec;
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else
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/* do it again in 60 s */
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last_rtc_update = xtime.tv_sec - 600;
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}
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write_sequnlock(&xtime_lock);
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#ifndef CONFIG_SMP
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update_process_times(user_mode(get_irq_regs()));
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#endif
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}
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/*
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* This is the same as the above, except we _also_ save the current
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* Time Stamp Counter value at the time of the timer interrupt, so that
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* we later on can estimate the time of day more exactly.
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*/
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static irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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unsigned long timer_status;
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/* Clear UNF bit */
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timer_status = ctrl_inw(TMU0_TCR);
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timer_status &= ~0x100;
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ctrl_outw(timer_status, TMU0_TCR);
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do_timer_interrupt();
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return IRQ_HANDLED;
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}
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static struct irqaction irq0 = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED,
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.name = "timer",
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};
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void __init time_init(void)
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{
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unsigned long interval;
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struct clk *clk;
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tmu_base = (unsigned long)ioremap_nocache(TMU_BASE, 1024);
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if (!tmu_base) {
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panic("Unable to remap TMU\n");
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}
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clk = clk_get(NULL, "cpu_clk");
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scaled_recip_ctc_ticks_per_jiffy = ((1ULL << CTC_JIFFY_SCALE_SHIFT) /
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(unsigned long long)(clk_get_rate(clk) / HZ));
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rtc_sh_get_time(&xtime);
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setup_irq(TIMER_IRQ, &irq0);
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clk = clk_get(NULL, "module_clk");
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interval = (clk_get_rate(clk)/(HZ*4));
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printk("Interval = %ld\n", interval);
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/* Start TMU0 */
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ctrl_outb(TMU_TSTR_OFF, TMU_TSTR);
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ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
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ctrl_outw(TMU0_TCR_INIT, TMU0_TCR);
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ctrl_outl(interval, TMU0_TCOR);
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ctrl_outl(interval, TMU0_TCNT);
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ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
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}
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