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mips: bmips: bcm6358: populate device tree nodes 

- Rename periph_clk to periph_osc.
- Rename clkctl to periph_clk.
- Move syscon-reboot to subnode.
- Add watchdog.
- Add SPI controller.
- Add USBH PHY.
- Add cfi-flash.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Álvaro Fernández Rojas 2021-03-14 17:43:48 +01:00 committed by Thomas Bogendoerfer
parent 7ea4293616
commit add9562320
1 changed files with 72 additions and 11 deletions
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83
arch/mips/boot/dts/brcm/bcm6358.dtsi
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@ -28,16 +28,19 @@ cpu@1 {
};
clocks {
periph_clk: periph-clk {
periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "periph";
};
};
aliases {
pflash = &pflash;
serial0 = &uart0;
serial1 = &uart1;
spi0 = &lsspi;
};
cpu_intc: interrupt-controller {
@ -55,23 +58,22 @@ ubus {
compatible = "simple-bus";
ranges;
clkctl: clock-controller@fffe0004 {
periph_clk: clock-controller@fffe0004 {
compatible = "brcm,bcm6358-clocks";
reg = <0xfffe0004 0x4>;
#clock-cells = <1>;
};
periph_cntl: syscon@fffe0008 {
pll_cntl: syscon@fffe0008 {
compatible = "syscon";
reg = <0xfffe0008 0x4>;
native-endian;
};
reboot: syscon-reboot@fffe0008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x0>;
mask = <0x1>;
reboot {
compatible = "syscon-reboot";
offset = <0x0>;
mask = <0x1>;
};
};
periph_intc: interrupt-controller@fffe000c {
@ -92,6 +94,16 @@ periph_rst: reset-controller@fffe0034 {
#reset-cells = <1>;
};
wdt: watchdog@fffe005c {
compatible = "brcm,bcm7038-wdt";
reg = <0xfffe005c 0xc>;
clocks = <&periph_osc>;
clock-names = "refclk";
timeout-sec = <30>;
};
leds0: led-controller@fffe00d0 {
#address-cells = <1>;
#size-cells = <0>;
@ -108,7 +120,7 @@ uart0: serial@fffe0100 {
interrupt-parent = <&periph_intc>;
interrupts = <2>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
@ -121,18 +133,41 @@ uart1: serial@fffe0120 {
interrupt-parent = <&periph_intc>;
interrupts = <3>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
lsspi: spi@fffe0800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0xfffe0800 0x70c>;
interrupt-parent = <&periph_intc>;
interrupts = <1>;
clocks = <&periph_clk BCM6358_CLK_SPI>;
clock-names = "spi";
resets = <&periph_rst BCM6358_RST_SPI>;
reset-names = "spi";
status = "disabled";
};
ehci: usb@fffe1300 {
compatible = "brcm,bcm6358-ehci", "generic-ehci";
reg = <0xfffe1300 0x100>;
big-endian;
interrupt-parent = <&periph_intc>;
interrupts = <10>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
@ -141,9 +176,35 @@ ohci: usb@fffe1400 {
reg = <0xfffe1400 0x100>;
big-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <5>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
usbh: usb-phy@fffe1500 {
compatible = "brcm,bcm6358-usbh-phy";
reg = <0xfffe1500 0x38>;
#phy-cells = <1>;
resets = <&periph_rst BCM6358_RST_USBH>;
reset-names = "usbh";
status = "disabled";
};
};
pflash: nor@1e000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x1e000000 0x2000000>;
bank-width = <2>;
status = "disabled";
};
};