mvebu dt for 4.13 (part 1)

- Add Linksys WRT3200ACM (Rango) support
 - Add PWM properties for gpio on Aramda XP and 38x
 - A couple of minor updates for the 98dx3236 and 98dx4251
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Merge tag 'mvebu-dt-4.13-1' of git://git.infradead.org/linux-mvebu into next/dt

mvebu dt for 4.13 (part 1)

- Add Linksys WRT3200ACM (Rango) support
- Add PWM properties for gpio on Aramda XP and 38x
- A couple of minor updates for the 98dx3236 and 98dx4251

* tag 'mvebu-dt-4.13-1' of git://git.infradead.org/linux-mvebu:
  ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM
  ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango)
  ARM: dts: armada-385-linksys: fixup button node names
  ARM: dts: armada-385-linksys: group pins in pinctrl
  ARM: dts: armada-385-linksys: partition layout is board specific
  ARM: dts: armada-385-linksys: use binary unit prefixes
  ARM: dts: armada-385-linksys: drop legacy DSA bindings
  ARM: dts: armada-385-linksys: usb3 label cleanup
  ARM: dts: armada-385-linksys: bm pools by label order
  ARM: dts: armada-385-linksys: drop redundant properties in dependants
  ARM: dts: armada-385-linksys: flatten dependants
  ARM: dts: armada-385-linksys: label nodes
  ARM: dts: armada-385-linksys: flatten dtsi
  ARM: dts: mvebu: disable the rtc on 98dx3236 SoC
  ARM: dts: mvebu: add missing interrupt to 98dx4251 switch
  ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan
  ARM: dts: mvebu: Add PWM properties for armada-38x
  ARM: dts: mvebu: Add PWM properties to .dtsi files

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2017-06-18 22:58:00 -07:00
commit ae1d266305
15 changed files with 759 additions and 454 deletions

View File

@ -1008,6 +1008,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-385-db-ap.dtb \
armada-385-linksys-caiman.dtb \
armada-385-linksys-cobra.dtb \
armada-385-linksys-rango.dtb \
armada-385-linksys-shelby.dtb \
armada-385-synology-ds116.dtb \
armada-385-turris-omnia.dtb \

View File

@ -137,29 +137,38 @@ L2: l2-cache@8000 {
};
gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18100 0x40>, <0x181c0 0x08>;
reg-names = "gpio", "pwm";
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <82>, <83>, <84>, <85>;
clocks = <&coreclk 0>;
};
gpio1: gpio@18140 {
compatible = "marvell,orion-gpio";
reg = <0x18140 0x40>;
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18140 0x40>, <0x181c8 0x08>;
reg-names = "gpio", "pwm";
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <87>, <88>, <89>, <90>;
clocks = <&coreclk 0>;
};
gpio2: gpio@18180 {
compatible = "marvell,orion-gpio";
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18180 0x40>;
ngpios = <2>;
gpio-controller;

View File

@ -44,71 +44,128 @@ / {
model = "Linksys WRT1200AC";
compatible = "linksys,caiman", "linksys,armada385", "marvell,armada385",
"marvell,armada380";
};
soc {
internal-regs{
i2c@11000 {
pca9635@68 {
#address-cells = <1>;
#size-cells = <0>;
wan_amber@0 {
label = "caiman:amber:wan";
reg = <0x0>;
};
wan_white@1 {
label = "caiman:white:wan";
reg = <0x1>;
};
wlan_2g@2 {
label = "caiman:white:wlan_2g";
reg = <0x2>;
};
wlan_5g@3 {
label = "caiman:white:wlan_5g";
reg = <0x3>;
};
usb2@5 {
label = "caiman:white:usb2";
reg = <0x5>;
};
usb3_1@6 {
label = "caiman:white:usb3_1";
reg = <0x6>;
};
usb3_2@7 {
label = "caiman:white:usb3_2";
reg = <0x7>;
};
wps_white@8 {
label = "caiman:white:wps";
reg = <0x8>;
};
wps_amber@9 {
label = "caiman:amber:wps";
reg = <0x9>;
};
};
};
};
&expander0 {
wan_amber@0 {
label = "caiman:amber:wan";
reg = <0x0>;
};
gpio-leds {
power {
label = "caiman:white:power";
};
wan_white@1 {
label = "caiman:white:wan";
reg = <0x1>;
};
sata {
label = "caiman:white:sata";
};
wlan_2g@2 {
label = "caiman:white:wlan_2g";
reg = <0x2>;
};
wlan_5g@3 {
label = "caiman:white:wlan_5g";
reg = <0x3>;
};
usb2@5 {
label = "caiman:white:usb2";
reg = <0x5>;
};
usb3_1@6 {
label = "caiman:white:usb3_1";
reg = <0x6>;
};
usb3_2@7 {
label = "caiman:white:usb3_2";
reg = <0x7>;
};
wps_white@8 {
label = "caiman:white:wps";
reg = <0x8>;
};
wps_amber@9 {
label = "caiman:amber:wps";
reg = <0x9>;
};
};
&gpio_leds {
power {
label = "caiman:white:power";
};
sata {
label = "caiman:white:sata";
};
};
&nand {
/* 128MiB */
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x200000 0x40000>; /* 256KiB */
};
partition@140000 {
label = "s_env";
reg = <0x240000 0x40000>; /* 256KiB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x2200000>; /* 34MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MiB */
};
partition@3800000 {
label = "rootfs2";
reg = <0x3800000 0x2200000>; /* 34MiB */
};
/*
* 38MiB, last MiB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x280000 0x680000>; /* 6.5MiB */
};
};

View File

@ -44,71 +44,128 @@ / {
model = "Linksys WRT1900ACv2";
compatible = "linksys,cobra", "linksys,armada385", "marvell,armada385",
"marvell,armada380";
};
soc {
internal-regs{
i2c@11000 {
pca9635@68 {
#address-cells = <1>;
#size-cells = <0>;
wan_amber@0 {
label = "cobra:amber:wan";
reg = <0x0>;
};
wan_white@1 {
label = "cobra:white:wan";
reg = <0x1>;
};
wlan_2g@2 {
label = "cobra:white:wlan_2g";
reg = <0x2>;
};
wlan_5g@3 {
label = "cobra:white:wlan_5g";
reg = <0x3>;
};
usb2@5 {
label = "cobra:white:usb2";
reg = <0x5>;
};
usb3_1@6 {
label = "cobra:white:usb3_1";
reg = <0x6>;
};
usb3_2@7 {
label = "cobra:white:usb3_2";
reg = <0x7>;
};
wps_white@8 {
label = "cobra:white:wps";
reg = <0x8>;
};
wps_amber@9 {
label = "cobra:amber:wps";
reg = <0x9>;
};
};
};
};
&expander0 {
wan_amber@0 {
label = "cobra:amber:wan";
reg = <0x0>;
};
gpio-leds {
power {
label = "cobra:white:power";
};
wan_white@1 {
label = "cobra:white:wan";
reg = <0x1>;
};
sata {
label = "cobra:white:sata";
};
wlan_2g@2 {
label = "cobra:white:wlan_2g";
reg = <0x2>;
};
wlan_5g@3 {
label = "cobra:white:wlan_5g";
reg = <0x3>;
};
usb2@5 {
label = "cobra:white:usb2";
reg = <0x5>;
};
usb3_1@6 {
label = "cobra:white:usb3_1";
reg = <0x6>;
};
usb3_2@7 {
label = "cobra:white:usb3_2";
reg = <0x7>;
};
wps_white@8 {
label = "cobra:white:wps";
reg = <0x8>;
};
wps_amber@9 {
label = "cobra:amber:wps";
reg = <0x9>;
};
};
&gpio_leds {
power {
label = "cobra:white:power";
};
sata {
label = "cobra:white:sata";
};
};
&nand {
/* 128MiB */
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x200000 0x40000>; /* 256KiB */
};
partition@140000 {
label = "s_env";
reg = <0x240000 0x40000>; /* 256KiB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x2200000>; /* 34MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MiB */
};
partition@3800000 {
label = "rootfs2";
reg = <0x3800000 0x2200000>; /* 34MiB */
};
/*
* 38MiB, last MiB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x280000 0x680000>; /* 6.5MiB */
};
};

View File

@ -0,0 +1,203 @@
/*
* Device Tree file for the Linksys WRT3200ACM (Rango)
*
* Copyright (C) 2016 Imre Kaloz <kaloz@openwrt.org>
*
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "armada-385-linksys.dtsi"
/ {
model = "Linksys WRT3200ACM";
compatible = "linksys,rango", "linksys,armada385", "marvell,armada385",
"marvell,armada380";
};
&expander0 {
wan_amber@0 {
label = "rango:amber:wan";
reg = <0x0>;
};
wan_white@1 {
label = "rango:white:wan";
reg = <0x1>;
};
usb2@5 {
label = "rango:white:usb2";
reg = <0x5>;
};
usb3_1@6 {
label = "rango:white:usb3_1";
reg = <0x6>;
};
usb3_2@7 {
label = "rango:white:usb3_2";
reg = <0x7>;
};
wps_white@8 {
label = "rango:white:wps";
reg = <0x8>;
};
wps_amber@9 {
label = "rango:amber:wps";
reg = <0x9>;
};
};
&gpio_leds {
power {
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
label = "rango:white:power";
};
sata {
gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
label = "rango:white:sata";
};
wlan_2g {
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
label = "rango:white:wlan_2g";
};
wlan_5g {
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
label = "rango:white:wlan_5g";
};
};
&gpio_leds_pins {
marvell,pins = "mpp21", "mpp45", "mpp46", "mpp56";
};
&nand {
/* AMD/Spansion S34ML02G2 256MiB, OEM Layout */
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@200000 {
label = "u_env";
reg = <0x200000 0x20000>; /* 128KiB */
};
partition@220000 {
label = "s_env";
reg = <0x220000 0x40000>; /* 256KiB */
};
partition@7e0000 {
label = "devinfo";
reg = <0x7e0000 0x40000>; /* 256KiB */
read-only;
};
partition@820000 {
label = "sysdiag";
reg = <0x820000 0x1e0000>; /* 1920KiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x5000000>; /* 80MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x4a00000>; /* 74MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@5a00000 {
label = "kernel2";
reg = <0x5a00000 0x5000000>; /* 80MiB */
};
partition@6000000 {
label = "rootfs2";
reg = <0x6000000 0x4a00000>; /* 74MiB */
};
/*
* 86MiB, last MiB is for the BBT, not writable
*/
partition@aa00000 {
label = "syscfg";
reg = <0xaa00000 0x5600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x260000 0x5c0000>; /* 5.75MiB */
};
};
&sdhci {
pinctrl-names = "default";
pinctrl-0 = <&sdhci_pins>;
no-1-8-v;
non-removable;
wp-inverted;
bus-width = <8>;
status = "okay";
};
&usb3_1_vbus {
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
};
&usb3_1_vbus_pins {
marvell,pins = "mpp44";
};

View File

@ -44,71 +44,128 @@ / {
model = "Linksys WRT1900ACS";
compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385",
"marvell,armada380";
};
soc {
internal-regs{
i2c@11000 {
pca9635@68 {
#address-cells = <1>;
#size-cells = <0>;
wan_amber@0 {
label = "shelby:amber:wan";
reg = <0x0>;
};
wan_white@1 {
label = "shelby:white:wan";
reg = <0x1>;
};
wlan_2g@2 {
label = "shelby:white:wlan_2g";
reg = <0x2>;
};
wlan_5g@3 {
label = "shelby:white:wlan_5g";
reg = <0x3>;
};
usb2@5 {
label = "shelby:white:usb2";
reg = <0x5>;
};
usb3_1@6 {
label = "shelby:white:usb3_1";
reg = <0x6>;
};
usb3_2@7 {
label = "shelby:white:usb3_2";
reg = <0x7>;
};
wps_white@8 {
label = "shelby:white:wps";
reg = <0x8>;
};
wps_amber@9 {
label = "shelby:amber:wps";
reg = <0x9>;
};
};
};
};
&expander0 {
wan_amber@0 {
label = "shelby:amber:wan";
reg = <0x0>;
};
gpio-leds {
power {
label = "shelby:white:power";
};
wan_white@1 {
label = "shelby:white:wan";
reg = <0x1>;
};
sata {
label = "shelby:white:sata";
};
wlan_2g@2 {
label = "shelby:white:wlan_2g";
reg = <0x2>;
};
wlan_5g@3 {
label = "shelby:white:wlan_5g";
reg = <0x3>;
};
usb2@5 {
label = "shelby:white:usb2";
reg = <0x5>;
};
usb3_1@6 {
label = "shelby:white:usb3_1";
reg = <0x6>;
};
usb3_2@7 {
label = "shelby:white:usb3_2";
reg = <0x7>;
};
wps_white@8 {
label = "shelby:white:wps";
reg = <0x8>;
};
wps_amber@9 {
label = "shelby:amber:wps";
reg = <0x9>;
};
};
&gpio_leds {
power {
label = "shelby:white:power";
};
sata {
label = "shelby:white:sata";
};
};
&nand {
/* 128MiB */
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x200000 0x40000>; /* 256KiB */
};
partition@140000 {
label = "s_env";
reg = <0x240000 0x40000>; /* 256KiB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x2200000>; /* 34MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MiB */
};
partition@3800000 {
label = "rootfs2";
reg = <0x3800000 0x2200000>; /* 34MiB */
};
/*
* 38MiB, last MiB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x280000 0x680000>; /* 6.5MiB */
};
};

View File

@ -52,7 +52,7 @@ chosen {
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
reg = <0x00000000 0x20000000>; /* 512 MiB */
};
soc {
@ -61,255 +61,45 @@ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs {
i2c@11000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
tmp421@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
pca9635@68 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nxp,pca9635";
reg = <0x68>;
};
};
/* J10: VCC, NC, RX, NC, TX, GND */
serial@12000 {
status = "okay";
};
ethernet@70000 {
status = "okay";
phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
ethernet@34000 {
status = "okay";
phy-mode = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <1>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
mdio@72004 {
status = "okay";
switch@0 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&eth2>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
sata@a8000 {
status = "okay";
};
bm@c8000 {
status = "okay";
};
/* USB part of the eSATA/USB 2.0 port */
usb@58000 {
status = "okay";
};
usb3@f8000 {
status = "okay";
usb-phy = <&usb3_phy>;
};
flash@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x200000 0x40000>; /* 256KB */
};
partition@140000 {
label = "s_env";
reg = <0x240000 0x40000>; /* 256KB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x2200000>; /* 34MB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MB */
};
partition@3800000 {
label = "rootfs2";
reg = <0x3800000 0x2200000>; /* 34MB */
};
/*
* 38MB, last MB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x280000 0x680000>; /* 6.5MB */
};
};
};
bm-bppi {
status = "okay";
};
pcie-controller {
status = "okay";
pcie@1,0 {
/* Marvell 88W8864, 5GHz-only */
status = "okay";
};
pcie@2,0 {
/* Marvell 88W8864, 2GHz-only */
status = "okay";
};
};
};
usb3_phy: usb3_phy {
usb3_1_phy: usb3_1-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_xhci0_vbus>;
vcc-supply = <&usb3_1_vbus>;
};
reg_xhci0_vbus: xhci0-vbus {
usb3_1_vbus: usb3_1-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&xhci0_vbus_pins>;
regulator-name = "xhci0-vbus";
pinctrl-0 = <&usb3_1_vbus_pins>;
regulator-name = "usb3_1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
};
gpio_keys {
gpio_keys: gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&keys_pin>;
pinctrl-0 = <&gpio_keys_pins>;
pinctrl-names = "default";
button@1 {
wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
};
button@2 {
reset {
label = "Factory Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
gpio_leds: gpio-leds {
compatible = "gpio-leds";
pinctrl-0 = <&power_led_pin &sata_led_pin>;
pinctrl-0 = <&gpio_leds_pins>;
pinctrl-names = "default";
power {
@ -323,21 +113,83 @@ sata {
linux,default-trigger = "disk-activity";
};
};
};
dsa@0 {
status = "disabled";
&ahci0 {
status = "okay";
};
compatible = "marvell,dsa";
#address-cells = <2>;
&bm {
status = "okay";
};
&bm_bppi {
status = "okay";
};
&eth0 {
status = "okay";
phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <1>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&eth2 {
status = "okay";
phy-mode = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
tmp421@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
expander0: pca9635@68 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nxp,pca9635";
reg = <0x68>;
};
};
dsa,ethernet = <&eth2>;
dsa,mii-bus = <&mdio>;
&nand {
/* 128MiB or 256MiB */
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
};
switch@0 {
&mdio {
status = "okay";
switch@0 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
port@0 {
reg = <0>;
@ -367,28 +219,45 @@ port@4 {
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&eth2>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
&pciec {
status = "okay";
};
&pcie1 {
/* Marvell 88W8864, 5GHz-only */
status = "okay";
};
&pcie2 {
/* Marvell 88W8864, 2GHz-only */
status = "okay";
};
&pinctrl {
keys_pin: keys-pin {
gpio_keys_pins: gpio-keys-pins {
/* mpp24: wps, mpp29: reset */
marvell,pins = "mpp24", "mpp29";
marvell,function = "gpio";
};
power_led_pin: power-led-pin {
marvell,pins = "mpp55";
gpio_leds_pins: gpio-leds-pins {
/* mpp54: sata, mpp55: power */
marvell,pins = "mpp54", "mpp55";
marvell,function = "gpio";
};
sata_led_pin: sata-led-pin {
marvell,pins = "mpp54";
marvell,function = "gpio";
};
xhci0_vbus_pins: xhci0-vbus-pins {
usb3_1_vbus_pins: usb3_1-vbus-pins {
marvell,pins = "mpp50";
marvell,function = "gpio";
};
@ -397,3 +266,18 @@ xhci0_vbus_pins: xhci0-vbus-pins {
&spi0 {
status = "disabled";
};
&uart0 {
/* J10: VCC, NC, RX, NC, TX, GND */
status = "okay";
};
&usb0 {
/* USB part of the eSATA/USB 2.0 port */
status = "okay";
};
&usb3_1 {
status = "okay";
usb-phy = <&usb3_1_phy>;
};

View File

@ -171,7 +171,7 @@ i2c@0 {
/* leds device (in STM32F0) at address 0x2b */
eeprom@54 {
compatible = "at,24c64";
compatible = "atmel,24c64";
reg = <0x54>;
/* The EEPROM contains data for bootloader.

View File

@ -312,31 +312,39 @@ sata3_pins: sata-pins-3 {
};
gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18100 0x40>, <0x181c0 0x08>;
reg-names = "gpio", "pwm";
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&coreclk 0>;
};
gpio1: gpio@18140 {
compatible = "marvell,orion-gpio";
reg = <0x18140 0x40>;
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18140 0x40>, <0x181c8 0x08>;
reg-names = "gpio", "pwm";
ngpios = <28>;
gpio-controller;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&coreclk 0>;
};
systemc: system-controller@18200 {

View File

@ -311,6 +311,10 @@ &mpic {
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
};
&rtc {
status = "disabled";
};
&timer {
compatible = "marvell,armada-xp-timer";
clocks = <&coreclk 2>, <&refclk>;

View File

@ -87,4 +87,5 @@ sdio_pins: sdio-pins {
&pp0 {
compatible = "marvell,prestera-98dx4251";
interrupts = <33>, <34>, <35>, <36>;
};

View File

@ -308,13 +308,11 @@ power {
};
};
gpio_fan {
pwm_fan {
/* SUNON HA4010V4-0000-C99 */
compatible = "gpio-fan";
gpios = <&gpio0 24 0>;
gpio-fan,speed-map = <0 0
4500 1>;
compatible = "pwm-fan";
pwms = <&gpio0 24 4000>;
};
dsa {

View File

@ -202,25 +202,33 @@ pcie5: pcie@5,0 {
internal-regs {
gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18100 0x40>, <0x181c0 0x08>;
reg-names = "gpio", "pwm";
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <82>, <83>, <84>, <85>;
clocks = <&coreclk 0>;
};
gpio1: gpio@18140 {
compatible = "marvell,orion-gpio";
reg = <0x18140 0x40>;
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18140 0x40>, <0x181c8 0x08>;
reg-names = "gpio", "pwm";
ngpios = <17>;
gpio-controller;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <87>, <88>, <89>;
clocks = <&coreclk 0>;
};
};
};

View File

@ -285,29 +285,38 @@ pcie9: pcie@9,0 {
internal-regs {
gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18100 0x40>, <0x181c0 0x08>;
reg-names = "gpio", "pwm";
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <82>, <83>, <84>, <85>;
clocks = <&coreclk 0>;
};
gpio1: gpio@18140 {
compatible = "marvell,orion-gpio";
reg = <0x18140 0x40>;
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18140 0x40>, <0x181c8 0x08>;
reg-names = "gpio", "pwm";
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <87>, <88>, <89>, <90>;
clocks = <&coreclk 0>;
};
gpio2: gpio@18180 {
compatible = "marvell,orion-gpio";
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18180 0x40>;
ngpios = <3>;
gpio-controller;

View File

@ -323,29 +323,38 @@ pcie10: pcie@10,0 {
internal-regs {
gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18100 0x40>, <0x181c0 0x08>;
reg-names = "gpio", "pwm";
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <82>, <83>, <84>, <85>;
clocks = <&coreclk 0>;
};
gpio1: gpio@18140 {
compatible = "marvell,orion-gpio";
reg = <0x18140 0x40>;
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18140 0x40>, <0x181c8 0x08>;
reg-names = "gpio", "pwm";
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <87>, <88>, <89>, <90>;
clocks = <&coreclk 0>;
};
gpio2: gpio@18180 {
compatible = "marvell,orion-gpio";
compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio";
reg = <0x18180 0x40>;
ngpios = <3>;
gpio-controller;