mirror of https://gitee.com/openkylin/linux.git
Blackfin: make EVT3->EVT5 lowering more robust wrt IPEND[4]
We handle many exceptions at EVT5 (hardware error level) so that we can catch exceptions in our exception handling code. Today - if the global interrupt enable bit (IPEND[4]) is set (interrupts disabled) our trap handling code goes into a infinite loop, since we need interrupts to be on to defer things to EVT5. Normal kernel code should not trigger this for any reason as IPEND[4] gets cleared early (when doing an interrupt context save) and the kernel stack there should be sane (or something much worse is happening in the system). But there have been a few times where this has happened, so this change makes sure we dump a proper crash message even when things have gone south. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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@ -50,6 +50,7 @@ struct blackfin_pda { /* Per-processor Data Area */
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unsigned long ex_optr;
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unsigned long ex_buf[4];
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unsigned long ex_imask; /* Saved imask from exception */
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unsigned long ex_ipend; /* Saved IPEND from exception */
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unsigned long *ex_stack; /* Exception stack space */
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#ifdef ANOMALY_05000261
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@ -145,6 +145,7 @@ int main(void)
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DEFINE(PDA_EXBUF, offsetof(struct blackfin_pda, ex_buf));
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DEFINE(PDA_EXIMASK, offsetof(struct blackfin_pda, ex_imask));
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DEFINE(PDA_EXSTACK, offsetof(struct blackfin_pda, ex_stack));
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DEFINE(PDA_EXIPEND, offsetof(struct blackfin_pda, ex_ipend));
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#ifdef ANOMALY_05000261
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DEFINE(PDA_LFRETX, offsetof(struct blackfin_pda, last_cplb_fault_retx));
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#endif
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@ -267,11 +267,6 @@ asmlinkage void trap_c(struct pt_regs *fp)
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* double faults if the stack has become corrupt
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*/
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#ifndef CONFIG_KGDB
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/* IPEND is skipped if KGDB isn't enabled (see entry code) */
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fp->ipend = bfin_read_IPEND();
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#endif
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/* trap_c() will be called for exceptions. During exceptions
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* processing, the pc value should be set with retx value.
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* With this change we can cleanup some code in signal.c- TODO
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@ -1116,10 +1111,16 @@ void show_regs(struct pt_regs *fp)
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verbose_printk(KERN_NOTICE "%s", linux_banner);
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verbose_printk(KERN_NOTICE "\nSEQUENCER STATUS:\t\t%s\n",
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print_tainted());
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verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n",
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(long)fp->seqstat, fp->ipend, fp->syscfg);
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verbose_printk(KERN_NOTICE "\nSEQUENCER STATUS:\t\t%s\n", print_tainted());
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verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx IMASK: %04lx SYSCFG: %04lx\n",
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(long)fp->seqstat, fp->ipend, cpu_pda[smp_processor_id()].ex_imask, fp->syscfg);
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if (fp->ipend & EVT_IRPTEN)
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verbose_printk(KERN_NOTICE " Global Interrupts Disabled (IPEND[4])\n");
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if (!(cpu_pda[smp_processor_id()].ex_imask & (EVT_IVG13 | EVT_IVG12 | EVT_IVG11 |
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EVT_IVG10 | EVT_IVG9 | EVT_IVG8 | EVT_IVG7 | EVT_IVTMR)))
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verbose_printk(KERN_NOTICE " Peripheral interrupts masked off\n");
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if (!(cpu_pda[smp_processor_id()].ex_imask & (EVT_IVG15 | EVT_IVG14)))
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verbose_printk(KERN_NOTICE " Kernel interrupts masked off\n");
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if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) {
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verbose_printk(KERN_NOTICE " HWERRCAUSE: 0x%lx\n",
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(fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14);
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@ -301,25 +301,31 @@ ENTRY(_ex_replaceable)
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nop;
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ENTRY(_ex_trap_c)
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/* The only thing that has been saved in this context is
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* (R7:6,P5:4), ASTAT & SP - don't use anything else
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*/
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GET_PDA(p5, r6);
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/* Make sure we are not in a double fault */
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p4.l = lo(IPEND);
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p4.h = hi(IPEND);
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r7 = [p4];
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CC = BITTST (r7, 5);
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if CC jump _double_fault;
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[p5 + PDA_EXIPEND] = r7;
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/* Call C code (trap_c) to handle the exception, which most
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* likely involves sending a signal to the current process.
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* To avoid double faults, lower our priority to IRQ5 first.
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*/
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P5.h = _exception_to_level5;
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P5.l = _exception_to_level5;
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r7.h = _exception_to_level5;
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r7.l = _exception_to_level5;
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p4.l = lo(EVT5);
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p4.h = hi(EVT5);
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[p4] = p5;
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[p4] = r7;
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csync;
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GET_PDA(p5, r6);
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#ifndef CONFIG_DEBUG_DOUBLEFAULT
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/*
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@ -349,8 +355,7 @@ ENTRY(_ex_trap_c)
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BITCLR(r6, SYSCFG_SSSTEP_P);
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SYSCFG = r6;
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/* Disable all interrupts, but make sure level 5 is enabled so
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* we can switch to that level. Save the old mask. */
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/* Save the current IMASK, since we change in order to jump to level 5 */
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cli r6;
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[p5 + PDA_EXIMASK] = r6;
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@ -358,9 +363,21 @@ ENTRY(_ex_trap_c)
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p4.h = hi(SAFE_USER_INSTRUCTION);
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retx = p4;
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/* Disable all interrupts, but make sure level 5 is enabled so
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* we can switch to that level.
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*/
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r6 = 0x3f;
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sti r6;
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/* In case interrupts are disabled IPEND[4] (global interrupt disable bit)
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* clear it (re-enabling interrupts again) by the special sequence of pushing
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* RETI onto the stack. This way we can lower ourselves to IVG5 even if the
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* exception was taken after the interrupt handler was called but before it
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* got a chance to enable global interrupts itself.
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*/
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[--sp] = reti;
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sp += 4;
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raise 5;
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jump.s _bfin_return_from_exception;
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ENDPROC(_ex_trap_c)
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@ -420,47 +437,52 @@ ENDPROC(_double_fault)
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ENTRY(_exception_to_level5)
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SAVE_ALL_SYS
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GET_PDA(p4, r7); /* Fetch current PDA */
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r6 = [p4 + PDA_RETX];
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GET_PDA(p5, r7); /* Fetch current PDA */
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r6 = [p5 + PDA_RETX];
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[sp + PT_PC] = r6;
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r6 = [p4 + PDA_SYSCFG];
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r6 = [p5 + PDA_SYSCFG];
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[sp + PT_SYSCFG] = r6;
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/* Restore interrupt mask. We haven't pushed RETI, so this
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* doesn't enable interrupts until we return from this handler. */
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r6 = [p4 + PDA_EXIMASK];
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sti r6;
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/* Restore the hardware error vector. */
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P5.h = _evt_ivhw;
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P5.l = _evt_ivhw;
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r7.h = _evt_ivhw;
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r7.l = _evt_ivhw;
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p4.l = lo(EVT5);
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p4.h = hi(EVT5);
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[p4] = p5;
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[p4] = r7;
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csync;
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p2.l = lo(IPEND);
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p2.h = hi(IPEND);
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csync;
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r0 = [p2]; /* Read current IPEND */
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[sp + PT_IPEND] = r0; /* Store IPEND */
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#ifdef CONFIG_DEBUG_DOUBLEFAULT
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/* Now that we have the hardware error vector programmed properly
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* we can re-enable interrupts (IPEND[4]), so if the _trap_c causes
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* another hardware error, we can catch it (self-nesting).
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*/
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[--sp] = reti;
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sp += 4;
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#endif
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r7 = [p5 + PDA_EXIPEND] /* Read the IPEND from the Exception state */
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[sp + PT_IPEND] = r7; /* Store IPEND onto the stack */
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r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
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SP += -12;
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call _trap_c;
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SP += 12;
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#ifdef CONFIG_DEBUG_DOUBLEFAULT
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/* Grab ILAT */
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p2.l = lo(ILAT);
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p2.h = hi(ILAT);
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r0 = [p2];
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r1 = 0x20; /* Did I just cause anther HW error? */
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r0 = r0 & r1;
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CC = R0 == R1;
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if CC JUMP _double_fault;
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#endif
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/* If interrupts were off during the exception (IPEND[4] = 1), turn them off
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* before we return.
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*/
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CC = BITTST(r7, EVT_IRPTEN_P)
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if !CC jump 1f;
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/* this will load a random value into the reti register - but that is OK,
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* since we do restore it to the correct value in the 'RESTORE_ALL_SYS' macro
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*/
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sp += -4;
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reti = [sp++];
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1:
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/* restore the interrupt mask (IMASK) */
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r6 = [p5 + PDA_EXIMASK];
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sti r6;
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call _ret_from_exception;
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RESTORE_ALL_SYS
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