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Staging: comedi: fix code warnings in s626.c
A patch for s626.c to fix some of the warnings reported by the checkpatch.pl tool, namely, -suspect code indent for conditional statements -please, no space before tabs Signed-off-by: John Sheehan <john.d.sheehan@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
John Sheehan
Greg Kroah-Hartman
parent
add74595e5
commit
ae6eb75c63
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@ -816,7 +816,7 @@ static int s626_attach(struct comedi_device *dev, struct comedi_devconfig *it)
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MC_ENABLE(P_MC2, MC2_UPLD_IIC);
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/* Invoke command upload */
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while ((RR7146(P_MC2) & MC2_UPLD_IIC) == 0)
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;
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;
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/* and wait for upload to complete. */
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/* Per SAA7146 data sheet, write to STATUS reg twice to
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@ -826,7 +826,7 @@ static int s626_attach(struct comedi_device *dev, struct comedi_devconfig *it)
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/* Write I2C control: reset error flags. */
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MC_ENABLE(P_MC2, MC2_UPLD_IIC); /* Invoke command upload */
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while (!MC_TEST(P_MC2, MC2_UPLD_IIC))
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;
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;
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/* and wait for upload to complete. */
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}
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@ -866,14 +866,14 @@ static int s626_attach(struct comedi_device *dev, struct comedi_devconfig *it)
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* not start up in a defined state after a PCI reset.
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*/
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/* PollList = EOPL; // Create a simple polling */
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/* // list for analog input */
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/* // channel 0. */
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/* PollList = EOPL; // Create a simple polling */
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/* // list for analog input */
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/* // channel 0. */
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/* ResetADC( dev, &PollList ); */
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/* s626_ai_rinsn(dev,dev->subdevices,NULL,data); //( &AdcData ); // */
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/* //Get initial ADC */
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/* //value. */
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/* //Get initial ADC */
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/* //value. */
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/* StartVal = data[0]; */
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@ -886,10 +886,10 @@ static int s626_attach(struct comedi_device *dev, struct comedi_devconfig *it)
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/* for ( index = 0; index < 500; index++ ) */
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/* { */
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/* s626_ai_rinsn(dev,dev->subdevices,NULL,data); */
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/* AdcData = data[0]; //ReadADC( &AdcData ); */
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/* if ( AdcData != StartVal ) */
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/* break; */
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/* s626_ai_rinsn(dev,dev->subdevices,NULL,data); */
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/* AdcData = data[0]; //ReadADC( &AdcData ); */
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/* if ( AdcData != StartVal ) */
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/* break; */
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/* } */
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/* end initADC */
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@ -1690,7 +1690,7 @@ static int s626_ai_insn_read(struct comedi_device *dev,
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/* Wait for ADC done. */
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while (!(RR7146(P_PSR) & PSR_GPIO2))
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;
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;
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/* Fetch ADC data. */
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if (n != 0)
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@ -1723,7 +1723,7 @@ static int s626_ai_insn_read(struct comedi_device *dev,
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/* Wait for ADC done. */
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while (!(RR7146(P_PSR) & PSR_GPIO2))
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;
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;
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/* Fetch ADC data from audio interface's input shift register. */
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@ -2564,11 +2564,11 @@ static uint32_t I2Chandshake(struct comedi_device *dev, uint32_t val)
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MC_ENABLE(P_MC2, MC2_UPLD_IIC);
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while (!MC_TEST(P_MC2, MC2_UPLD_IIC))
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;
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;
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/* Wait until I2C bus transfer is finished or an error occurs. */
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while ((RR7146(P_I2CCTRL) & (I2C_BUSY | I2C_ERR)) == I2C_BUSY)
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;
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;
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/* Return non-zero if I2C error occured. */
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return RR7146(P_I2CCTRL) & I2C_ERR;
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@ -2683,7 +2683,7 @@ static void SendDAC(struct comedi_device *dev, uint32_t val)
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* cleared when the transfer has finished.
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*/
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while ((RR7146(P_MC1) & MC1_A2OUT) != 0)
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;
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;
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/* START THE OUTPUT STREAM TO THE TARGET DAC -------------------- */
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@ -2701,7 +2701,7 @@ static void SendDAC(struct comedi_device *dev, uint32_t val)
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* to the output buffer register.
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*/
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while ((RR7146(P_SSR) & SSR_AF2_OUT) == 0)
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;
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;
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/* Set up to trap execution at slot 0 when the TSL sequencer cycles
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* back to slot 0 after executing the EOS in slot 5. Also,
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@ -2738,7 +2738,7 @@ static void SendDAC(struct comedi_device *dev, uint32_t val)
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* out/in on SD2 the 0x00 that is always referenced by slot 5.
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*/
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while ((RR7146(P_FB_BUFFER2) & 0xFF000000) != 0)
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;
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;
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}
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/* Either (1) we were too late setting the slot 0 trap; the TSL
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* sequencer restarted slot 0 before we could set the EOS trap flag,
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@ -2755,7 +2755,7 @@ static void SendDAC(struct comedi_device *dev, uint32_t val)
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* from 0x00 to 0xFF.
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*/
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while ((RR7146(P_FB_BUFFER2) & 0xFF000000) == 0)
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;
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;
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}
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static void WriteMISC2(struct comedi_device *dev, uint16_t NewImage)
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@ -2795,11 +2795,11 @@ static void DEBItransfer(struct comedi_device *dev)
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/* Wait for completion of upload from shadow RAM to DEBI control */
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/* register. */
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while (!MC_TEST(P_MC2, MC2_UPLD_DEBI))
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;
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;
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/* Wait until DEBI transfer is done. */
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while (RR7146(P_PSR) & PSR_DEBI_S)
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;
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;
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}
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/* Write a value to a gate array register. */
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@ -3157,7 +3157,7 @@ static void SetLatchSource(struct comedi_device *dev, struct enc_private *k,
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/*
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* static uint16_t GetLatchSource(struct comedi_device *dev, struct enc_private *k )
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* {
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* return ( DEBIread( dev, k->MyCRB) >> CRBBIT_LATCHSRC ) & 3;
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* return ( DEBIread( dev, k->MyCRB) >> CRBBIT_LATCHSRC ) & 3;
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* }
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*/
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