mirror of https://gitee.com/openkylin/linux.git
RDMA/hns: Optimize qp param setup flow
Encapsulate the qp param setup related code into set_qp_param(). Link: https://lore.kernel.org/r/1582526258-13825-6-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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24c22112b9
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ae85bf92ef
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@ -355,17 +355,17 @@ static void free_qpn(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp)
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hns_roce_bitmap_free_range(&qp_table->bitmap, hr_qp->qpn, 1, BITMAP_RR);
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}
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static int hns_roce_set_rq_size(struct hns_roce_dev *hr_dev,
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static int set_rq_size(struct hns_roce_dev *hr_dev,
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struct ib_qp_cap *cap, bool is_user, int has_rq,
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struct hns_roce_qp *hr_qp)
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{
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struct device *dev = hr_dev->dev;
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struct ib_device *ibdev = &hr_dev->ib_dev;
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u32 max_cnt;
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/* Check the validity of QP support capacity */
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if (cap->max_recv_wr > hr_dev->caps.max_wqes ||
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cap->max_recv_sge > hr_dev->caps.max_rq_sg) {
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dev_err(dev, "RQ WR or sge error!max_recv_wr=%d max_recv_sge=%d\n",
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ibdev_err(ibdev, "Failed to check max recv WR %d and SGE %d\n",
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cap->max_recv_wr, cap->max_recv_sge);
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return -EINVAL;
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}
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@ -378,7 +378,7 @@ static int hns_roce_set_rq_size(struct hns_roce_dev *hr_dev,
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cap->max_recv_sge = 0;
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} else {
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if (is_user && (!cap->max_recv_wr || !cap->max_recv_sge)) {
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dev_err(dev, "user space no need config max_recv_wr max_recv_sge\n");
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ibdev_err(ibdev, "Failed to check user max recv WR and SGE\n");
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return -EINVAL;
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}
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@ -390,7 +390,7 @@ static int hns_roce_set_rq_size(struct hns_roce_dev *hr_dev,
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hr_qp->rq.wqe_cnt = roundup_pow_of_two(max_cnt);
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if ((u32)hr_qp->rq.wqe_cnt > hr_dev->caps.max_wqes) {
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dev_err(dev, "while setting rq size, rq.wqe_cnt too large\n");
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ibdev_err(ibdev, "Failed to check RQ WQE count limit\n");
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return -EINVAL;
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}
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@ -421,12 +421,12 @@ static int check_sq_size_with_integrity(struct hns_roce_dev *hr_dev,
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/* Sanity check SQ size before proceeding */
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if (ucmd->log_sq_stride > max_sq_stride ||
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ucmd->log_sq_stride < HNS_ROCE_IB_MIN_SQ_STRIDE) {
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ibdev_err(&hr_dev->ib_dev, "check SQ size error!\n");
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ibdev_err(&hr_dev->ib_dev, "Failed to check SQ stride size\n");
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return -EINVAL;
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}
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if (cap->max_send_sge > hr_dev->caps.max_sq_sg) {
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ibdev_err(&hr_dev->ib_dev, "SQ sge error! max_send_sge=%d\n",
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ibdev_err(&hr_dev->ib_dev, "Failed to check SQ SGE size %d\n",
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cap->max_send_sge);
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return -EINVAL;
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}
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@ -434,9 +434,8 @@ static int check_sq_size_with_integrity(struct hns_roce_dev *hr_dev,
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return 0;
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}
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static int hns_roce_set_user_sq_size(struct hns_roce_dev *hr_dev,
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struct ib_qp_cap *cap,
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struct hns_roce_qp *hr_qp,
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static int set_user_sq_size(struct hns_roce_dev *hr_dev,
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struct ib_qp_cap *cap, struct hns_roce_qp *hr_qp,
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struct hns_roce_ib_create_qp *ucmd)
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{
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u32 ex_sge_num;
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@ -450,7 +449,7 @@ static int hns_roce_set_user_sq_size(struct hns_roce_dev *hr_dev,
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ret = check_sq_size_with_integrity(hr_dev, cap, ucmd);
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if (ret) {
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ibdev_err(&hr_dev->ib_dev, "Sanity check sq size failed\n");
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ibdev_err(&hr_dev->ib_dev, "Failed to check user SQ size limit\n");
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return ret;
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}
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@ -469,8 +468,8 @@ static int hns_roce_set_user_sq_size(struct hns_roce_dev *hr_dev,
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if (hr_qp->sq.max_gs > HNS_ROCE_SGE_IN_WQE &&
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hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08_A) {
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if (hr_qp->sge.sge_cnt > hr_dev->caps.max_extend_sg) {
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dev_err(hr_dev->dev,
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"The extended sge cnt error! sge_cnt=%d\n",
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ibdev_err(&hr_dev->ib_dev,
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"Failed to check extended SGE size limit %d\n",
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hr_qp->sge.sge_cnt);
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return -EINVAL;
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}
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@ -635,9 +634,8 @@ static int set_extend_sge_param(struct hns_roce_dev *hr_dev,
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return 0;
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}
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static int hns_roce_set_kernel_sq_size(struct hns_roce_dev *hr_dev,
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struct ib_qp_cap *cap,
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struct hns_roce_qp *hr_qp)
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static int set_kernel_sq_size(struct hns_roce_dev *hr_dev,
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struct ib_qp_cap *cap, struct hns_roce_qp *hr_qp)
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{
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struct device *dev = hr_dev->dev;
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u32 page_size;
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@ -896,6 +894,58 @@ static void free_qp_buf(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp)
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hr_qp->rq.wqe_cnt)
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free_rq_inline_buf(hr_qp);
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}
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static int set_qp_param(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp,
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struct ib_qp_init_attr *init_attr,
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struct ib_udata *udata,
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struct hns_roce_ib_create_qp *ucmd)
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{
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struct ib_device *ibdev = &hr_dev->ib_dev;
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int ret;
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hr_qp->ibqp.qp_type = init_attr->qp_type;
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if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
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hr_qp->sq_signal_bits = IB_SIGNAL_ALL_WR;
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else
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hr_qp->sq_signal_bits = IB_SIGNAL_REQ_WR;
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ret = set_rq_size(hr_dev, &init_attr->cap, udata,
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hns_roce_qp_has_rq(init_attr), hr_qp);
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if (ret) {
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ibdev_err(ibdev, "Failed to set user RQ size\n");
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return ret;
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}
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if (udata) {
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if (ib_copy_from_udata(ucmd, udata, sizeof(*ucmd))) {
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ibdev_err(ibdev, "Failed to copy QP ucmd\n");
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return -EFAULT;
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}
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ret = set_user_sq_size(hr_dev, &init_attr->cap, hr_qp, ucmd);
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if (ret)
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ibdev_err(ibdev, "Failed to set user SQ size\n");
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} else {
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if (init_attr->create_flags &
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IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) {
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ibdev_err(ibdev, "Failed to check multicast loopback\n");
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return -EINVAL;
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}
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if (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) {
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ibdev_err(ibdev, "Failed to check ipoib ud lso\n");
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return -EINVAL;
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}
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ret = set_kernel_sq_size(hr_dev, &init_attr->cap, hr_qp);
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if (ret)
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ibdev_err(ibdev, "Failed to set kernel SQ size\n");
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}
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return ret;
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}
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static int hns_roce_create_qp_common(struct hns_roce_dev *hr_dev,
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struct ib_pd *ib_pd,
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struct ib_qp_init_attr *init_attr,
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@ -916,34 +966,13 @@ static int hns_roce_create_qp_common(struct hns_roce_dev *hr_dev,
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hr_qp->state = IB_QPS_RESET;
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hr_qp->flush_flag = 0;
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hr_qp->ibqp.qp_type = init_attr->qp_type;
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if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
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hr_qp->sq_signal_bits = IB_SIGNAL_ALL_WR;
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else
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hr_qp->sq_signal_bits = IB_SIGNAL_REQ_WR;
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ret = hns_roce_set_rq_size(hr_dev, &init_attr->cap, udata,
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hns_roce_qp_has_rq(init_attr), hr_qp);
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ret = set_qp_param(hr_dev, hr_qp, init_attr, udata, &ucmd);
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if (ret) {
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dev_err(dev, "hns_roce_set_rq_size failed\n");
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goto err_out;
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ibdev_err(&hr_dev->ib_dev, "Failed to set QP param\n");
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return ret;
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}
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if (udata) {
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if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) {
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dev_err(dev, "ib_copy_from_udata error for create qp\n");
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ret = -EFAULT;
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goto err_out;
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}
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ret = hns_roce_set_user_sq_size(hr_dev, &init_attr->cap, hr_qp,
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&ucmd);
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if (ret) {
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dev_err(dev, "hns_roce_set_user_sq_size error for create qp\n");
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goto err_out;
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}
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if ((hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SQ_RECORD_DB) &&
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(udata->inlen >= sizeof(ucmd)) &&
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(udata->outlen >= sizeof(resp)) &&
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@ -975,27 +1004,6 @@ static int hns_roce_create_qp_common(struct hns_roce_dev *hr_dev,
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hr_qp->rdb_en = 1;
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}
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} else {
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if (init_attr->create_flags &
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IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) {
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dev_err(dev, "init_attr->create_flags error!\n");
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ret = -EINVAL;
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goto err_out;
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}
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if (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) {
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dev_err(dev, "init_attr->create_flags error!\n");
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ret = -EINVAL;
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goto err_out;
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}
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/* Set SQ size */
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ret = hns_roce_set_kernel_sq_size(hr_dev, &init_attr->cap,
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hr_qp);
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if (ret) {
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dev_err(dev, "hns_roce_set_kernel_sq_size error!\n");
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goto err_out;
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}
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/* QP doorbell register address */
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hr_qp->sq.db_reg_l = hr_dev->reg_base + hr_dev->sdb_offset +
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DB_REG_OFFSET * hr_dev->priv_uar.index;
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