mirror of https://gitee.com/openkylin/linux.git
Merge branch 'for-linus'
* for-linus: PCI: Fix is_added/is_busmaster race condition PCI: mobiveil: Avoid integer overflow in IB_WIN_SIZE PCI/AER: Work around use-after-free in pcie_do_fatal_recovery() PCI: v3-semi: Fix I/O space page leak PCI: mediatek: Fix I/O space page leak PCI: faraday: Fix I/O space page leak PCI: aardvark: Fix I/O space page leak PCI: designware: Fix I/O space page leak PCI: versatile: Fix I/O space page leak PCI: xgene: Fix I/O space page leak PCI: OF: Fix I/O space page leak PCI: endpoint: Fix NULL pointer dereference error when CONFIGFS is disabled PCI: hv: Disable/enable IRQs rather than BH in hv_compose_msi_msg() nfp: stop limiting VFs to 0 PCI/IOV: Reset total_VFs limit after detaching PF driver PCI: faraday: Add missing of_node_put() PCI: xilinx-nwl: Add missing of_node_put() PCI: xilinx: Add missing of_node_put() PCI: endpoint: Use after free in pci_epf_unregister_driver() PCI: controller: dwc: Do not let PCIE_DW_PLAT_HOST default to yes PCI: rcar: Clean up PHY init on failure PCI: rcar: Shut the PHY down in failpath PCI: controller: Move PCI_DOMAINS selection to arch Kconfig PCI: Initialize endpoint library before controllers PCI: shpchp: Manage SHPC unconditionally on non-ACPI systems
This commit is contained in:
commit
af863d18a1
|
@ -1245,8 +1245,14 @@ config PCI
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|||
VESA. If you have PCI, say Y, otherwise N.
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config PCI_DOMAINS
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bool
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bool "Support for multiple PCI domains"
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depends on PCI
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help
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Enable PCI domains kernel management. Say Y if your machine
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has a PCI bus hierarchy that requires more than one PCI
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domain (aka segment) to be correctly managed. Say N otherwise.
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If you don't know what to do here, say N.
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config PCI_DOMAINS_GENERIC
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def_bool PCI_DOMAINS
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|
|
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@ -20,6 +20,7 @@ config ARCH_BCM_IPROC
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select GPIOLIB
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select ARM_AMBA
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select PINCTRL
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select PCI_DOMAINS if PCI
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help
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This enables support for systems based on Broadcom IPROC architected SoCs.
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The IPROC complex contains one or more ARM CPUs along with common
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|
|
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@ -10,6 +10,7 @@ menuconfig ARCH_SOCFPGA
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select HAVE_ARM_SCU
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select HAVE_ARM_TWD if SMP
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select MFD_SYSCON
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select PCI_DOMAINS if PCI
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if ARCH_SOCFPGA
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config SOCFPGA_SUSPEND
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|
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@ -42,6 +42,8 @@
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#include <asm/ppc-pci.h>
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#include <asm/eeh.h>
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#include "../../../drivers/pci/pci.h"
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/* hose_spinlock protects accesses to the the phb_bitmap. */
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static DEFINE_SPINLOCK(hose_spinlock);
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LIST_HEAD(hose_list);
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@ -1014,7 +1016,7 @@ void pcibios_setup_bus_devices(struct pci_bus *bus)
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/* Cardbus can call us to add new devices to a bus, so ignore
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* those who are already fully discovered
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*/
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if (dev->is_added)
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if (pci_dev_is_added(dev))
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continue;
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pcibios_setup_device(dev);
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|
|
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@ -46,6 +46,7 @@
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#include "powernv.h"
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#include "pci.h"
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#include "../../../../drivers/pci/pci.h"
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#define PNV_IODA1_M64_NUM 16 /* Number of M64 BARs */
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#define PNV_IODA1_M64_SEGS 8 /* Segments per M64 BAR */
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@ -3138,7 +3139,7 @@ static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev)
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struct pci_dn *pdn;
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int mul, total_vfs;
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if (!pdev->is_physfn || pdev->is_added)
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if (!pdev->is_physfn || pci_dev_is_added(pdev))
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return;
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pdn = pci_get_pdn(pdev);
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|
|
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@ -71,6 +71,7 @@
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#include <asm/security_features.h>
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#include "pseries.h"
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#include "../../../../drivers/pci/pci.h"
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int CMO_PrPSP = -1;
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int CMO_SecPSP = -1;
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@ -664,7 +665,7 @@ static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev)
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const int *indexes;
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struct device_node *dn = pci_device_to_OF_node(pdev);
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if (!pdev->is_physfn || pdev->is_added)
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if (!pdev->is_physfn || pci_dev_is_added(pdev))
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return;
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/*Firmware must support open sriov otherwise dont configure*/
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indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
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|
|
|
@ -240,7 +240,6 @@ static int nfp_pcie_sriov_read_nfd_limit(struct nfp_pf *pf)
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return pci_sriov_set_totalvfs(pf->pdev, pf->limit_vfs);
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pf->limit_vfs = ~0;
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pci_sriov_set_totalvfs(pf->pdev, 0); /* 0 is unset */
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/* Allow any setting for backwards compatibility if symbol not found */
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if (err == -ENOENT)
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return 0;
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|
@ -668,7 +667,7 @@ static int nfp_pci_probe(struct pci_dev *pdev,
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err = nfp_net_pci_probe(pf);
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if (err)
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goto err_sriov_unlimit;
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goto err_fw_unload;
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err = nfp_hwmon_register(pf);
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if (err) {
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|
@ -680,8 +679,6 @@ static int nfp_pci_probe(struct pci_dev *pdev,
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err_net_remove:
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nfp_net_pci_remove(pf);
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err_sriov_unlimit:
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pci_sriov_set_totalvfs(pf->pdev, 0);
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err_fw_unload:
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kfree(pf->rtbl);
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nfp_mip_close(pf->mip);
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|
@ -715,7 +712,6 @@ static void nfp_pci_remove(struct pci_dev *pdev)
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nfp_hwmon_unregister(pf);
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nfp_pcie_sriov_disable(pdev);
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pci_sriov_set_totalvfs(pf->pdev, 0);
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nfp_net_pci_remove(pf);
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|
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|
|
|
@ -28,10 +28,10 @@ obj-$(CONFIG_PCI_PF_STUB) += pci-pf-stub.o
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obj-$(CONFIG_PCI_ECAM) += ecam.o
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obj-$(CONFIG_XEN_PCIDEV_FRONTEND) += xen-pcifront.o
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|
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obj-y += controller/
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obj-y += switch/
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|
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# Endpoint library must be initialized before its users
|
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obj-$(CONFIG_PCI_ENDPOINT) += endpoint/
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|
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obj-y += controller/
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obj-y += switch/
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|
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ccflags-$(CONFIG_PCI_DEBUG) := -DDEBUG
|
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|
|
|
@ -330,7 +330,7 @@ void pci_bus_add_device(struct pci_dev *dev)
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return;
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}
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dev->is_added = 1;
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pci_dev_assign_added(dev, true);
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}
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EXPORT_SYMBOL_GPL(pci_bus_add_device);
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|
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|
@ -347,14 +347,14 @@ void pci_bus_add_devices(const struct pci_bus *bus)
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|||
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list_for_each_entry(dev, &bus->devices, bus_list) {
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/* Skip already-added devices */
|
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if (dev->is_added)
|
||||
if (pci_dev_is_added(dev))
|
||||
continue;
|
||||
pci_bus_add_device(dev);
|
||||
}
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
/* Skip if device attach failed */
|
||||
if (!dev->is_added)
|
||||
if (!pci_dev_is_added(dev))
|
||||
continue;
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child = dev->subordinate;
|
||||
if (child)
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||||
|
|
|
@ -96,7 +96,6 @@ config PCI_HOST_GENERIC
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|||
depends on OF
|
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select PCI_HOST_COMMON
|
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select IRQ_DOMAIN
|
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select PCI_DOMAINS
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help
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||||
Say Y here if you want to support a simple generic PCI host
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controller, such as the one emulated by kvmtool.
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|
@ -138,7 +137,6 @@ config PCI_VERSATILE
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|||
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config PCIE_IPROC
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tristate
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select PCI_DOMAINS
|
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help
|
||||
This enables the iProc PCIe core controller support for Broadcom's
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||||
iProc family of SoCs. An appropriate bus interface driver needs
|
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|
@ -176,7 +174,6 @@ config PCIE_IPROC_MSI
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|||
config PCIE_ALTERA
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bool "Altera PCIe controller"
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depends on ARM || NIOS2 || COMPILE_TEST
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select PCI_DOMAINS
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help
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||||
Say Y here if you want to enable PCIe controller support on Altera
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FPGA.
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|
|
|
@ -58,7 +58,6 @@ config PCIE_DW_PLAT_HOST
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depends on PCI && PCI_MSI_IRQ_DOMAIN
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select PCIE_DW_HOST
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select PCIE_DW_PLAT
|
||||
default y
|
||||
help
|
||||
Enables support for the PCIe controller in the Designware IP to
|
||||
work in host mode. There are two instances of PCIe controller in
|
||||
|
|
|
@ -363,7 +363,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
|
|||
resource_list_for_each_entry_safe(win, tmp, &bridge->windows) {
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switch (resource_type(win->res)) {
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||||
case IORESOURCE_IO:
|
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ret = pci_remap_iospace(win->res, pp->io_base);
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ret = devm_pci_remap_iospace(dev, win->res,
|
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pp->io_base);
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if (ret) {
|
||||
dev_warn(dev, "Error %d: failed to map resource %pR\n",
|
||||
ret, win->res);
|
||||
|
|
|
@ -849,7 +849,7 @@ static int advk_pcie_parse_request_of_pci_ranges(struct advk_pcie *pcie)
|
|||
0, 0xF8000000, 0,
|
||||
lower_32_bits(res->start),
|
||||
OB_PCIE_IO);
|
||||
err = pci_remap_iospace(res, iobase);
|
||||
err = devm_pci_remap_iospace(dev, res, iobase);
|
||||
if (err) {
|
||||
dev_warn(dev, "error %d: failed to map resource %pR\n",
|
||||
err, res);
|
||||
|
|
|
@ -355,11 +355,13 @@ static int faraday_pci_setup_cascaded_irq(struct faraday_pci *p)
|
|||
irq = of_irq_get(intc, 0);
|
||||
if (irq <= 0) {
|
||||
dev_err(p->dev, "failed to get parent IRQ\n");
|
||||
of_node_put(intc);
|
||||
return irq ?: -EINVAL;
|
||||
}
|
||||
|
||||
p->irqdomain = irq_domain_add_linear(intc, PCI_NUM_INTX,
|
||||
&faraday_pci_irqdomain_ops, p);
|
||||
of_node_put(intc);
|
||||
if (!p->irqdomain) {
|
||||
dev_err(p->dev, "failed to create Gemini PCI IRQ domain\n");
|
||||
return -EINVAL;
|
||||
|
@ -501,7 +503,7 @@ static int faraday_pci_probe(struct platform_device *pdev)
|
|||
dev_err(dev, "illegal IO mem size\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
ret = pci_remap_iospace(io, io_base);
|
||||
ret = devm_pci_remap_iospace(dev, io, io_base);
|
||||
if (ret) {
|
||||
dev_warn(dev, "error %d: failed to map resource %pR\n",
|
||||
ret, io);
|
||||
|
|
|
@ -1073,6 +1073,7 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
|
|||
struct pci_bus *pbus;
|
||||
struct pci_dev *pdev;
|
||||
struct cpumask *dest;
|
||||
unsigned long flags;
|
||||
struct compose_comp_ctxt comp;
|
||||
struct tran_int_desc *int_desc;
|
||||
struct {
|
||||
|
@ -1164,14 +1165,15 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
|
|||
* the channel callback directly when channel->target_cpu is
|
||||
* the current CPU. When the higher level interrupt code
|
||||
* calls us with interrupt enabled, let's add the
|
||||
* local_bh_disable()/enable() to avoid race.
|
||||
* local_irq_save()/restore() to avoid race:
|
||||
* hv_pci_onchannelcallback() can also run in tasklet.
|
||||
*/
|
||||
local_bh_disable();
|
||||
local_irq_save(flags);
|
||||
|
||||
if (hbus->hdev->channel->target_cpu == smp_processor_id())
|
||||
hv_pci_onchannelcallback(hbus);
|
||||
|
||||
local_bh_enable();
|
||||
local_irq_restore(flags);
|
||||
|
||||
if (hpdev->state == hv_pcichild_ejecting) {
|
||||
dev_err_once(&hbus->hdev->device,
|
||||
|
|
|
@ -537,7 +537,7 @@ static int v3_pci_setup_resource(struct v3_pci *v3,
|
|||
v3->io_bus_addr = io->start - win->offset;
|
||||
dev_dbg(dev, "I/O window %pR, bus addr %pap\n",
|
||||
io, &v3->io_bus_addr);
|
||||
ret = pci_remap_iospace(io, io_base);
|
||||
ret = devm_pci_remap_iospace(dev, io, io_base);
|
||||
if (ret) {
|
||||
dev_warn(dev,
|
||||
"error %d: failed to map resource %pR\n",
|
||||
|
|
|
@ -82,7 +82,7 @@ static int versatile_pci_parse_request_of_pci_ranges(struct device *dev,
|
|||
|
||||
switch (resource_type(res)) {
|
||||
case IORESOURCE_IO:
|
||||
err = pci_remap_iospace(res, iobase);
|
||||
err = devm_pci_remap_iospace(dev, res, iobase);
|
||||
if (err) {
|
||||
dev_warn(dev, "error %d: failed to map resource %pR\n",
|
||||
err, res);
|
||||
|
|
|
@ -423,7 +423,7 @@ static int xgene_pcie_map_ranges(struct xgene_pcie_port *port,
|
|||
case IORESOURCE_IO:
|
||||
xgene_pcie_setup_ob_reg(port, res, OMR3BARL, io_base,
|
||||
res->start - window->offset);
|
||||
ret = pci_remap_iospace(res, io_base);
|
||||
ret = devm_pci_remap_iospace(dev, res, io_base);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
break;
|
||||
|
|
|
@ -1109,7 +1109,7 @@ static int mtk_pcie_request_resources(struct mtk_pcie *pcie)
|
|||
if (err < 0)
|
||||
return err;
|
||||
|
||||
pci_remap_iospace(&pcie->pio, pcie->io.start);
|
||||
devm_pci_remap_iospace(dev, &pcie->pio, pcie->io.start);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -107,7 +107,7 @@
|
|||
#define CFG_WINDOW_TYPE 0
|
||||
#define IO_WINDOW_TYPE 1
|
||||
#define MEM_WINDOW_TYPE 2
|
||||
#define IB_WIN_SIZE (256 * 1024 * 1024 * 1024)
|
||||
#define IB_WIN_SIZE ((u64)256 * 1024 * 1024 * 1024)
|
||||
#define MAX_PIO_WINDOWS 8
|
||||
|
||||
/* Parameters for the waiting for link up routine */
|
||||
|
|
|
@ -680,7 +680,11 @@ static int rcar_pcie_phy_init_gen3(struct rcar_pcie *pcie)
|
|||
if (err)
|
||||
return err;
|
||||
|
||||
return phy_power_on(pcie->phy);
|
||||
err = phy_power_on(pcie->phy);
|
||||
if (err)
|
||||
phy_exit(pcie->phy);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int rcar_msi_alloc(struct rcar_msi *chip)
|
||||
|
@ -1165,7 +1169,7 @@ static int rcar_pcie_probe(struct platform_device *pdev)
|
|||
if (rcar_pcie_hw_init(pcie)) {
|
||||
dev_info(dev, "PCIe link down\n");
|
||||
err = -ENODEV;
|
||||
goto err_clk_disable;
|
||||
goto err_phy_shutdown;
|
||||
}
|
||||
|
||||
data = rcar_pci_read_reg(pcie, MACSR);
|
||||
|
@ -1177,7 +1181,7 @@ static int rcar_pcie_probe(struct platform_device *pdev)
|
|||
dev_err(dev,
|
||||
"failed to enable MSI support: %d\n",
|
||||
err);
|
||||
goto err_clk_disable;
|
||||
goto err_phy_shutdown;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1191,6 +1195,12 @@ static int rcar_pcie_probe(struct platform_device *pdev)
|
|||
if (IS_ENABLED(CONFIG_PCI_MSI))
|
||||
rcar_pcie_teardown_msi(pcie);
|
||||
|
||||
err_phy_shutdown:
|
||||
if (pcie->phy) {
|
||||
phy_power_off(pcie->phy);
|
||||
phy_exit(pcie->phy);
|
||||
}
|
||||
|
||||
err_clk_disable:
|
||||
clk_disable_unprepare(pcie->bus_clk);
|
||||
|
||||
|
|
|
@ -559,7 +559,7 @@ static int nwl_pcie_init_irq_domain(struct nwl_pcie *pcie)
|
|||
PCI_NUM_INTX,
|
||||
&legacy_domain_ops,
|
||||
pcie);
|
||||
|
||||
of_node_put(legacy_intc_node);
|
||||
if (!pcie->legacy_irq_domain) {
|
||||
dev_err(dev, "failed to create IRQ domain\n");
|
||||
return -ENOMEM;
|
||||
|
|
|
@ -509,6 +509,7 @@ static int xilinx_pcie_init_irq_domain(struct xilinx_pcie_port *port)
|
|||
port->leg_domain = irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX,
|
||||
&intx_domain_ops,
|
||||
port);
|
||||
of_node_put(pcie_intc_node);
|
||||
if (!port->leg_domain) {
|
||||
dev_err(dev, "Failed to get a INTx IRQ domain\n");
|
||||
return -ENODEV;
|
||||
|
|
|
@ -137,6 +137,20 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(pci_epf_alloc_space);
|
||||
|
||||
static void pci_epf_remove_cfs(struct pci_epf_driver *driver)
|
||||
{
|
||||
struct config_group *group, *tmp;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_PCI_ENDPOINT_CONFIGFS))
|
||||
return;
|
||||
|
||||
mutex_lock(&pci_epf_mutex);
|
||||
list_for_each_entry_safe(group, tmp, &driver->epf_group, group_entry)
|
||||
pci_ep_cfs_remove_epf_group(group);
|
||||
list_del(&driver->epf_group);
|
||||
mutex_unlock(&pci_epf_mutex);
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_epf_unregister_driver() - unregister the PCI EPF driver
|
||||
* @driver: the PCI EPF driver that has to be unregistered
|
||||
|
@ -145,17 +159,38 @@ EXPORT_SYMBOL_GPL(pci_epf_alloc_space);
|
|||
*/
|
||||
void pci_epf_unregister_driver(struct pci_epf_driver *driver)
|
||||
{
|
||||
struct config_group *group;
|
||||
|
||||
mutex_lock(&pci_epf_mutex);
|
||||
list_for_each_entry(group, &driver->epf_group, group_entry)
|
||||
pci_ep_cfs_remove_epf_group(group);
|
||||
list_del(&driver->epf_group);
|
||||
mutex_unlock(&pci_epf_mutex);
|
||||
pci_epf_remove_cfs(driver);
|
||||
driver_unregister(&driver->driver);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pci_epf_unregister_driver);
|
||||
|
||||
static int pci_epf_add_cfs(struct pci_epf_driver *driver)
|
||||
{
|
||||
struct config_group *group;
|
||||
const struct pci_epf_device_id *id;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_PCI_ENDPOINT_CONFIGFS))
|
||||
return 0;
|
||||
|
||||
INIT_LIST_HEAD(&driver->epf_group);
|
||||
|
||||
id = driver->id_table;
|
||||
while (id->name[0]) {
|
||||
group = pci_ep_cfs_add_epf_group(id->name);
|
||||
if (IS_ERR(group)) {
|
||||
pci_epf_remove_cfs(driver);
|
||||
return PTR_ERR(group);
|
||||
}
|
||||
|
||||
mutex_lock(&pci_epf_mutex);
|
||||
list_add_tail(&group->group_entry, &driver->epf_group);
|
||||
mutex_unlock(&pci_epf_mutex);
|
||||
id++;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* __pci_epf_register_driver() - register a new PCI EPF driver
|
||||
* @driver: structure representing PCI EPF driver
|
||||
|
@ -167,8 +202,6 @@ int __pci_epf_register_driver(struct pci_epf_driver *driver,
|
|||
struct module *owner)
|
||||
{
|
||||
int ret;
|
||||
struct config_group *group;
|
||||
const struct pci_epf_device_id *id;
|
||||
|
||||
if (!driver->ops)
|
||||
return -EINVAL;
|
||||
|
@ -183,16 +216,7 @@ int __pci_epf_register_driver(struct pci_epf_driver *driver,
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
INIT_LIST_HEAD(&driver->epf_group);
|
||||
|
||||
id = driver->id_table;
|
||||
while (id->name[0]) {
|
||||
group = pci_ep_cfs_add_epf_group(id->name);
|
||||
mutex_lock(&pci_epf_mutex);
|
||||
list_add_tail(&group->group_entry, &driver->epf_group);
|
||||
mutex_unlock(&pci_epf_mutex);
|
||||
id++;
|
||||
}
|
||||
pci_epf_add_cfs(driver);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -7,7 +7,6 @@
|
|||
* All rights reserved.
|
||||
*
|
||||
* Send feedback to <kristen.c.accardi@intel.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
@ -87,8 +86,17 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *pdev)
|
|||
return 0;
|
||||
|
||||
/* If _OSC exists, we should not evaluate OSHP */
|
||||
|
||||
/*
|
||||
* If there's no ACPI host bridge (i.e., ACPI support is compiled
|
||||
* into the kernel but the hardware platform doesn't support ACPI),
|
||||
* there's nothing to do here.
|
||||
*/
|
||||
host = pci_find_host_bridge(pdev->bus);
|
||||
root = acpi_pci_find_root(ACPI_HANDLE(&host->dev));
|
||||
if (!root)
|
||||
return 0;
|
||||
|
||||
if (root->osc_support_set)
|
||||
goto no_control;
|
||||
|
||||
|
|
|
@ -509,7 +509,7 @@ static void enable_slot(struct acpiphp_slot *slot)
|
|||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
/* Assume that newly added devices are powered on already. */
|
||||
if (!dev->is_added)
|
||||
if (!pci_dev_is_added(dev))
|
||||
dev->current_state = PCI_D0;
|
||||
}
|
||||
|
||||
|
|
|
@ -574,6 +574,22 @@ void pci_iov_release(struct pci_dev *dev)
|
|||
sriov_release(dev);
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_iov_remove - clean up SR-IOV state after PF driver is detached
|
||||
* @dev: the PCI device
|
||||
*/
|
||||
void pci_iov_remove(struct pci_dev *dev)
|
||||
{
|
||||
struct pci_sriov *iov = dev->sriov;
|
||||
|
||||
if (!dev->is_physfn)
|
||||
return;
|
||||
|
||||
iov->driver_max_VFs = iov->total_VFs;
|
||||
if (iov->num_VFs)
|
||||
pci_warn(dev, "driver left SR-IOV enabled after remove\n");
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_iov_update_resource - update a VF BAR
|
||||
* @dev: the PCI device
|
||||
|
|
|
@ -612,7 +612,7 @@ int pci_parse_request_of_pci_ranges(struct device *dev,
|
|||
|
||||
switch (resource_type(res)) {
|
||||
case IORESOURCE_IO:
|
||||
err = pci_remap_iospace(res, iobase);
|
||||
err = devm_pci_remap_iospace(dev, res, iobase);
|
||||
if (err) {
|
||||
dev_warn(dev, "error %d: failed to map resource %pR\n",
|
||||
err, res);
|
||||
|
|
|
@ -445,6 +445,7 @@ static int pci_device_remove(struct device *dev)
|
|||
}
|
||||
pcibios_free_irq(pci_dev);
|
||||
pci_dev->driver = NULL;
|
||||
pci_iov_remove(pci_dev);
|
||||
}
|
||||
|
||||
/* Undo the runtime PM settings in local_pci_probe() */
|
||||
|
|
|
@ -3579,6 +3579,44 @@ void pci_unmap_iospace(struct resource *res)
|
|||
}
|
||||
EXPORT_SYMBOL(pci_unmap_iospace);
|
||||
|
||||
static void devm_pci_unmap_iospace(struct device *dev, void *ptr)
|
||||
{
|
||||
struct resource **res = ptr;
|
||||
|
||||
pci_unmap_iospace(*res);
|
||||
}
|
||||
|
||||
/**
|
||||
* devm_pci_remap_iospace - Managed pci_remap_iospace()
|
||||
* @dev: Generic device to remap IO address for
|
||||
* @res: Resource describing the I/O space
|
||||
* @phys_addr: physical address of range to be mapped
|
||||
*
|
||||
* Managed pci_remap_iospace(). Map is automatically unmapped on driver
|
||||
* detach.
|
||||
*/
|
||||
int devm_pci_remap_iospace(struct device *dev, const struct resource *res,
|
||||
phys_addr_t phys_addr)
|
||||
{
|
||||
const struct resource **ptr;
|
||||
int error;
|
||||
|
||||
ptr = devres_alloc(devm_pci_unmap_iospace, sizeof(*ptr), GFP_KERNEL);
|
||||
if (!ptr)
|
||||
return -ENOMEM;
|
||||
|
||||
error = pci_remap_iospace(res, phys_addr);
|
||||
if (error) {
|
||||
devres_free(ptr);
|
||||
} else {
|
||||
*ptr = res;
|
||||
devres_add(dev, ptr);
|
||||
}
|
||||
|
||||
return error;
|
||||
}
|
||||
EXPORT_SYMBOL(devm_pci_remap_iospace);
|
||||
|
||||
/**
|
||||
* devm_pci_remap_cfgspace - Managed pci_remap_cfgspace()
|
||||
* @dev: Generic device to remap IO address for
|
||||
|
|
|
@ -288,6 +288,7 @@ struct pci_sriov {
|
|||
|
||||
/* pci_dev priv_flags */
|
||||
#define PCI_DEV_DISCONNECTED 0
|
||||
#define PCI_DEV_ADDED 1
|
||||
|
||||
static inline int pci_dev_set_disconnected(struct pci_dev *dev, void *unused)
|
||||
{
|
||||
|
@ -300,6 +301,16 @@ static inline bool pci_dev_is_disconnected(const struct pci_dev *dev)
|
|||
return test_bit(PCI_DEV_DISCONNECTED, &dev->priv_flags);
|
||||
}
|
||||
|
||||
static inline void pci_dev_assign_added(struct pci_dev *dev, bool added)
|
||||
{
|
||||
assign_bit(PCI_DEV_ADDED, &dev->priv_flags, added);
|
||||
}
|
||||
|
||||
static inline bool pci_dev_is_added(const struct pci_dev *dev)
|
||||
{
|
||||
return test_bit(PCI_DEV_ADDED, &dev->priv_flags);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI_ATS
|
||||
void pci_restore_ats_state(struct pci_dev *dev);
|
||||
#else
|
||||
|
@ -311,6 +322,7 @@ static inline void pci_restore_ats_state(struct pci_dev *dev)
|
|||
#ifdef CONFIG_PCI_IOV
|
||||
int pci_iov_init(struct pci_dev *dev);
|
||||
void pci_iov_release(struct pci_dev *dev);
|
||||
void pci_iov_remove(struct pci_dev *dev);
|
||||
void pci_iov_update_resource(struct pci_dev *dev, int resno);
|
||||
resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
|
||||
void pci_restore_iov_state(struct pci_dev *dev);
|
||||
|
@ -323,6 +335,9 @@ static inline int pci_iov_init(struct pci_dev *dev)
|
|||
}
|
||||
static inline void pci_iov_release(struct pci_dev *dev)
|
||||
|
||||
{
|
||||
}
|
||||
static inline void pci_iov_remove(struct pci_dev *dev)
|
||||
{
|
||||
}
|
||||
static inline void pci_restore_iov_state(struct pci_dev *dev)
|
||||
|
|
|
@ -295,6 +295,7 @@ void pcie_do_fatal_recovery(struct pci_dev *dev, u32 service)
|
|||
|
||||
parent = udev->subordinate;
|
||||
pci_lock_rescan_remove();
|
||||
pci_dev_get(dev);
|
||||
list_for_each_entry_safe_reverse(pdev, temp, &parent->devices,
|
||||
bus_list) {
|
||||
pci_dev_get(pdev);
|
||||
|
@ -328,6 +329,7 @@ void pcie_do_fatal_recovery(struct pci_dev *dev, u32 service)
|
|||
pci_info(dev, "Device recovery from fatal error failed\n");
|
||||
}
|
||||
|
||||
pci_dev_put(dev);
|
||||
pci_unlock_rescan_remove();
|
||||
}
|
||||
|
||||
|
|
|
@ -2433,13 +2433,13 @@ int pci_scan_slot(struct pci_bus *bus, int devfn)
|
|||
dev = pci_scan_single_device(bus, devfn);
|
||||
if (!dev)
|
||||
return 0;
|
||||
if (!dev->is_added)
|
||||
if (!pci_dev_is_added(dev))
|
||||
nr++;
|
||||
|
||||
for (fn = next_fn(bus, dev, 0); fn > 0; fn = next_fn(bus, dev, fn)) {
|
||||
dev = pci_scan_single_device(bus, devfn + fn);
|
||||
if (dev) {
|
||||
if (!dev->is_added)
|
||||
if (!pci_dev_is_added(dev))
|
||||
nr++;
|
||||
dev->multifunction = 1;
|
||||
}
|
||||
|
|
|
@ -19,11 +19,12 @@ static void pci_stop_dev(struct pci_dev *dev)
|
|||
{
|
||||
pci_pme_active(dev, false);
|
||||
|
||||
if (dev->is_added) {
|
||||
if (pci_dev_is_added(dev)) {
|
||||
device_release_driver(&dev->dev);
|
||||
pci_proc_detach_device(dev);
|
||||
pci_remove_sysfs_dev_files(dev);
|
||||
dev->is_added = 0;
|
||||
|
||||
pci_dev_assign_added(dev, false);
|
||||
}
|
||||
|
||||
if (dev->bus->self)
|
||||
|
|
|
@ -368,7 +368,6 @@ struct pci_dev {
|
|||
unsigned int transparent:1; /* Subtractive decode bridge */
|
||||
unsigned int multifunction:1; /* Multi-function device */
|
||||
|
||||
unsigned int is_added:1;
|
||||
unsigned int is_busmaster:1; /* Is busmaster */
|
||||
unsigned int no_msi:1; /* May not use MSI */
|
||||
unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */
|
||||
|
@ -1240,6 +1239,8 @@ int pci_register_io_range(struct fwnode_handle *fwnode, phys_addr_t addr,
|
|||
unsigned long pci_address_to_pio(phys_addr_t addr);
|
||||
phys_addr_t pci_pio_to_address(unsigned long pio);
|
||||
int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr);
|
||||
int devm_pci_remap_iospace(struct device *dev, const struct resource *res,
|
||||
phys_addr_t phys_addr);
|
||||
void pci_unmap_iospace(struct resource *res);
|
||||
void __iomem *devm_pci_remap_cfgspace(struct device *dev,
|
||||
resource_size_t offset,
|
||||
|
|
Loading…
Reference in New Issue