mirror of https://gitee.com/openkylin/linux.git
ath9k: Add a delay between RTC reset/clear for AR9003
The small delay that is present between a RTC reset/clear operation is required for the chip to settle and this is needed for all chips, not just the AR9002 family. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1399,8 +1399,7 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
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REGWRITE_BUFFER_FLUSH(ah);
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REGWRITE_BUFFER_FLUSH(ah);
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if (!AR_SREV_9300_20_OR_LATER(ah))
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udelay(2);
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udelay(2);
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if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
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if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
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REG_WRITE(ah, AR_RC, 0);
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REG_WRITE(ah, AR_RC, 0);
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