mirror of https://gitee.com/openkylin/linux.git
[MIPS] Remove excite_flash.c
excite_flashtest.c is unused. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Yoichi Yuasa
Ralf Baechle
parent
aa400804e0
commit
b00f3774f2
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@ -1,294 +0,0 @@
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/*
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* Copyright (C) 2005 by Basler Vision Technologies AG
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* Author: Thies Moeller <thies.moeller@baslerweb.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/ioport.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <excite.h>
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#include <asm/io.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/partitions.h>
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#include <asm/rm9k-ocd.h> // for ocd_write
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#include <linux/workqueue.h> // for queue
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#include "excite_nandflash.h"
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#include "nandflash.h"
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#define PFX "excite flashtest: "
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typedef void __iomem *io_reg_t;
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#define io_readb(__a__) __raw_readb((__a__))
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#define io_writeb(__v__, __a__) __raw_writeb((__v__), (__a__))
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static inline const struct resource *excite_nandflash_get_resource(
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struct platform_device *d, unsigned long flags, const char *basename)
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{
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const char fmt[] = "%s_%u";
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char buf[80];
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if (unlikely(snprintf(buf, sizeof buf, fmt, basename, d->id) >= sizeof buf))
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return NULL;
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return platform_get_resource_byname(d, flags, buf);
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}
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static inline io_reg_t
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excite_nandflash_map_regs(struct platform_device *d, const char *basename)
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{
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void *result = NULL;
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const struct resource *const r =
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excite_nandflash_get_resource(d, IORESOURCE_MEM, basename);
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if (r)
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result = ioremap_nocache(r->start, r->end + 1 - r->start);
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return result;
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}
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/* controller and mtd information */
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struct excite_nandflash_drvdata {
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struct mtd_info board_mtd;
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struct nand_chip board_chip;
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io_reg_t regs;
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};
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/* command and control functions */
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static void excite_nandflash_hwcontrol(struct mtd_info *mtd, int cmd)
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{
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struct nand_chip *this = mtd->priv;
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io_reg_t regs = container_of(mtd,struct excite_nandflash_drvdata,board_mtd)->regs;
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switch (cmd) {
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/* Select the command latch */
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case NAND_CTL_SETCLE: this->IO_ADDR_W = regs + EXCITE_NANDFLASH_CMD;
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break;
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/* Deselect the command latch */
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case NAND_CTL_CLRCLE: this->IO_ADDR_W = regs + EXCITE_NANDFLASH_DATA;
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break;
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/* Select the address latch */
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case NAND_CTL_SETALE: this->IO_ADDR_W = regs + EXCITE_NANDFLASH_ADDR;
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break;
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/* Deselect the address latch */
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case NAND_CTL_CLRALE: this->IO_ADDR_W = regs + EXCITE_NANDFLASH_DATA;
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break;
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/* Select the chip -- not used */
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case NAND_CTL_SETNCE:
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break;
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/* Deselect the chip -- not used */
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case NAND_CTL_CLRNCE:
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break;
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}
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this->IO_ADDR_R = this->IO_ADDR_W;
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}
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/* excite_nandflash_devready()
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*
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* returns 0 if the nand is busy, 1 if it is ready
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*/
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static int excite_nandflash_devready(struct mtd_info *mtd)
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{
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struct excite_nandflash_drvdata *drvdata =
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container_of(mtd, struct excite_nandflash_drvdata, board_mtd);
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return io_readb(drvdata->regs + EXCITE_NANDFLASH_STATUS);
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}
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/* device management functions */
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/* excite_nandflash_remove
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*
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* called by device layer to remove the driver
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* the binding to the mtd and all allocated
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* resources are released
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*/
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static int excite_nandflash_remove(struct device *dev)
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{
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struct excite_nandflash_drvdata *this = dev_get_drvdata(dev);
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pr_info(PFX "remove");
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dev_set_drvdata(dev, NULL);
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if (this == NULL) {
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pr_debug(PFX "call remove without private data!!");
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return 0;
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}
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/* free the common resources */
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if (this->regs != NULL) {
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iounmap(this->regs);
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this->regs = NULL;
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}
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kfree(this);
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return 0;
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}
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static int elapsed;
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void my_workqueue_handler(void *arg)
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{
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elapsed = 1;
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}
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DECLARE_WORK(sigElapsed, my_workqueue_handler, 0);
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/* excite_nandflash_probe
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*
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* called by device layer when it finds a device matching
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* one our driver can handled. This code checks to see if
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* it can allocate all necessary resources then calls the
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* nand layer to look for devices
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*/
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static int excite_nandflash_probe(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct excite_nandflash_drvdata *drvdata; /* private driver data */
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struct nand_chip *board_chip; /* private flash chip data */
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struct mtd_info *board_mtd; /* mtd info for this board */
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int err = 0;
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int count = 0;
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struct timeval tv,endtv;
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unsigned int dt;
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pr_info(PFX "probe dev: (%p)\n", dev);
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pr_info(PFX "adjust LB timing\n");
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ocd_writel(0x00000330, LDP2);
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drvdata = kmalloc(sizeof(*drvdata), GFP_KERNEL);
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if (unlikely(!drvdata)) {
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printk(KERN_ERR PFX "no memory for drvdata\n");
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err = -ENOMEM;
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goto mem_error;
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}
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/* Initialize structures */
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memset(drvdata, 0, sizeof(*drvdata));
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/* bind private data into driver */
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dev_set_drvdata(dev, drvdata);
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/* allocate and map the resource */
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drvdata->regs =
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excite_nandflash_map_regs(pdev, EXCITE_NANDFLASH_RESOURCE_REGS);
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if (unlikely(!drvdata->regs)) {
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printk(KERN_ERR PFX "cannot reserve register region\n");
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err = -ENXIO;
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goto io_error;
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}
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/* initialise our chip */
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board_chip = &drvdata->board_chip;
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board_chip->IO_ADDR_R = drvdata->regs + EXCITE_NANDFLASH_DATA;
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board_chip->IO_ADDR_W = drvdata->regs + EXCITE_NANDFLASH_DATA;
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board_chip->hwcontrol = excite_nandflash_hwcontrol;
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board_chip->dev_ready = excite_nandflash_devready;
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board_chip->chip_delay = 25;
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#if 0
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/* TODO: speedup the initial scan */
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board_chip->options = NAND_USE_FLASH_BBT;
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#endif
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board_chip->eccmode = NAND_ECC_SOFT;
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/* link chip to mtd */
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board_mtd = &drvdata->board_mtd;
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board_mtd->priv = board_chip;
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pr_info(PFX "FlashTest\n");
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elapsed = 0;
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/* schedule_delayed_work(&sigElapsed, 1*HZ);
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while (!elapsed) {
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io_readb(drvdata->regs + EXCITE_NANDFLASH_STATUS);
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count++;
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}
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pr_info(PFX "reads in 1 sec --> %d\n",count);
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*/
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do_gettimeofday(&tv);
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for (count = 0 ; count < 1000000; count ++) {
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io_readb(drvdata->regs + EXCITE_NANDFLASH_STATUS);
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}
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do_gettimeofday(&endtv);
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dt = (endtv.tv_sec - tv.tv_sec) * 1000000 + endtv.tv_usec - tv.tv_usec;
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pr_info(PFX "%8d us timeval\n",dt);
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pr_info(PFX "EndFlashTest\n");
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/* return with error to unload everything
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*/
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io_error:
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iounmap(drvdata->regs);
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mem_error:
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kfree(drvdata);
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if (err == 0)
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err = -EINVAL;
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return err;
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}
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static struct device_driver excite_nandflash_driver = {
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.name = "excite_nand",
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.bus = &platform_bus_type,
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.probe = excite_nandflash_probe,
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.remove = excite_nandflash_remove,
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};
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static int __init excite_nandflash_init(void)
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{
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pr_info(PFX "register Driver (Rev: $Revision:$)\n");
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return driver_register(&excite_nandflash_driver);
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}
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static void __exit excite_nandflash_exit(void)
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{
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driver_unregister(&excite_nandflash_driver);
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pr_info(PFX "Driver unregistered");
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}
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module_init(excite_nandflash_init);
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module_exit(excite_nandflash_exit);
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MODULE_AUTHOR("Thies Moeller <thies.moeller@baslerweb.com>");
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MODULE_DESCRIPTION("Basler eXcite NAND-Flash driver");
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MODULE_LICENSE("GPL");
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