mirror of https://gitee.com/openkylin/linux.git
ARM: tegra: use us counter as delay timer
Tegra has a micro-second counter whose rate doesn't vary with cpufreq changes. Register it so it can be used as the delay timer, so delays aren't influenced by cpufreq. I've made this a separate branch since it touches a few files outside arch/arm/mach-tegra/. This can be merged anywhere that conflicts need to be resolved, although I know of no such places at present. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJTqJo3AAoJEMzrak5tbycxUbkP/1Rx2GqGYG2pvsQDEXuHGVJn 3WuFRC7kvc1A/4smpSs+1UhZMwbyewCcdEYbCSjI28UVcYokdRnWAgYrPit3Q0VB 8RGuqDXyW7nYJrRdwpeSddBlt+lW273nn1hz6BB5tvKYr+5IR8iUqkMB6e8Ri2cV QNG0H4/+OKvnlM6Mfk0yZ2F12ZmUdey0j7mEhzHNtxZhN3JXm5g+Ta58knRibkCO EJNip5nlZg6d07GAHkEtiegLPTfNsnBDh9RyiMq/FHb0NJ6WZxvCizesFg1Ph2rW QVjShShivEXB5F/7bNVmMlsySGWA6WTiWYCvZ+GB4Jf6HMLTv0ekyTP28pJdeaMN 2A8Si4MueWx1E5sUPbHJznsk/zbB7A2Xgb+h59M3FyAbKNqMCf141cAg6YrPHkee I50H4G4xe2KwKRM01ErwRqOU3MEsPiJ/8CBgseEZ8G71SMj4cGvGglKj9cr6V4hC SzAyDkctJD9QNMozp6nyhhGEJ76WaNsvBV9FjqmthiRhTtRbusapyGle/tx5f0IP ieS3vlt7WGeLFJQ9NkuOI9Dn1p7KDlWSbCgjm3dFVYlCZyiGeJf7L6GzGvePBhOB eQ3O4zIXnjuW+HXOU9bEWU3yavviFewmf7IdygdjrYymq46KmDCT6fhxFppnSWTA SIbgbOwiZHD63RQSuYFv =flbE -----END PGP SIGNATURE----- Merge tag 'tegra-for-3.17-delay-timer' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc Merge "ARM: tegra: use us counter as delay timer" from Stephen Warren: Tegra has a micro-second counter whose rate doesn't vary with cpufreq changes. Register it so it can be used as the delay timer, so delays aren't influenced by cpufreq. * tag 'tegra-for-3.17-delay-timer' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: clocksource: tegra: Use us counter as delay timer ARM: choose highest resolution delay timer kernel: add calibration_delay_done() Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
b040614c5b
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@ -19,6 +19,7 @@
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#include <linux/clocksource.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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@ -36,6 +37,7 @@ struct arm_delay_ops arm_delay_ops = {
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static const struct delay_timer *delay_timer;
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static bool delay_calibrated;
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static u64 delay_res;
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int read_current_timer(unsigned long *timer_val)
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{
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@ -47,6 +49,11 @@ int read_current_timer(unsigned long *timer_val)
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}
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EXPORT_SYMBOL_GPL(read_current_timer);
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static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
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{
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return (cyc * mult) >> shift;
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}
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static void __timer_delay(unsigned long cycles)
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{
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cycles_t start = get_cycles();
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@ -69,18 +76,24 @@ static void __timer_udelay(unsigned long usecs)
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void __init register_current_timer_delay(const struct delay_timer *timer)
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{
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if (!delay_calibrated) {
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pr_info("Switching to timer-based delay loop\n");
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u32 new_mult, new_shift;
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u64 res;
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clocks_calc_mult_shift(&new_mult, &new_shift, timer->freq,
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NSEC_PER_SEC, 3600);
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res = cyc_to_ns(1ULL, new_mult, new_shift);
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if (!delay_calibrated && (!delay_res || (res < delay_res))) {
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pr_info("Switching to timer-based delay loop, resolution %lluns\n", res);
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delay_timer = timer;
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lpj_fine = timer->freq / HZ;
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delay_res = res;
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/* cpufreq may scale loops_per_jiffy, so keep a private copy */
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arm_delay_ops.ticks_per_jiffy = lpj_fine;
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arm_delay_ops.delay = __timer_delay;
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arm_delay_ops.const_udelay = __timer_const_udelay;
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arm_delay_ops.udelay = __timer_udelay;
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delay_calibrated = true;
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} else {
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pr_info("Ignoring duplicate/late registration of read_current_timer delay\n");
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}
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@ -91,3 +104,8 @@ unsigned long calibrate_delay_is_known(void)
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delay_calibrated = true;
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return lpj_fine;
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}
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void calibration_delay_done(void)
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{
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delay_calibrated = true;
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}
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@ -27,6 +27,7 @@
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/sched_clock.h>
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#include <linux/delay.h>
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#include <asm/mach/time.h>
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#include <asm/smp_twd.h>
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@ -53,6 +54,8 @@ static void __iomem *rtc_base;
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static struct timespec persistent_ts;
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static u64 persistent_ms, last_persistent_ms;
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static struct delay_timer tegra_delay_timer;
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#define timer_writel(value, reg) \
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__raw_writel(value, timer_reg_base + (reg))
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#define timer_readl(reg) \
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@ -139,6 +142,11 @@ static void tegra_read_persistent_clock(struct timespec *ts)
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*ts = *tsp;
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}
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static unsigned long tegra_delay_timer_read_counter_long(void)
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{
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return readl(timer_reg_base + TIMERUS_CNTR_1US);
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}
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static irqreturn_t tegra_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = (struct clock_event_device *)dev_id;
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@ -206,6 +214,11 @@ static void __init tegra20_init_timer(struct device_node *np)
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BUG();
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}
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tegra_delay_timer.read_current_timer =
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tegra_delay_timer_read_counter_long;
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tegra_delay_timer.freq = 1000000;
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register_current_timer_delay(&tegra_delay_timer);
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ret = setup_irq(tegra_timer_irq.irq, &tegra_timer_irq);
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if (ret) {
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pr_err("Failed to register timer IRQ: %d\n", ret);
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@ -262,6 +262,15 @@ unsigned long __attribute__((weak)) calibrate_delay_is_known(void)
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return 0;
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}
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/*
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* Indicate the cpu delay calibration is done. This can be used by
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* architectures to stop accepting delay timer registrations after this point.
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*/
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void __attribute__((weak)) calibration_delay_done(void)
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{
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}
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void calibrate_delay(void)
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{
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unsigned long lpj;
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@ -301,4 +310,6 @@ void calibrate_delay(void)
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loops_per_jiffy = lpj;
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printed = true;
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calibration_delay_done();
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}
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