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ARM: S5PC1XX: registers rename
S5PC110 and S5PC100 register maps differs in many places, rename all defined registers to be S5PC100 specific. PA_SYS register known from S3C64XX series has been renamed to more adequate PA_CLK. Also system map has been also updated to cover more integrated peripherals. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Kyungmin Park
Ben Dooks
parent
cf38367824
commit
b0cc3031ff
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@ -17,6 +17,19 @@
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#include <plat/map-base.h>
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/*
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* map-base.h has already defined virtual memory address
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* S3C_VA_IRQ S3C_ADDR(0x00000000) irq controller(s)
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* S3C_VA_SYS S3C_ADDR(0x00100000) system control
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* S3C_VA_MEM S3C_ADDR(0x00200000) system control (not used)
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* S3C_VA_TIMER S3C_ADDR(0x00300000) timer block
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* S3C_VA_WATCHDOG S3C_ADDR(0x00400000) watchdog
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* S3C_VA_UART S3C_ADDR(0x01000000) UART
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*
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* S5PC100 specific virtual memory address can be defined here
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* S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) GPIO
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*
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*/
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/* Chip ID */
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#define S5PC100_PA_CHIPID (0xE0000000)
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@ -24,13 +37,20 @@
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#define S5PC1XX_VA_CHIPID S3C_VA_SYS
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/* System */
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#define S5PC100_PA_SYS (0xE0100000)
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#define S5PC100_PA_CLK (S5PC100_PA_SYS + 0x0)
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#define S5PC100_PA_PWR (S5PC100_PA_SYS + 0x8000)
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#define S5PC100_PA_CLK (0xE0100000)
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#define S5PC100_PA_CLK_OTHER (0xE0200000)
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#define S5PC100_PA_PWR (0xE0108000)
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#define S5PC1XX_PA_CLK S5PC100_PA_CLK
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#define S5PC1XX_PA_PWR S5PC100_PA_PWR
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#define S5PC1XX_PA_CLK_OTHER S5PC100_PA_CLK_OTHER
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#define S5PC1XX_VA_CLK (S3C_VA_SYS + 0x10000)
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#define S5PC1XX_VA_PWR (S3C_VA_SYS + 0x20000)
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#define S5PC1XX_VA_CLK_OTHER (S3C_VA_SYS + 0x30000)
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/* GPIO */
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#define S5PC100_PA_GPIO (0xE0300000)
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#define S5PC1XX_PA_GPIO S5PC100_PA_GPIO
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#define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000)
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/* Interrupt */
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#define S5PC100_PA_VIC (0xE4000000)
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@ -40,23 +60,64 @@
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#define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
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#define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
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/* DMA */
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#define S5PC100_PA_MDMA (0xE8100000)
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#define S5PC100_PA_PDMA0 (0xE9000000)
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#define S5PC100_PA_PDMA1 (0xE9200000)
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/* Timer */
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#define S5PC100_PA_TIMER (0xEA000000)
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#define S5PC1XX_PA_TIMER S5PC100_PA_TIMER
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#define S5PC1XX_VA_TIMER S3C_VA_TIMER
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/* RTC */
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#define S5PC100_PA_RTC (0xEA300000)
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/* UART */
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#define S5PC100_PA_UART (0xEC000000)
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#define S5PC1XX_PA_UART S5PC100_PA_UART
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#define S5PC1XX_VA_UART S3C_VA_UART
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/* IIC */
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#define S5PC100_PA_IIC (0xEC100000)
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/* I2C */
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#define S5PC100_PA_I2C (0xEC100000)
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#define S5PC100_PA_I2C1 (0xEC200000)
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/* USB HS OTG */
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#define S5PC100_PA_USB_HSOTG (0xED200000)
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#define S5PC100_PA_USB_HSPHY (0xED300000)
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/* SD/MMC */
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#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
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#define S5PC100_PA_HSMMC0 S5PC100_PA_HSMMC(0)
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#define S5PC100_PA_HSMMC1 S5PC100_PA_HSMMC(1)
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#define S5PC100_PA_HSMMC2 S5PC100_PA_HSMMC(2)
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/* LCD */
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#define S5PC100_PA_FB (0xEE000000)
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/* Multimedia */
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#define S5PC100_PA_G2D (0xEE800000)
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#define S5PC100_PA_JPEG (0xEE500000)
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#define S5PC100_PA_ROTATOR (0xEE100000)
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#define S5PC100_PA_G3D (0xEF000000)
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/* I2S */
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#define S5PC100_PA_I2S0 (0xF2000000)
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#define S5PC100_PA_I2S1 (0xF2100000)
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#define S5PC100_PA_I2S2 (0xF2200000)
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/* KEYPAD */
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#define S5PC100_PA_KEYPAD (0xF3100000)
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/* ADC & TouchScreen */
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#define S5PC100_PA_TSADC (0xF3000000)
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/* ETC */
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#define S5PC100_PA_SDRAM (0x20000000)
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#define S5PC1XX_PA_SDRAM S5PC100_PA_SDRAM
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/* compatibility defines. */
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#define S3C_PA_RTC S5PC100_PA_RTC
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#define S3C_PA_UART S5PC100_PA_UART
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#define S3C_PA_UART0 (S5PC100_PA_UART + 0x0)
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#define S3C_PA_UART1 (S5PC100_PA_UART + 0x400)
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@ -67,9 +128,23 @@
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#define S3C_VA_UART2 (S3C_VA_UART + 0x800)
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#define S3C_VA_UART3 (S3C_VA_UART + 0xC00)
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#define S3C_UART_OFFSET 0x400
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#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
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#define S3C_PA_FB S5PC100_PA_FB
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#define S3C_PA_G2D S5PC100_PA_G2D
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#define S3C_PA_G3D S5PC100_PA_G3D
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#define S3C_PA_JPEG S5PC100_PA_JPEG
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#define S3C_PA_ROTATOR S5PC100_PA_ROTATOR
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#define S3C_VA_VIC0 (S3C_VA_IRQ + 0x0)
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#define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000)
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#define S3C_VA_VIC2 (S3C_VA_IRQ + 0x20000)
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#define S3C_PA_IIC S5PC100_PA_IIC
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#define S3C_PA_IIC S5PC100_PA_I2C
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#define S3C_PA_IIC1 S5PC100_PA_I2C1
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#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG
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#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY
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#define S3C_PA_HSMMC0 S5PC100_PA_HSMMC0
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#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC1
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#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC2
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#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD
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#define S3C_PA_TSADC S5PC100_PA_TSADC
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#endif /* __ASM_ARCH_C100_MAP_H */
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@ -92,7 +92,7 @@ static void __init smdkc100_machine_init(void)
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MACHINE_START(SMDKC100, "SMDKC100")
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/* Maintainer: Byungho Min <bhmin@samsung.com> */
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.phys_io = S5PC1XX_PA_UART & 0xfff00000,
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.phys_io = S5PC100_PA_UART & 0xfff00000,
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.io_pg_offst = (((u32)S5PC1XX_VA_UART) >> 18) & 0xfffc,
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.boot_params = S5PC100_PA_SDRAM + 0x100,
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