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spi: dw: Add support for the Canaan K210 SoC SPI
The Canaan Kendryte K210 RISC-V SoC includes a DW apb_ssi v4 controller which is documented to have a 32 words deep TX and RX FIFO. The FIFO length detection in spi_hw_init() correctly detects this value. However, when the controller RX FIFO is filled up to 32 entries (RXFLR = 32), an RX FIFO overrun error occurs. This likely due to a hardware bug which can be avoided by force setting the fifo_len field of struct dw_spi to 31. Define the dw_spi_canaan_k210_init() function to force set fifo_len to 31 when the device node compatible string is "canaan,k210-spi". Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Acked-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20201206011817.11700-4-damien.lemoal@wdc.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -222,6 +222,21 @@ static int dw_spi_keembay_init(struct platform_device *pdev,
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return 0;
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}
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static int dw_spi_canaan_k210_init(struct platform_device *pdev,
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struct dw_spi_mmio *dwsmmio)
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{
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/*
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* The Canaan Kendryte K210 SoC DW apb_ssi v4 spi controller is
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* documented to have a 32 word deep TX and RX FIFO, which
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* spi_hw_init() detects. However, when the RX FIFO is filled up to
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* 32 entries (RXFLR = 32), an RX FIFO overrun error occurs. Avoid this
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* problem by force setting fifo_len to 31.
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*/
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dwsmmio->dws.fifo_len = 31;
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return 0;
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}
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static int dw_spi_mmio_probe(struct platform_device *pdev)
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{
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int (*init_func)(struct platform_device *pdev,
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@ -335,6 +350,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] = {
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{ .compatible = "snps,dwc-ssi-1.01a", .data = dw_spi_dwc_ssi_init},
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{ .compatible = "intel,keembay-ssi", .data = dw_spi_keembay_init},
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{ .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
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{ .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},
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{ /* end of table */}
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};
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MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match);
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