mirror of https://gitee.com/openkylin/linux.git
clk: bcm2835: Migrate to clk_hw based registration and OF APIs
Now that we have clk_hw based provider APIs to register clks, we can get rid of struct clk pointers while registering clks in these drivers, allowing us to move closer to a clear split of consumer and provider clk APIs. Cc: Eric Anholt <eric@anholt.net> Cc: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
This commit is contained in:
Stephen Boyd
Stephen Boyd
parent
f4e8715099
commit
b19f009d45
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@ -25,7 +25,7 @@
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static int bcm2835_aux_clk_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct clk_onecell_data *onecell;
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struct clk_hw_onecell_data *onecell;
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const char *parent;
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struct clk *parent_clk;
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struct resource *res;
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@ -41,28 +41,24 @@ static int bcm2835_aux_clk_probe(struct platform_device *pdev)
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if (IS_ERR(reg))
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return PTR_ERR(reg);
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onecell = devm_kmalloc(dev, sizeof(*onecell), GFP_KERNEL);
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onecell = devm_kmalloc(dev, sizeof(*onecell) + sizeof(*onecell->hws) *
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BCM2835_AUX_CLOCK_COUNT, GFP_KERNEL);
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if (!onecell)
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return -ENOMEM;
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onecell->clk_num = BCM2835_AUX_CLOCK_COUNT;
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onecell->clks = devm_kcalloc(dev, BCM2835_AUX_CLOCK_COUNT,
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sizeof(*onecell->clks), GFP_KERNEL);
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if (!onecell->clks)
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return -ENOMEM;
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onecell->num = BCM2835_AUX_CLOCK_COUNT;
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gate = reg + BCM2835_AUXENB;
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onecell->clks[BCM2835_AUX_CLOCK_UART] =
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clk_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL);
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onecell->hws[BCM2835_AUX_CLOCK_UART] =
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clk_hw_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL);
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onecell->clks[BCM2835_AUX_CLOCK_SPI1] =
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clk_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL);
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onecell->hws[BCM2835_AUX_CLOCK_SPI1] =
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clk_hw_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL);
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onecell->clks[BCM2835_AUX_CLOCK_SPI2] =
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clk_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL);
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onecell->hws[BCM2835_AUX_CLOCK_SPI2] =
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clk_hw_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL);
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of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, onecell);
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return 0;
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return of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get,
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onecell);
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}
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static const struct of_device_id bcm2835_aux_clk_of_match[] = {
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@ -303,8 +303,8 @@ struct bcm2835_cprman {
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spinlock_t regs_lock; /* spinlock for all clocks */
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const char *osc_name;
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struct clk_onecell_data onecell;
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struct clk *clks[];
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/* Must be last */
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struct clk_hw_onecell_data onecell;
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};
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static inline void cprman_write(struct bcm2835_cprman *cprman, u32 reg, u32 val)
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@ -345,24 +345,24 @@ static int bcm2835_debugfs_regset(struct bcm2835_cprman *cprman, u32 base,
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*/
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void __init bcm2835_init_clocks(void)
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{
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struct clk *clk;
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struct clk_hw *hw;
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int ret;
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clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, 0, 126000000);
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if (IS_ERR(clk))
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hw = clk_hw_register_fixed_rate(NULL, "apb_pclk", NULL, 0, 126000000);
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if (IS_ERR(hw))
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pr_err("apb_pclk not registered\n");
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clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, 0, 3000000);
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if (IS_ERR(clk))
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hw = clk_hw_register_fixed_rate(NULL, "uart0_pclk", NULL, 0, 3000000);
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if (IS_ERR(hw))
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pr_err("uart0_pclk not registered\n");
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ret = clk_register_clkdev(clk, NULL, "20201000.uart");
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ret = clk_hw_register_clkdev(hw, NULL, "20201000.uart");
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if (ret)
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pr_err("uart0_pclk alias not registered\n");
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clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, 0, 125000000);
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if (IS_ERR(clk))
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hw = clk_hw_register_fixed_rate(NULL, "uart1_pclk", NULL, 0, 125000000);
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if (IS_ERR(hw))
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pr_err("uart1_pclk not registered\n");
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ret = clk_register_clkdev(clk, NULL, "20215000.uart");
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ret = clk_hw_register_clkdev(hw, NULL, "20215000.uart");
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if (ret)
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pr_err("uart1_pclk alias not registered\n");
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}
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@ -1147,11 +1147,12 @@ static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
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.debug_init = bcm2835_clock_debug_init,
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};
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static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
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const struct bcm2835_pll_data *data)
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static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman,
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const struct bcm2835_pll_data *data)
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{
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struct bcm2835_pll *pll;
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struct clk_init_data init;
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int ret;
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memset(&init, 0, sizeof(init));
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@ -1170,17 +1171,20 @@ static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
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pll->data = data;
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pll->hw.init = &init;
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return devm_clk_register(cprman->dev, &pll->hw);
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ret = devm_clk_hw_register(cprman->dev, &pll->hw);
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if (ret)
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return NULL;
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return &pll->hw;
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}
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static struct clk *
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static struct clk_hw *
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bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
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const struct bcm2835_pll_divider_data *data)
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{
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struct bcm2835_pll_divider *divider;
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struct clk_init_data init;
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struct clk *clk;
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const char *divider_name;
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int ret;
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if (data->fixed_divider != 1) {
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divider_name = devm_kasprintf(cprman->dev, GFP_KERNEL,
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@ -1214,32 +1218,33 @@ bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
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divider->cprman = cprman;
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divider->data = data;
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clk = devm_clk_register(cprman->dev, ÷r->div.hw);
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if (IS_ERR(clk))
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return clk;
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ret = devm_clk_hw_register(cprman->dev, ÷r->div.hw);
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if (ret)
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return ERR_PTR(ret);
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/*
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* PLLH's channels have a fixed divide by 10 afterwards, which
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* is what our consumers are actually using.
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*/
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if (data->fixed_divider != 1) {
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return clk_register_fixed_factor(cprman->dev, data->name,
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divider_name,
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CLK_SET_RATE_PARENT,
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1,
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data->fixed_divider);
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return clk_hw_register_fixed_factor(cprman->dev, data->name,
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divider_name,
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CLK_SET_RATE_PARENT,
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1,
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data->fixed_divider);
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}
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return clk;
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return ÷r->div.hw;
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}
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static struct clk *bcm2835_register_clock(struct bcm2835_cprman *cprman,
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static struct clk_hw *bcm2835_register_clock(struct bcm2835_cprman *cprman,
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const struct bcm2835_clock_data *data)
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{
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struct bcm2835_clock *clock;
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struct clk_init_data init;
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const char *parents[1 << CM_SRC_BITS];
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size_t i;
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int ret;
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/*
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* Replace our "xosc" references with the oscillator's
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@ -1279,7 +1284,10 @@ static struct clk *bcm2835_register_clock(struct bcm2835_cprman *cprman,
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clock->data = data;
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clock->hw.init = &init;
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return devm_clk_register(cprman->dev, &clock->hw);
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ret = devm_clk_hw_register(cprman->dev, &clock->hw);
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if (ret)
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return ERR_PTR(ret);
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return &clock->hw;
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}
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static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
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@ -1291,8 +1299,8 @@ static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
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CM_GATE_BIT, 0, &cprman->regs_lock);
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}
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typedef struct clk *(*bcm2835_clk_register)(struct bcm2835_cprman *cprman,
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const void *data);
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typedef struct clk_hw *(*bcm2835_clk_register)(struct bcm2835_cprman *cprman,
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const void *data);
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struct bcm2835_clk_desc {
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bcm2835_clk_register clk_register;
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const void *data;
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@ -1847,7 +1855,7 @@ static int bcm2835_mark_sdc_parent_critical(struct clk *sdc)
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static int bcm2835_clk_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct clk **clks;
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struct clk_hw **hws;
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struct bcm2835_cprman *cprman;
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struct resource *res;
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const struct bcm2835_clk_desc *desc;
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@ -1855,8 +1863,8 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
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size_t i;
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int ret;
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cprman = devm_kzalloc(dev,
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sizeof(*cprman) + asize * sizeof(*clks),
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cprman = devm_kzalloc(dev, sizeof(*cprman) +
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sizeof(*cprman->onecell.hws) * asize,
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GFP_KERNEL);
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if (!cprman)
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return -ENOMEM;
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@ -1874,22 +1882,21 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, cprman);
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cprman->onecell.clk_num = asize;
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cprman->onecell.clks = cprman->clks;
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clks = cprman->clks;
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cprman->onecell.num = asize;
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hws = cprman->onecell.hws;
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for (i = 0; i < asize; i++) {
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desc = &clk_desc_array[i];
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if (desc->clk_register && desc->data)
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clks[i] = desc->clk_register(cprman, desc->data);
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hws[i] = desc->clk_register(cprman, desc->data);
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}
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ret = bcm2835_mark_sdc_parent_critical(clks[BCM2835_CLOCK_SDRAM]);
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ret = bcm2835_mark_sdc_parent_critical(hws[BCM2835_CLOCK_SDRAM]->clk);
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if (ret)
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return ret;
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return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
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&cprman->onecell);
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return of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
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&cprman->onecell);
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}
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static const struct of_device_id bcm2835_clk_of_match[] = {
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