mirror of https://gitee.com/openkylin/linux.git
Merge branch 'sh/nommu' into sh-latest
This commit is contained in:
Paul Mundt
commit
b1bdd25566
|
|
@ -0,0 +1,75 @@
|
||||||
|
What: /sys/bus/xen-backend/devices/*/devtype
|
||||||
|
Date: Feb 2009
|
||||||
|
KernelVersion: 2.6.38
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
The type of the device. e.g., one of: 'vbd' (block),
|
||||||
|
'vif' (network), or 'vfb' (framebuffer).
|
||||||
|
|
||||||
|
What: /sys/bus/xen-backend/devices/*/nodename
|
||||||
|
Date: Feb 2009
|
||||||
|
KernelVersion: 2.6.38
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
XenStore node (under /local/domain/NNN/) for this
|
||||||
|
backend device.
|
||||||
|
|
||||||
|
What: /sys/bus/xen-backend/devices/vbd-*/physical_device
|
||||||
|
Date: April 2011
|
||||||
|
KernelVersion: 3.0
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
The major:minor number (in hexidecimal) of the
|
||||||
|
physical device providing the storage for this backend
|
||||||
|
block device.
|
||||||
|
|
||||||
|
What: /sys/bus/xen-backend/devices/vbd-*/mode
|
||||||
|
Date: April 2011
|
||||||
|
KernelVersion: 3.0
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
Whether the block device is read-only ('r') or
|
||||||
|
read-write ('w').
|
||||||
|
|
||||||
|
What: /sys/bus/xen-backend/devices/vbd-*/statistics/f_req
|
||||||
|
Date: April 2011
|
||||||
|
KernelVersion: 3.0
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
Number of flush requests from the frontend.
|
||||||
|
|
||||||
|
What: /sys/bus/xen-backend/devices/vbd-*/statistics/oo_req
|
||||||
|
Date: April 2011
|
||||||
|
KernelVersion: 3.0
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
Number of requests delayed because the backend was too
|
||||||
|
busy processing previous requests.
|
||||||
|
|
||||||
|
What: /sys/bus/xen-backend/devices/vbd-*/statistics/rd_req
|
||||||
|
Date: April 2011
|
||||||
|
KernelVersion: 3.0
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
Number of read requests from the frontend.
|
||||||
|
|
||||||
|
What: /sys/bus/xen-backend/devices/vbd-*/statistics/rd_sect
|
||||||
|
Date: April 2011
|
||||||
|
KernelVersion: 3.0
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
Number of sectors read by the frontend.
|
||||||
|
|
||||||
|
What: /sys/bus/xen-backend/devices/vbd-*/statistics/wr_req
|
||||||
|
Date: April 2011
|
||||||
|
KernelVersion: 3.0
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
Number of write requests from the frontend.
|
||||||
|
|
||||||
|
What: /sys/bus/xen-backend/devices/vbd-*/statistics/wr_sect
|
||||||
|
Date: April 2011
|
||||||
|
KernelVersion: 3.0
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
Number of sectors written by the frontend.
|
||||||
|
|
@ -0,0 +1,77 @@
|
||||||
|
What: /sys/devices/system/xen_memory/xen_memory0/max_retry_count
|
||||||
|
Date: May 2011
|
||||||
|
KernelVersion: 2.6.39
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
The maximum number of times the balloon driver will
|
||||||
|
attempt to increase the balloon before giving up. See
|
||||||
|
also 'retry_count' below.
|
||||||
|
A value of zero means retry forever and is the default one.
|
||||||
|
|
||||||
|
What: /sys/devices/system/xen_memory/xen_memory0/max_schedule_delay
|
||||||
|
Date: May 2011
|
||||||
|
KernelVersion: 2.6.39
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
The limit that 'schedule_delay' (see below) will be
|
||||||
|
increased to. The default value is 32 seconds.
|
||||||
|
|
||||||
|
What: /sys/devices/system/xen_memory/xen_memory0/retry_count
|
||||||
|
Date: May 2011
|
||||||
|
KernelVersion: 2.6.39
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
The current number of times that the balloon driver
|
||||||
|
has attempted to increase the size of the balloon.
|
||||||
|
The default value is one. With max_retry_count being
|
||||||
|
zero (unlimited), this means that the driver will attempt
|
||||||
|
to retry with a 'schedule_delay' delay.
|
||||||
|
|
||||||
|
What: /sys/devices/system/xen_memory/xen_memory0/schedule_delay
|
||||||
|
Date: May 2011
|
||||||
|
KernelVersion: 2.6.39
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
The time (in seconds) to wait between attempts to
|
||||||
|
increase the balloon. Each time the balloon cannot be
|
||||||
|
increased, 'schedule_delay' is increased (until
|
||||||
|
'max_schedule_delay' is reached at which point it
|
||||||
|
will use the max value).
|
||||||
|
|
||||||
|
What: /sys/devices/system/xen_memory/xen_memory0/target
|
||||||
|
Date: April 2008
|
||||||
|
KernelVersion: 2.6.26
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
The target number of pages to adjust this domain's
|
||||||
|
memory reservation to.
|
||||||
|
|
||||||
|
What: /sys/devices/system/xen_memory/xen_memory0/target_kb
|
||||||
|
Date: April 2008
|
||||||
|
KernelVersion: 2.6.26
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
As target above, except the value is in KiB.
|
||||||
|
|
||||||
|
What: /sys/devices/system/xen_memory/xen_memory0/info/current_kb
|
||||||
|
Date: April 2008
|
||||||
|
KernelVersion: 2.6.26
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
Current size (in KiB) of this domain's memory
|
||||||
|
reservation.
|
||||||
|
|
||||||
|
What: /sys/devices/system/xen_memory/xen_memory0/info/high_kb
|
||||||
|
Date: April 2008
|
||||||
|
KernelVersion: 2.6.26
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
Amount (in KiB) of high memory in the balloon.
|
||||||
|
|
||||||
|
What: /sys/devices/system/xen_memory/xen_memory0/info/low_kb
|
||||||
|
Date: April 2008
|
||||||
|
KernelVersion: 2.6.26
|
||||||
|
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||||
|
Description:
|
||||||
|
Amount (in KiB) of low (or normal) memory in the
|
||||||
|
balloon.
|
||||||
|
|
@ -66,6 +66,24 @@ Description:
|
||||||
re-discover previously removed devices.
|
re-discover previously removed devices.
|
||||||
Depends on CONFIG_HOTPLUG.
|
Depends on CONFIG_HOTPLUG.
|
||||||
|
|
||||||
|
What: /sys/bus/pci/devices/.../msi_irqs/
|
||||||
|
Date: September, 2011
|
||||||
|
Contact: Neil Horman <nhorman@tuxdriver.com>
|
||||||
|
Description:
|
||||||
|
The /sys/devices/.../msi_irqs directory contains a variable set
|
||||||
|
of sub-directories, with each sub-directory being named after a
|
||||||
|
corresponding msi irq vector allocated to that device. Each
|
||||||
|
numbered sub-directory N contains attributes of that irq.
|
||||||
|
Note that this directory is not created for device drivers which
|
||||||
|
do not support msi irqs
|
||||||
|
|
||||||
|
What: /sys/bus/pci/devices/.../msi_irqs/<N>/mode
|
||||||
|
Date: September 2011
|
||||||
|
Contact: Neil Horman <nhorman@tuxdriver.com>
|
||||||
|
Description:
|
||||||
|
This attribute indicates the mode that the irq vector named by
|
||||||
|
the parent directory is in (msi vs. msix)
|
||||||
|
|
||||||
What: /sys/bus/pci/devices/.../remove
|
What: /sys/bus/pci/devices/.../remove
|
||||||
Date: January 2009
|
Date: January 2009
|
||||||
Contact: Linux PCI developers <linux-pci@vger.kernel.org>
|
Contact: Linux PCI developers <linux-pci@vger.kernel.org>
|
||||||
|
|
|
||||||
|
|
@ -119,6 +119,31 @@ Description:
|
||||||
Write a 1 to force the device to disconnect
|
Write a 1 to force the device to disconnect
|
||||||
(equivalent to unplugging a wired USB device).
|
(equivalent to unplugging a wired USB device).
|
||||||
|
|
||||||
|
What: /sys/bus/usb/drivers/.../new_id
|
||||||
|
Date: October 2011
|
||||||
|
Contact: linux-usb@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
Writing a device ID to this file will attempt to
|
||||||
|
dynamically add a new device ID to a USB device driver.
|
||||||
|
This may allow the driver to support more hardware than
|
||||||
|
was included in the driver's static device ID support
|
||||||
|
table at compile time. The format for the device ID is:
|
||||||
|
idVendor idProduct bInterfaceClass.
|
||||||
|
The vendor ID and device ID fields are required, the
|
||||||
|
interface class is optional.
|
||||||
|
Upon successfully adding an ID, the driver will probe
|
||||||
|
for the device and attempt to bind to it. For example:
|
||||||
|
# echo "8086 10f5" > /sys/bus/usb/drivers/foo/new_id
|
||||||
|
|
||||||
|
What: /sys/bus/usb-serial/drivers/.../new_id
|
||||||
|
Date: October 2011
|
||||||
|
Contact: linux-usb@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
For serial USB drivers, this attribute appears under the
|
||||||
|
extra bus folder "usb-serial" in sysfs; apart from that
|
||||||
|
difference, all descriptions from the entry
|
||||||
|
"/sys/bus/usb/drivers/.../new_id" apply.
|
||||||
|
|
||||||
What: /sys/bus/usb/drivers/.../remove_id
|
What: /sys/bus/usb/drivers/.../remove_id
|
||||||
Date: November 2009
|
Date: November 2009
|
||||||
Contact: CHENG Renquan <rqcheng@smu.edu.sg>
|
Contact: CHENG Renquan <rqcheng@smu.edu.sg>
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,12 @@
|
||||||
|
What: Attribute for calibrating ST-Ericsson AB8500 Real Time Clock
|
||||||
|
Date: Oct 2011
|
||||||
|
KernelVersion: 3.0
|
||||||
|
Contact: Mark Godfrey <mark.godfrey@stericsson.com>
|
||||||
|
Description: The rtc_calibration attribute allows the userspace to
|
||||||
|
calibrate the AB8500.s 32KHz Real Time Clock.
|
||||||
|
Every 60 seconds the AB8500 will correct the RTC's value
|
||||||
|
by adding to it the value of this attribute.
|
||||||
|
The range of the attribute is -127 to +127 in units of
|
||||||
|
30.5 micro-seconds (half-parts-per-million of the 32KHz clock)
|
||||||
|
Users: The /vendor/st-ericsson/base_utilities/core/rtc_calibration
|
||||||
|
daemon uses this interface.
|
||||||
|
|
@ -0,0 +1,34 @@
|
||||||
|
What: /sys/devices/platform/docg3/f[0-3]_dps[01]_is_keylocked
|
||||||
|
Date: November 2011
|
||||||
|
KernelVersion: 3.3
|
||||||
|
Contact: Robert Jarzmik <robert.jarzmik@free.fr>
|
||||||
|
Description:
|
||||||
|
Show whether the floor (0 to 4), protection area (0 or 1) is
|
||||||
|
keylocked. Each docg3 chip (or floor) has 2 protection areas,
|
||||||
|
which can cover any part of it, block aligned, called DPS.
|
||||||
|
The protection has information embedded whether it blocks reads,
|
||||||
|
writes or both.
|
||||||
|
The result is:
|
||||||
|
0 -> the DPS is not keylocked
|
||||||
|
1 -> the DPS is keylocked
|
||||||
|
Users: None identified so far.
|
||||||
|
|
||||||
|
What: /sys/devices/platform/docg3/f[0-3]_dps[01]_protection_key
|
||||||
|
Date: November 2011
|
||||||
|
KernelVersion: 3.3
|
||||||
|
Contact: Robert Jarzmik <robert.jarzmik@free.fr>
|
||||||
|
Description:
|
||||||
|
Enter the protection key for the floor (0 to 4), protection area
|
||||||
|
(0 or 1). Each docg3 chip (or floor) has 2 protection areas,
|
||||||
|
which can cover any part of it, block aligned, called DPS.
|
||||||
|
The protection has information embedded whether it blocks reads,
|
||||||
|
writes or both.
|
||||||
|
The protection key is a string of 8 bytes (value 0-255).
|
||||||
|
Entering the correct value toggle the lock, and can be observed
|
||||||
|
through f[0-3]_dps[01]_is_keylocked.
|
||||||
|
Possible values are:
|
||||||
|
- 8 bytes
|
||||||
|
Typical values are:
|
||||||
|
- "00000000"
|
||||||
|
- "12345678"
|
||||||
|
Users: None identified so far.
|
||||||
|
|
@ -0,0 +1,9 @@
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/quirks
|
||||||
|
Date: November 2011
|
||||||
|
Contact: Benjamin Tissoires <benjamin.tissoires@gmail.com>
|
||||||
|
Description: The integer value of this attribute corresponds to the
|
||||||
|
quirks actually in place to handle the device's protocol.
|
||||||
|
When read, this attribute returns the current settings (see
|
||||||
|
MT_QUIRKS_* in hid-multitouch.c).
|
||||||
|
When written this attribute change on the fly the quirks, then
|
||||||
|
the protocol to handle the device.
|
||||||
|
|
@ -0,0 +1,135 @@
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/actual_profile
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: The integer value of this attribute ranges from 0-4.
|
||||||
|
When read, this attribute returns the number of the actual
|
||||||
|
profile. This value is persistent, so its equivalent to the
|
||||||
|
profile that's active when the device is powered on next time.
|
||||||
|
When written, this file sets the number of the startup profile
|
||||||
|
and the device activates this profile immediately.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/info
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When read, this file returns general data like firmware version.
|
||||||
|
The data is 6 bytes long.
|
||||||
|
This file is readonly.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/key_mask
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one deactivate certain keys like
|
||||||
|
windows and application keys, to prevent accidental presses.
|
||||||
|
Profile number for which this settings occur is included in
|
||||||
|
written data. The data has to be 6 bytes long.
|
||||||
|
Before reading this file, control has to be written to select
|
||||||
|
which profile to read.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_capslock
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one set the function of the
|
||||||
|
capslock key for a specific profile. Profile number is included
|
||||||
|
in written data. The data has to be 6 bytes long.
|
||||||
|
Before reading this file, control has to be written to select
|
||||||
|
which profile to read.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_easyzone
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one set the function of the
|
||||||
|
easyzone keys for a specific profile. Profile number is included
|
||||||
|
in written data. The data has to be 65 bytes long.
|
||||||
|
Before reading this file, control has to be written to select
|
||||||
|
which profile to read.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_function
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one set the function of the
|
||||||
|
function keys for a specific profile. Profile number is included
|
||||||
|
in written data. The data has to be 41 bytes long.
|
||||||
|
Before reading this file, control has to be written to select
|
||||||
|
which profile to read.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_macro
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one set the function of the macro
|
||||||
|
keys for a specific profile. Profile number is included in
|
||||||
|
written data. The data has to be 35 bytes long.
|
||||||
|
Before reading this file, control has to be written to select
|
||||||
|
which profile to read.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_media
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one set the function of the media
|
||||||
|
keys for a specific profile. Profile number is included in
|
||||||
|
written data. The data has to be 29 bytes long.
|
||||||
|
Before reading this file, control has to be written to select
|
||||||
|
which profile to read.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_thumbster
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one set the function of the
|
||||||
|
thumbster keys for a specific profile. Profile number is included
|
||||||
|
in written data. The data has to be 23 bytes long.
|
||||||
|
Before reading this file, control has to be written to select
|
||||||
|
which profile to read.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/last_set
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one set the time in secs since
|
||||||
|
epoch in which the last configuration took place.
|
||||||
|
The data has to be 20 bytes long.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/light
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one set the backlight intensity for
|
||||||
|
a specific profile. Profile number is included in written data.
|
||||||
|
The data has to be 10 bytes long.
|
||||||
|
Before reading this file, control has to be written to select
|
||||||
|
which profile to read.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/macro
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one store macros with max 500
|
||||||
|
keystrokes for a specific button for a specific profile.
|
||||||
|
Button and profile numbers are included in written data.
|
||||||
|
The data has to be 2083 bytes long.
|
||||||
|
Before reading this file, control has to be written to select
|
||||||
|
which profile and key to read.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/control
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one select which data from which
|
||||||
|
profile will be read next. The data has to be 3 bytes long.
|
||||||
|
This file is writeonly.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
||||||
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/talk
|
||||||
|
Date: June 2011
|
||||||
|
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||||
|
Description: When written, this file lets one trigger easyshift functionality
|
||||||
|
from the host.
|
||||||
|
The data has to be 16 bytes long.
|
||||||
|
This file is writeonly.
|
||||||
|
Users: http://roccat.sourceforge.net
|
||||||
|
|
@ -8,3 +8,15 @@ Contact: David Herrmann <dh.herrmann@googlemail.com>
|
||||||
Description: Make it possible to set/get current led state. Reading from it
|
Description: Make it possible to set/get current led state. Reading from it
|
||||||
returns 0 if led is off and 1 if it is on. Writing 0 to it
|
returns 0 if led is off and 1 if it is on. Writing 0 to it
|
||||||
disables the led, writing 1 enables it.
|
disables the led, writing 1 enables it.
|
||||||
|
|
||||||
|
What: /sys/bus/hid/drivers/wiimote/<dev>/extension
|
||||||
|
Date: August 2011
|
||||||
|
KernelVersion: 3.2
|
||||||
|
Contact: David Herrmann <dh.herrmann@googlemail.com>
|
||||||
|
Description: This file contains the currently connected and initialized
|
||||||
|
extensions. It can be one of: none, motionp, nunchuck, classic,
|
||||||
|
motionp+nunchuck, motionp+classic
|
||||||
|
motionp is the official Nintendo Motion+ extension, nunchuck is
|
||||||
|
the official Nintendo Nunchuck extension and classic is the
|
||||||
|
Nintendo Classic Controller extension. The motionp extension can
|
||||||
|
be combined with the other two.
|
||||||
|
|
|
||||||
|
|
@ -15,9 +15,9 @@ Contact: linux-input@vger.kernel.org
|
||||||
Description:
|
Description:
|
||||||
Attribute group for control of the status LEDs and the OLEDs.
|
Attribute group for control of the status LEDs and the OLEDs.
|
||||||
This attribute group is only available for Intuos 4 M, L,
|
This attribute group is only available for Intuos 4 M, L,
|
||||||
and XL (with LEDs and OLEDs) and Cintiq 21UX2 (LEDs only).
|
and XL (with LEDs and OLEDs) and Cintiq 21UX2 and Cintiq 24HD
|
||||||
Therefore its presence implicitly signifies the presence of
|
(LEDs only). Therefore its presence implicitly signifies the
|
||||||
said LEDs and OLEDs on the tablet device.
|
presence of said LEDs and OLEDs on the tablet device.
|
||||||
|
|
||||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status0_luminance
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status0_luminance
|
||||||
Date: August 2011
|
Date: August 2011
|
||||||
|
|
@ -41,16 +41,17 @@ Date: August 2011
|
||||||
Contact: linux-input@vger.kernel.org
|
Contact: linux-input@vger.kernel.org
|
||||||
Description:
|
Description:
|
||||||
Writing to this file sets which one of the four (for Intuos 4)
|
Writing to this file sets which one of the four (for Intuos 4)
|
||||||
or of the right four (for Cintiq 21UX2) status LEDs is active (0..3).
|
or of the right four (for Cintiq 21UX2 and Cintiq 24HD) status
|
||||||
The other three LEDs on the same side are always inactive.
|
LEDs is active (0..3). The other three LEDs on the same side are
|
||||||
|
always inactive.
|
||||||
|
|
||||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status_led1_select
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status_led1_select
|
||||||
Date: September 2011
|
Date: September 2011
|
||||||
Contact: linux-input@vger.kernel.org
|
Contact: linux-input@vger.kernel.org
|
||||||
Description:
|
Description:
|
||||||
Writing to this file sets which one of the left four (for Cintiq 21UX2)
|
Writing to this file sets which one of the left four (for Cintiq 21UX2
|
||||||
status LEDs is active (0..3). The other three LEDs on the left are always
|
and Cintiq 24HD) status LEDs is active (0..3). The other three LEDs on
|
||||||
inactive.
|
the left are always inactive.
|
||||||
|
|
||||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/buttons_luminance
|
What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/buttons_luminance
|
||||||
Date: August 2011
|
Date: August 2011
|
||||||
|
|
|
||||||
|
|
@ -594,53 +594,44 @@ rmdir() will fail with it. From this behavior, pre_destroy() can be
|
||||||
called multiple times against a cgroup.
|
called multiple times against a cgroup.
|
||||||
|
|
||||||
int can_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
|
int can_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
|
||||||
struct task_struct *task)
|
struct cgroup_taskset *tset)
|
||||||
(cgroup_mutex held by caller)
|
(cgroup_mutex held by caller)
|
||||||
|
|
||||||
Called prior to moving a task into a cgroup; if the subsystem
|
Called prior to moving one or more tasks into a cgroup; if the
|
||||||
returns an error, this will abort the attach operation. If a NULL
|
subsystem returns an error, this will abort the attach operation.
|
||||||
task is passed, then a successful result indicates that *any*
|
@tset contains the tasks to be attached and is guaranteed to have at
|
||||||
unspecified task can be moved into the cgroup. Note that this isn't
|
least one task in it.
|
||||||
called on a fork. If this method returns 0 (success) then this should
|
|
||||||
remain valid while the caller holds cgroup_mutex and it is ensured that either
|
If there are multiple tasks in the taskset, then:
|
||||||
|
- it's guaranteed that all are from the same thread group
|
||||||
|
- @tset contains all tasks from the thread group whether or not
|
||||||
|
they're switching cgroups
|
||||||
|
- the first task is the leader
|
||||||
|
|
||||||
|
Each @tset entry also contains the task's old cgroup and tasks which
|
||||||
|
aren't switching cgroup can be skipped easily using the
|
||||||
|
cgroup_taskset_for_each() iterator. Note that this isn't called on a
|
||||||
|
fork. If this method returns 0 (success) then this should remain valid
|
||||||
|
while the caller holds cgroup_mutex and it is ensured that either
|
||||||
attach() or cancel_attach() will be called in future.
|
attach() or cancel_attach() will be called in future.
|
||||||
|
|
||||||
int can_attach_task(struct cgroup *cgrp, struct task_struct *tsk);
|
|
||||||
(cgroup_mutex held by caller)
|
|
||||||
|
|
||||||
As can_attach, but for operations that must be run once per task to be
|
|
||||||
attached (possibly many when using cgroup_attach_proc). Called after
|
|
||||||
can_attach.
|
|
||||||
|
|
||||||
void cancel_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
|
void cancel_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
|
||||||
struct task_struct *task, bool threadgroup)
|
struct cgroup_taskset *tset)
|
||||||
(cgroup_mutex held by caller)
|
(cgroup_mutex held by caller)
|
||||||
|
|
||||||
Called when a task attach operation has failed after can_attach() has succeeded.
|
Called when a task attach operation has failed after can_attach() has succeeded.
|
||||||
A subsystem whose can_attach() has some side-effects should provide this
|
A subsystem whose can_attach() has some side-effects should provide this
|
||||||
function, so that the subsystem can implement a rollback. If not, not necessary.
|
function, so that the subsystem can implement a rollback. If not, not necessary.
|
||||||
This will be called only about subsystems whose can_attach() operation have
|
This will be called only about subsystems whose can_attach() operation have
|
||||||
succeeded.
|
succeeded. The parameters are identical to can_attach().
|
||||||
|
|
||||||
void pre_attach(struct cgroup *cgrp);
|
|
||||||
(cgroup_mutex held by caller)
|
|
||||||
|
|
||||||
For any non-per-thread attachment work that needs to happen before
|
|
||||||
attach_task. Needed by cpuset.
|
|
||||||
|
|
||||||
void attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
|
void attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
|
||||||
struct cgroup *old_cgrp, struct task_struct *task)
|
struct cgroup_taskset *tset)
|
||||||
(cgroup_mutex held by caller)
|
(cgroup_mutex held by caller)
|
||||||
|
|
||||||
Called after the task has been attached to the cgroup, to allow any
|
Called after the task has been attached to the cgroup, to allow any
|
||||||
post-attachment activity that requires memory allocations or blocking.
|
post-attachment activity that requires memory allocations or blocking.
|
||||||
|
The parameters are identical to can_attach().
|
||||||
void attach_task(struct cgroup *cgrp, struct task_struct *tsk);
|
|
||||||
(cgroup_mutex held by caller)
|
|
||||||
|
|
||||||
As attach, but for operations that must be run once per task to be attached,
|
|
||||||
like can_attach_task. Called before attach. Currently does not support any
|
|
||||||
subsystem that might need the old_cgrp for every thread in the group.
|
|
||||||
|
|
||||||
void fork(struct cgroup_subsy *ss, struct task_struct *task)
|
void fork(struct cgroup_subsy *ss, struct task_struct *task)
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -21,6 +21,10 @@ i.MX53 Smart Mobile Reference Design Board
|
||||||
Required root node properties:
|
Required root node properties:
|
||||||
- compatible = "fsl,imx53-smd", "fsl,imx53";
|
- compatible = "fsl,imx53-smd", "fsl,imx53";
|
||||||
|
|
||||||
i.MX6 Quad SABRE Automotive Board
|
i.MX6 Quad Armadillo2 Board
|
||||||
Required root node properties:
|
Required root node properties:
|
||||||
- compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
|
- compatible = "fsl,imx6q-arm2", "fsl,imx6q";
|
||||||
|
|
||||||
|
i.MX6 Quad SABRE Lite Board
|
||||||
|
Required root node properties:
|
||||||
|
- compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,8 @@
|
||||||
|
* Insignal's Exynos4210 based Origen evaluation board
|
||||||
|
|
||||||
|
Origen low-cost evaluation board is based on Samsung's Exynos4210 SoC.
|
||||||
|
|
||||||
|
Required root node properties:
|
||||||
|
- compatible = should be one or more of the following.
|
||||||
|
(a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
|
||||||
|
(b) "samsung,exynos4210" - for boards based on Exynos4210 SoC.
|
||||||
|
|
@ -0,0 +1,8 @@
|
||||||
|
* Samsung's Exynos4210 based SMDKV310 evaluation board
|
||||||
|
|
||||||
|
SMDKV310 evaluation board is based on Samsung's Exynos4210 SoC.
|
||||||
|
|
||||||
|
Required root node properties:
|
||||||
|
- compatible = should be one or more of the following.
|
||||||
|
(a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
|
||||||
|
(b) "samsung,exynos4210" - for boards based on Exynos4210 SoC.
|
||||||
|
|
@ -0,0 +1,14 @@
|
||||||
|
NVIDIA Tegra device tree bindings
|
||||||
|
-------------------------------------------
|
||||||
|
|
||||||
|
Boards with the tegra20 SoC shall have the following properties:
|
||||||
|
|
||||||
|
Required root node property:
|
||||||
|
|
||||||
|
compatible = "nvidia,tegra20";
|
||||||
|
|
||||||
|
Boards with the tegra30 SoC shall have the following properties:
|
||||||
|
|
||||||
|
Required root node property:
|
||||||
|
|
||||||
|
compatible = "nvidia,tegra30";
|
||||||
|
|
@ -0,0 +1,40 @@
|
||||||
|
C6X PLL Clock Controllers
|
||||||
|
-------------------------
|
||||||
|
|
||||||
|
This is a first-cut support for the SoC clock controllers. This is still
|
||||||
|
under development and will probably change as the common device tree
|
||||||
|
clock support is added to the kernel.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
|
||||||
|
- compatible: "ti,c64x+pll"
|
||||||
|
May also have SoC-specific value to support SoC-specific initialization
|
||||||
|
in the driver. One of:
|
||||||
|
"ti,c6455-pll"
|
||||||
|
"ti,c6457-pll"
|
||||||
|
"ti,c6472-pll"
|
||||||
|
"ti,c6474-pll"
|
||||||
|
|
||||||
|
- reg: base address and size of register area
|
||||||
|
- clock-frequency: input clock frequency in hz
|
||||||
|
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
|
||||||
|
- ti,c64x+pll-bypass-delay: CPU cycles to delay when entering bypass mode
|
||||||
|
|
||||||
|
- ti,c64x+pll-reset-delay: CPU cycles to delay after PLL reset
|
||||||
|
|
||||||
|
- ti,c64x+pll-lock-delay: CPU cycles to delay after PLL frequency change
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
clock-controller@29a0000 {
|
||||||
|
compatible = "ti,c6472-pll", "ti,c64x+pll";
|
||||||
|
reg = <0x029a0000 0x200>;
|
||||||
|
clock-frequency = <25000000>;
|
||||||
|
|
||||||
|
ti,c64x+pll-bypass-delay = <200>;
|
||||||
|
ti,c64x+pll-reset-delay = <12000>;
|
||||||
|
ti,c64x+pll-lock-delay = <80000>;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,127 @@
|
||||||
|
Device State Configuration Registers
|
||||||
|
------------------------------------
|
||||||
|
|
||||||
|
TI C6X SoCs contain a region of miscellaneous registers which provide various
|
||||||
|
function for SoC control or status. Details vary considerably among from SoC
|
||||||
|
to SoC with no two being alike.
|
||||||
|
|
||||||
|
In general, the Device State Configuraion Registers (DSCR) will provide one or
|
||||||
|
more configuration registers often protected by a lock register where one or
|
||||||
|
more key values must be written to a lock register in order to unlock the
|
||||||
|
configuration register for writes. These configuration register may be used to
|
||||||
|
enable (and disable in some cases) SoC pin drivers, select peripheral clock
|
||||||
|
sources (internal or pin), etc. In some cases, a configuration register is
|
||||||
|
write once or the individual bits are write once. In addition to device config,
|
||||||
|
the DSCR block may provide registers which which are used to reset peripherals,
|
||||||
|
provide device ID information, provide ethernet MAC addresses, as well as other
|
||||||
|
miscellaneous functions.
|
||||||
|
|
||||||
|
For device state control (enable/disable), each device control is assigned an
|
||||||
|
id which is used by individual device drivers to control the state as needed.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
|
||||||
|
- compatible: must be "ti,c64x+dscr"
|
||||||
|
- reg: register area base and size
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
|
||||||
|
NOTE: These are optional in that not all SoCs will have all properties. For
|
||||||
|
SoCs which do support a given property, leaving the property out of the
|
||||||
|
device tree will result in reduced functionality or possibly driver
|
||||||
|
failure.
|
||||||
|
|
||||||
|
- ti,dscr-devstat
|
||||||
|
offset of the devstat register
|
||||||
|
|
||||||
|
- ti,dscr-silicon-rev
|
||||||
|
offset, start bit, and bitsize of silicon revision field
|
||||||
|
|
||||||
|
- ti,dscr-rmii-resets
|
||||||
|
offset and bitmask of RMII reset field. May have multiple tuples if more
|
||||||
|
than one ethernet port is available.
|
||||||
|
|
||||||
|
- ti,dscr-locked-regs
|
||||||
|
possibly multiple tuples describing registers which are write protected by
|
||||||
|
a lock register. Each tuple consists of the register offset, lock register
|
||||||
|
offsset, and the key value used to unlock the register.
|
||||||
|
|
||||||
|
- ti,dscr-kick-regs
|
||||||
|
offset and key values of two "kick" registers used to write protect other
|
||||||
|
registers in DSCR. On SoCs using kick registers, the first key must be
|
||||||
|
written to the first kick register and the second key must be written to
|
||||||
|
the second register before other registers in the area are write-enabled.
|
||||||
|
|
||||||
|
- ti,dscr-mac-fuse-regs
|
||||||
|
MAC addresses are contained in two registers. Each element of a MAC address
|
||||||
|
is contained in a single byte. This property has two tuples. Each tuple has
|
||||||
|
a register offset and four cells representing bytes in the register from
|
||||||
|
most significant to least. The value of these four cells is the MAC byte
|
||||||
|
index (1-6) of the byte within the register. A value of 0 means the byte
|
||||||
|
is unused in the MAC address.
|
||||||
|
|
||||||
|
- ti,dscr-devstate-ctl-regs
|
||||||
|
This property describes the bitfields used to control the state of devices.
|
||||||
|
Each tuple describes a range of identical bitfields used to control one or
|
||||||
|
more devices (one bitfield per device). The layout of each tuple is:
|
||||||
|
|
||||||
|
start_id num_ids reg enable disable start_bit nbits
|
||||||
|
|
||||||
|
Where:
|
||||||
|
start_id is device id for the first device control in the range
|
||||||
|
num_ids is the number of device controls in the range
|
||||||
|
reg is the offset of the register holding the control bits
|
||||||
|
enable is the value to enable a device
|
||||||
|
disable is the value to disable a device (0xffffffff if cannot disable)
|
||||||
|
start_bit is the bit number of the first bit in the range
|
||||||
|
nbits is the number of bits per device control
|
||||||
|
|
||||||
|
- ti,dscr-devstate-stat-regs
|
||||||
|
This property describes the bitfields used to provide device state status
|
||||||
|
for device states controlled by the DSCR. Each tuple describes a range of
|
||||||
|
identical bitfields used to provide status for one or more devices (one
|
||||||
|
bitfield per device). The layout of each tuple is:
|
||||||
|
|
||||||
|
start_id num_ids reg enable disable start_bit nbits
|
||||||
|
|
||||||
|
Where:
|
||||||
|
start_id is device id for the first device status in the range
|
||||||
|
num_ids is the number of devices covered by the range
|
||||||
|
reg is the offset of the register holding the status bits
|
||||||
|
enable is the value indicating device is enabled
|
||||||
|
disable is the value indicating device is disabled
|
||||||
|
start_bit is the bit number of the first bit in the range
|
||||||
|
nbits is the number of bits per device status
|
||||||
|
|
||||||
|
- ti,dscr-privperm
|
||||||
|
Offset and default value for register used to set access privilege for
|
||||||
|
some SoC devices.
|
||||||
|
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
device-state-config-regs@2a80000 {
|
||||||
|
compatible = "ti,c64x+dscr";
|
||||||
|
reg = <0x02a80000 0x41000>;
|
||||||
|
|
||||||
|
ti,dscr-devstat = <0>;
|
||||||
|
ti,dscr-silicon-rev = <8 28 0xf>;
|
||||||
|
ti,dscr-rmii-resets = <0x40020 0x00040000>;
|
||||||
|
|
||||||
|
ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
|
||||||
|
ti,dscr-devstate-ctl-regs =
|
||||||
|
<0 12 0x40008 1 0 0 2
|
||||||
|
12 1 0x40008 3 0 30 2
|
||||||
|
13 2 0x4002c 1 0xffffffff 0 1>;
|
||||||
|
ti,dscr-devstate-stat-regs =
|
||||||
|
<0 10 0x40014 1 0 0 3
|
||||||
|
10 2 0x40018 1 0 0 3>;
|
||||||
|
|
||||||
|
ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
|
||||||
|
0x704 5 6 0 0>;
|
||||||
|
|
||||||
|
ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
|
||||||
|
|
||||||
|
ti,dscr-kick-regs = <0x38 0x83E70B13
|
||||||
|
0x3c 0x95A4F1E0>;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,62 @@
|
||||||
|
External Memory Interface
|
||||||
|
-------------------------
|
||||||
|
|
||||||
|
The emifa node describes a simple external bus controller found on some C6X
|
||||||
|
SoCs. This interface provides external busses with a number of chip selects.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
|
||||||
|
- compatible: must be "ti,c64x+emifa", "simple-bus"
|
||||||
|
- reg: register area base and size
|
||||||
|
- #address-cells: must be 2 (chip-select + offset)
|
||||||
|
- #size-cells: must be 1
|
||||||
|
- ranges: mapping from EMIFA space to parent space
|
||||||
|
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
|
||||||
|
- ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
|
||||||
|
|
||||||
|
- ti,emifa-burst-priority:
|
||||||
|
Number of memory transfers after which the EMIF will elevate the priority
|
||||||
|
of the oldest command in the command FIFO. Setting this field to 255
|
||||||
|
disables this feature, thereby allowing old commands to stay in the FIFO
|
||||||
|
indefinitely.
|
||||||
|
|
||||||
|
- ti,emifa-ce-config:
|
||||||
|
Configuration values for each of the supported chip selects.
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
emifa@70000000 {
|
||||||
|
compatible = "ti,c64x+emifa", "simple-bus";
|
||||||
|
#address-cells = <2>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
reg = <0x70000000 0x100>;
|
||||||
|
ranges = <0x2 0x0 0xa0000000 0x00000008
|
||||||
|
0x3 0x0 0xb0000000 0x00400000
|
||||||
|
0x4 0x0 0xc0000000 0x10000000
|
||||||
|
0x5 0x0 0xD0000000 0x10000000>;
|
||||||
|
|
||||||
|
ti,dscr-dev-enable = <13>;
|
||||||
|
ti,emifa-burst-priority = <255>;
|
||||||
|
ti,emifa-ce-config = <0x00240120
|
||||||
|
0x00240120
|
||||||
|
0x00240122
|
||||||
|
0x00240122>;
|
||||||
|
|
||||||
|
flash@3,0 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
compatible = "cfi-flash";
|
||||||
|
reg = <0x3 0x0 0x400000>;
|
||||||
|
bank-width = <1>;
|
||||||
|
device-width = <1>;
|
||||||
|
partition@0 {
|
||||||
|
reg = <0x0 0x400000>;
|
||||||
|
label = "NOR";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
This shows a flash chip attached to chip select 3.
|
||||||
|
|
@ -0,0 +1,104 @@
|
||||||
|
C6X Interrupt Chips
|
||||||
|
-------------------
|
||||||
|
|
||||||
|
* C64X+ Core Interrupt Controller
|
||||||
|
|
||||||
|
The core interrupt controller provides 16 prioritized interrupts to the
|
||||||
|
C64X+ core. Priority 0 and 1 are used for reset and NMI respectively.
|
||||||
|
Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt
|
||||||
|
sources coming from outside the core.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
--------------------
|
||||||
|
- compatible: Should be "ti,c64x+core-pic";
|
||||||
|
- #interrupt-cells: <1>
|
||||||
|
|
||||||
|
Interrupt Specifier Definition
|
||||||
|
------------------------------
|
||||||
|
Single cell specifying the core interrupt priority level (4-15) where
|
||||||
|
4 is highest priority and 15 is lowest priority.
|
||||||
|
|
||||||
|
Example
|
||||||
|
-------
|
||||||
|
core_pic: interrupt-controller@0 {
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
compatible = "ti,c64x+core-pic";
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
* C64x+ Megamodule Interrupt Controller
|
||||||
|
|
||||||
|
The megamodule PIC consists of four interrupt mupliplexers each of which
|
||||||
|
combine up to 32 interrupt inputs into a single interrupt output which
|
||||||
|
may be cascaded into the core interrupt controller. The megamodule PIC
|
||||||
|
has a total of 12 outputs cascading into the core interrupt controller.
|
||||||
|
One for each core interrupt priority level. In addition to the combined
|
||||||
|
interrupt sources, individual megamodule interrupts may be cascaded to
|
||||||
|
the core interrupt controller. When an individual interrupt is cascaded,
|
||||||
|
it is no longer handled through a megamodule interrupt combiner and is
|
||||||
|
considered to have the core interrupt controller as the parent.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
--------------------
|
||||||
|
- compatible: "ti,c64x+megamod-pic"
|
||||||
|
- interrupt-controller
|
||||||
|
- #interrupt-cells: <1>
|
||||||
|
- reg: base address and size of register area
|
||||||
|
- interrupt-parent: must be core interrupt controller
|
||||||
|
- interrupts: This should have four cells; one for each interrupt combiner.
|
||||||
|
The cells contain the core priority interrupt to which the
|
||||||
|
corresponding combiner output is wired.
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
--------------------
|
||||||
|
- ti,c64x+megamod-pic-mux: Array of 12 cells correspnding to the 12 core
|
||||||
|
priority interrupts. The first cell corresponds to
|
||||||
|
core priority 4 and the last cell corresponds to
|
||||||
|
core priority 15. The value of each cell is the
|
||||||
|
megamodule interrupt source which is MUXed to
|
||||||
|
the core interrupt corresponding to the cell
|
||||||
|
position. Allowed values are 4 - 127. Mapping for
|
||||||
|
interrupts 0 - 3 (combined interrupt sources) are
|
||||||
|
ignored.
|
||||||
|
|
||||||
|
Interrupt Specifier Definition
|
||||||
|
------------------------------
|
||||||
|
Single cell specifying the megamodule interrupt source (4-127). Note that
|
||||||
|
interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will
|
||||||
|
use the core interrupt controller as their parent and the specifier will
|
||||||
|
be the core priority level, not the megamodule interrupt number.
|
||||||
|
|
||||||
|
Examples
|
||||||
|
--------
|
||||||
|
megamod_pic: interrupt-controller@1800000 {
|
||||||
|
compatible = "ti,c64x+megamod-pic";
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
reg = <0x1800000 0x1000>;
|
||||||
|
interrupt-parent = <&core_pic>;
|
||||||
|
interrupts = < 12 13 14 15 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
This is a minimal example where all individual interrupts go through a
|
||||||
|
combiner. Combiner-0 is mapped to core interrupt 12, combiner-1 is mapped
|
||||||
|
to interrupt 13, etc.
|
||||||
|
|
||||||
|
|
||||||
|
megamod_pic: interrupt-controller@1800000 {
|
||||||
|
compatible = "ti,c64x+megamod-pic";
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
reg = <0x1800000 0x1000>;
|
||||||
|
interrupt-parent = <&core_pic>;
|
||||||
|
interrupts = < 12 13 14 15 >;
|
||||||
|
ti,c64x+megamod-pic-mux = < 0 0 0 0
|
||||||
|
32 0 0 0
|
||||||
|
0 0 0 0 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
This the same as the first example except that megamodule interrupt 32 is
|
||||||
|
mapped directly to core priority interrupt 8. The node using this interrupt
|
||||||
|
must set the core controller as its interrupt parent and use 8 in the
|
||||||
|
interrupt specifier value.
|
||||||
|
|
@ -0,0 +1,28 @@
|
||||||
|
C6X System-on-Chip
|
||||||
|
------------------
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
|
||||||
|
- compatible: "simple-bus"
|
||||||
|
- #address-cells: must be 1
|
||||||
|
- #size-cells: must be 1
|
||||||
|
- ranges
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
|
||||||
|
- model: specific SoC model
|
||||||
|
|
||||||
|
- nodes for IP blocks within SoC
|
||||||
|
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
soc {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
model = "tms320c6455";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges;
|
||||||
|
|
||||||
|
...
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,26 @@
|
||||||
|
Timer64
|
||||||
|
-------
|
||||||
|
|
||||||
|
The timer64 node describes C6X event timers.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
|
||||||
|
- compatible: must be "ti,c64x+timer64"
|
||||||
|
- reg: base address and size of register region
|
||||||
|
- interrupt-parent: interrupt controller
|
||||||
|
- interrupts: interrupt id
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
|
||||||
|
- ti,dscr-dev-enable: Device ID used to enable timer IP through DSCR interface.
|
||||||
|
|
||||||
|
- ti,core-mask: on multi-core SoCs, bitmask of cores allowed to use this timer.
|
||||||
|
|
||||||
|
Example:
|
||||||
|
timer0: timer@25e0000 {
|
||||||
|
compatible = "ti,c64x+timer64";
|
||||||
|
ti,core-mask = < 0x01 >;
|
||||||
|
reg = <0x25e0000 0x40>;
|
||||||
|
interrupt-parent = <&megamod_pic>;
|
||||||
|
interrupts = < 16 >;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,30 @@
|
||||||
|
* ARM PrimeCell PL330 DMA Controller
|
||||||
|
|
||||||
|
The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
|
||||||
|
between memory and peripherals or memory to memory.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible: should include both "arm,pl330" and "arm,primecell".
|
||||||
|
- reg: physical base address of the controller and length of memory mapped
|
||||||
|
region.
|
||||||
|
- interrupts: interrupt number to the cpu.
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
pdma0: pdma@12680000 {
|
||||||
|
compatible = "arm,pl330", "arm,primecell";
|
||||||
|
reg = <0x12680000 0x1000>;
|
||||||
|
interrupts = <99>;
|
||||||
|
};
|
||||||
|
|
||||||
|
Client drivers (device nodes requiring dma transfers from dev-to-mem or
|
||||||
|
mem-to-dev) should specify the DMA channel numbers using a two-value pair
|
||||||
|
as shown below.
|
||||||
|
|
||||||
|
[property name] = <[phandle of the dma controller] [dma request id]>;
|
||||||
|
|
||||||
|
where 'dma request id' is the dma request number which is connected
|
||||||
|
to the client controller. The 'property name' is recommended to be
|
||||||
|
of the form <name>-dma-channel.
|
||||||
|
|
||||||
|
Example: tx-dma-channel = <&pdma0 12>;
|
||||||
|
|
@ -0,0 +1,40 @@
|
||||||
|
Samsung Exynos4 GPIO Controller
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible: Compatible property value should be "samsung,exynos4-gpio>".
|
||||||
|
|
||||||
|
- reg: Physical base address of the controller and length of memory mapped
|
||||||
|
region.
|
||||||
|
|
||||||
|
- #gpio-cells: Should be 4. The syntax of the gpio specifier used by client nodes
|
||||||
|
should be the following with values derived from the SoC user manual.
|
||||||
|
<[phandle of the gpio controller node]
|
||||||
|
[pin number within the gpio controller]
|
||||||
|
[mux function]
|
||||||
|
[pull up/down]
|
||||||
|
[drive strength]>
|
||||||
|
|
||||||
|
Values for gpio specifier:
|
||||||
|
- Pin number: is a value between 0 to 7.
|
||||||
|
- Pull Up/Down: 0 - Pull Up/Down Disabled.
|
||||||
|
1 - Pull Down Enabled.
|
||||||
|
3 - Pull Up Enabled.
|
||||||
|
- Drive Strength: 0 - 1x,
|
||||||
|
1 - 3x,
|
||||||
|
2 - 2x,
|
||||||
|
3 - 4x
|
||||||
|
|
||||||
|
- gpio-controller: Specifies that the node is a gpio controller.
|
||||||
|
- #address-cells: should be 1.
|
||||||
|
- #size-cells: should be 1.
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
gpa0: gpio-controller@11400000 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400000 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
gpio-controller;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,88 @@
|
||||||
|
* Samsung's Keypad Controller device tree bindings
|
||||||
|
|
||||||
|
Samsung's Keypad controller is used to interface a SoC with a matrix-type
|
||||||
|
keypad device. The keypad controller supports multiple row and column lines.
|
||||||
|
A key can be placed at each intersection of a unique row and a unique column.
|
||||||
|
The keypad controller can sense a key-press and key-release and report the
|
||||||
|
event using a interrupt to the cpu.
|
||||||
|
|
||||||
|
Required SoC Specific Properties:
|
||||||
|
- compatible: should be one of the following
|
||||||
|
- "samsung,s3c6410-keypad": For controllers compatible with s3c6410 keypad
|
||||||
|
controller.
|
||||||
|
- "samsung,s5pv210-keypad": For controllers compatible with s5pv210 keypad
|
||||||
|
controller.
|
||||||
|
|
||||||
|
- reg: physical base address of the controller and length of memory mapped
|
||||||
|
region.
|
||||||
|
|
||||||
|
- interrupts: The interrupt number to the cpu.
|
||||||
|
|
||||||
|
Required Board Specific Properties:
|
||||||
|
- samsung,keypad-num-rows: Number of row lines connected to the keypad
|
||||||
|
controller.
|
||||||
|
|
||||||
|
- samsung,keypad-num-columns: Number of column lines connected to the
|
||||||
|
keypad controller.
|
||||||
|
|
||||||
|
- row-gpios: List of gpios used as row lines. The gpio specifier for
|
||||||
|
this property depends on the gpio controller to which these row lines
|
||||||
|
are connected.
|
||||||
|
|
||||||
|
- col-gpios: List of gpios used as column lines. The gpio specifier for
|
||||||
|
this property depends on the gpio controller to which these column
|
||||||
|
lines are connected.
|
||||||
|
|
||||||
|
- Keys represented as child nodes: Each key connected to the keypad
|
||||||
|
controller is represented as a child node to the keypad controller
|
||||||
|
device node and should include the following properties.
|
||||||
|
- keypad,row: the row number to which the key is connected.
|
||||||
|
- keypad,column: the column number to which the key is connected.
|
||||||
|
- linux,code: the key-code to be reported when the key is pressed
|
||||||
|
and released.
|
||||||
|
|
||||||
|
Optional Properties specific to linux:
|
||||||
|
- linux,keypad-no-autorepeat: do no enable autorepeat feature.
|
||||||
|
- linux,keypad-wakeup: use any event on keypad as wakeup event.
|
||||||
|
|
||||||
|
|
||||||
|
Example:
|
||||||
|
keypad@100A0000 {
|
||||||
|
compatible = "samsung,s5pv210-keypad";
|
||||||
|
reg = <0x100A0000 0x100>;
|
||||||
|
interrupts = <173>;
|
||||||
|
samsung,keypad-num-rows = <2>;
|
||||||
|
samsung,keypad-num-columns = <8>;
|
||||||
|
linux,input-no-autorepeat;
|
||||||
|
linux,input-wakeup;
|
||||||
|
|
||||||
|
row-gpios = <&gpx2 0 3 3 0
|
||||||
|
&gpx2 1 3 3 0>;
|
||||||
|
|
||||||
|
col-gpios = <&gpx1 0 3 0 0
|
||||||
|
&gpx1 1 3 0 0
|
||||||
|
&gpx1 2 3 0 0
|
||||||
|
&gpx1 3 3 0 0
|
||||||
|
&gpx1 4 3 0 0
|
||||||
|
&gpx1 5 3 0 0
|
||||||
|
&gpx1 6 3 0 0
|
||||||
|
&gpx1 7 3 0 0>;
|
||||||
|
|
||||||
|
key_1 {
|
||||||
|
keypad,row = <0>;
|
||||||
|
keypad,column = <3>;
|
||||||
|
linux,code = <2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_2 {
|
||||||
|
keypad,row = <0>;
|
||||||
|
keypad,column = <4>;
|
||||||
|
linux,code = <3>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_3 {
|
||||||
|
keypad,row = <0>;
|
||||||
|
keypad,column = <5>;
|
||||||
|
linux,code = <4>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,18 @@
|
||||||
|
* Tegra keyboard controller
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible: "nvidia,tegra20-kbc"
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
- debounce-delay: delay in milliseconds per row scan for debouncing
|
||||||
|
- repeat-delay: delay in milliseconds before repeat starts
|
||||||
|
- ghost-filter: enable ghost filtering for this device
|
||||||
|
- wakeup-source: configure keyboard as a wakeup source for suspend/resume
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
keyboard: keyboard {
|
||||||
|
compatible = "nvidia,tegra20-kbc";
|
||||||
|
reg = <0x7000e200 0x100>;
|
||||||
|
ghost-filter;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,44 @@
|
||||||
|
GPIO assisted NAND flash
|
||||||
|
|
||||||
|
The GPIO assisted NAND flash uses a memory mapped interface to
|
||||||
|
read/write the NAND commands and data and GPIO pins for the control
|
||||||
|
signals.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible : "gpio-control-nand"
|
||||||
|
- reg : should specify localbus chip select and size used for the chip. The
|
||||||
|
resource describes the data bus connected to the NAND flash and all accesses
|
||||||
|
are made in native endianness.
|
||||||
|
- #address-cells, #size-cells : Must be present if the device has sub-nodes
|
||||||
|
representing partitions.
|
||||||
|
- gpios : specifies the gpio pins to control the NAND device. nwp is an
|
||||||
|
optional gpio and may be set to 0 if not present.
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
- bank-width : Width (in bytes) of the device. If not present, the width
|
||||||
|
defaults to 1 byte.
|
||||||
|
- chip-delay : chip dependent delay for transferring data from array to
|
||||||
|
read registers (tR). If not present then a default of 20us is used.
|
||||||
|
- gpio-control-nand,io-sync-reg : A 64-bit physical address for a read
|
||||||
|
location used to guard against bus reordering with regards to accesses to
|
||||||
|
the GPIO's and the NAND flash data bus. If present, then after changing
|
||||||
|
GPIO state and before and after command byte writes, this register will be
|
||||||
|
read to ensure that the GPIO accesses have completed.
|
||||||
|
|
||||||
|
Examples:
|
||||||
|
|
||||||
|
gpio-nand@1,0 {
|
||||||
|
compatible = "gpio-control-nand";
|
||||||
|
reg = <1 0x0000 0x2>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
gpios = <&banka 1 0 /* rdy */
|
||||||
|
&banka 2 0 /* nce */
|
||||||
|
&banka 3 0 /* ale */
|
||||||
|
&banka 4 0 /* cle */
|
||||||
|
0 /* nwp */>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
...
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,25 @@
|
||||||
|
* Cadence MACB/GEM Ethernet controller
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible: Should be "cdns,[<chip>-]{macb|gem}"
|
||||||
|
Use "cdns,at91sam9260-macb" Atmel at91sam9260 and at91sam9263 SoCs.
|
||||||
|
Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
|
||||||
|
Use "cnds,pc302-gem" for Picochip picoXcell pc302 and later devices based on
|
||||||
|
the Cadence GEM, or the generic form: "cdns,gem".
|
||||||
|
- reg: Address and length of the register set for the device
|
||||||
|
- interrupts: Should contain macb interrupt
|
||||||
|
- phy-mode: String, operation mode of the PHY interface.
|
||||||
|
Supported values are: "mii", "rmii", "gmii", "rgmii".
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
- local-mac-address: 6 bytes, mac address
|
||||||
|
|
||||||
|
Examples:
|
||||||
|
|
||||||
|
macb0: ethernet@fffc4000 {
|
||||||
|
compatible = "cdns,at32ap7000-macb";
|
||||||
|
reg = <0xfffc4000 0x4000>;
|
||||||
|
interrupts = <21>;
|
||||||
|
phy-mode = "rmii";
|
||||||
|
local-mac-address = [3a 0e 03 04 05 06];
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,9 @@
|
||||||
|
NVIDIA compliant embedded controller
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible : should be "nvidia,nvec".
|
||||||
|
- reg : the iomem of the i2c slave controller
|
||||||
|
- interrupts : the interrupt line of the i2c slave controller
|
||||||
|
- clock-frequency : the frequency of the i2c bus
|
||||||
|
- gpios : the gpio used for ec request
|
||||||
|
- slave-addr: the i2c address of the slave controller
|
||||||
|
|
@ -0,0 +1,29 @@
|
||||||
|
Fixed Voltage regulators
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible: Must be "regulator-fixed";
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
- gpio: gpio to use for enable control
|
||||||
|
- startup-delay-us: startup time in microseconds
|
||||||
|
- enable-active-high: Polarity of GPIO is Active high
|
||||||
|
If this property is missing, the default assumed is Active low.
|
||||||
|
|
||||||
|
Any property defined as part of the core regulator
|
||||||
|
binding, defined in regulator.txt, can also be used.
|
||||||
|
However a fixed voltage regulator is expected to have the
|
||||||
|
regulator-min-microvolt and regulator-max-microvolt
|
||||||
|
to be the same.
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
abc: fixedregulator@0 {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "fixed-supply";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
gpio = <&gpio1 16 0>;
|
||||||
|
startup-delay-us = <70000>;
|
||||||
|
enable-active-high;
|
||||||
|
regulator-boot-on
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,54 @@
|
||||||
|
Voltage/Current Regulators
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
- regulator-name: A string used as a descriptive name for regulator outputs
|
||||||
|
- regulator-min-microvolt: smallest voltage consumers may set
|
||||||
|
- regulator-max-microvolt: largest voltage consumers may set
|
||||||
|
- regulator-microvolt-offset: Offset applied to voltages to compensate for voltage drops
|
||||||
|
- regulator-min-microamp: smallest current consumers may set
|
||||||
|
- regulator-max-microamp: largest current consumers may set
|
||||||
|
- regulator-always-on: boolean, regulator should never be disabled
|
||||||
|
- regulator-boot-on: bootloader/firmware enabled regulator
|
||||||
|
- <name>-supply: phandle to the parent supply/regulator node
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
xyzreg: regulator@0 {
|
||||||
|
regulator-min-microvolt = <1000000>;
|
||||||
|
regulator-max-microvolt = <2500000>;
|
||||||
|
regulator-always-on;
|
||||||
|
vin-supply = <&vin>;
|
||||||
|
};
|
||||||
|
|
||||||
|
Regulator Consumers:
|
||||||
|
Consumer nodes can reference one or more of its supplies/
|
||||||
|
regulators using the below bindings.
|
||||||
|
|
||||||
|
- <name>-supply: phandle to the regulator node
|
||||||
|
|
||||||
|
These are the same bindings that a regulator in the above
|
||||||
|
example used to reference its own supply, in which case
|
||||||
|
its just seen as a special case of a regulator being a
|
||||||
|
consumer itself.
|
||||||
|
|
||||||
|
Example of a consumer device node (mmc) referencing two
|
||||||
|
regulators (twl_reg1 and twl_reg2),
|
||||||
|
|
||||||
|
twl_reg1: regulator@0 {
|
||||||
|
...
|
||||||
|
...
|
||||||
|
...
|
||||||
|
};
|
||||||
|
|
||||||
|
twl_reg2: regulator@1 {
|
||||||
|
...
|
||||||
|
...
|
||||||
|
...
|
||||||
|
};
|
||||||
|
|
||||||
|
mmc: mmc@0x0 {
|
||||||
|
...
|
||||||
|
...
|
||||||
|
vmmc-supply = <&twl_reg1>;
|
||||||
|
vmmcaux-supply = <&twl_reg2>;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,20 @@
|
||||||
|
* Samsung's S3C Real Time Clock controller
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible: should be one of the following.
|
||||||
|
* "samsung,s3c2410-rtc" - for controllers compatible with s3c2410 rtc.
|
||||||
|
* "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
|
||||||
|
- reg: physical base address of the controller and length of memory mapped
|
||||||
|
region.
|
||||||
|
- interrupts: Two interrupt numbers to the cpu should be specified. First
|
||||||
|
interrupt number is the rtc alarm interupt and second interrupt number
|
||||||
|
is the rtc tick interrupt. The number of cells representing a interrupt
|
||||||
|
depends on the parent interrupt controller.
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
rtc@10070000 {
|
||||||
|
compatible = "samsung,s3c6410-rtc";
|
||||||
|
reg = <0x10070000 0x100>;
|
||||||
|
interrupts = <44 0 45 0>;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,12 @@
|
||||||
|
* TI twl RTC
|
||||||
|
|
||||||
|
The TWL family (twl4030/6030) contains a RTC.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible : Should be twl4030-rtc
|
||||||
|
|
||||||
|
Examples:
|
||||||
|
|
||||||
|
rtc@0 {
|
||||||
|
compatible = "ti,twl4030-rtc";
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,10 @@
|
||||||
|
OMAP UART controller
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible : should be "ti,omap2-uart" for OMAP2 controllers
|
||||||
|
- compatible : should be "ti,omap3-uart" for OMAP3 controllers
|
||||||
|
- compatible : should be "ti,omap4-uart" for OMAP4 controllers
|
||||||
|
- ti,hwmods : Must be "uart<n>", n being the instance number (1-based)
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
- clock-frequency : frequency of the clock input to the UART
|
||||||
|
|
@ -0,0 +1,14 @@
|
||||||
|
* Samsung's UART Controller
|
||||||
|
|
||||||
|
The Samsung's UART controller is used for interfacing SoC with serial communicaion
|
||||||
|
devices.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible: should be
|
||||||
|
- "samsung,exynos4210-uart", for UART's compatible with Exynos4210 uart ports.
|
||||||
|
|
||||||
|
- reg: base physical address of the controller and length of memory mapped
|
||||||
|
region.
|
||||||
|
|
||||||
|
- interrupts: interrupt number to the cpu. The interrupt specifier format depends
|
||||||
|
on the interrupt controller parent.
|
||||||
|
|
@ -0,0 +1,13 @@
|
||||||
|
Tegra SOC USB controllers
|
||||||
|
|
||||||
|
The device node for a USB controller that is part of a Tegra
|
||||||
|
SOC is as described in the document "Open Firmware Recommended
|
||||||
|
Practice : Universal Serial Bus" with the following modifications
|
||||||
|
and additions :
|
||||||
|
|
||||||
|
Required properties :
|
||||||
|
- compatible : Should be "nvidia,tegra20-ehci" for USB controllers
|
||||||
|
used in host mode.
|
||||||
|
- phy_type : Should be one of "ulpi" or "utmi".
|
||||||
|
- nvidia,vbus-gpio : If present, specifies a gpio that needs to be
|
||||||
|
activated for the bus to be powered.
|
||||||
|
|
@ -66,7 +66,6 @@ GRTAGS
|
||||||
GSYMS
|
GSYMS
|
||||||
GTAGS
|
GTAGS
|
||||||
Image
|
Image
|
||||||
Kerntypes
|
|
||||||
Module.markers
|
Module.markers
|
||||||
Module.symvers
|
Module.symvers
|
||||||
PENDING
|
PENDING
|
||||||
|
|
|
||||||
|
|
@ -350,15 +350,6 @@ Who: anybody or Florian Mickler <florian@mickler.org>
|
||||||
|
|
||||||
----------------------------
|
----------------------------
|
||||||
|
|
||||||
What: KVM paravirt mmu host support
|
|
||||||
When: January 2011
|
|
||||||
Why: The paravirt mmu host support is slower than non-paravirt mmu, both
|
|
||||||
on newer and older hardware. It is already not exposed to the guest,
|
|
||||||
and kept only for live migration purposes.
|
|
||||||
Who: Avi Kivity <avi@redhat.com>
|
|
||||||
|
|
||||||
----------------------------
|
|
||||||
|
|
||||||
What: iwlwifi 50XX module parameters
|
What: iwlwifi 50XX module parameters
|
||||||
When: 3.0
|
When: 3.0
|
||||||
Why: The "..50" modules parameters were used to configure 5000 series and
|
Why: The "..50" modules parameters were used to configure 5000 series and
|
||||||
|
|
@ -523,6 +514,20 @@ Why: In 3.0, we can now autodetect internal 3G device and already have
|
||||||
information log when acer-wmi initial.
|
information log when acer-wmi initial.
|
||||||
Who: Lee, Chun-Yi <jlee@novell.com>
|
Who: Lee, Chun-Yi <jlee@novell.com>
|
||||||
|
|
||||||
|
---------------------------
|
||||||
|
|
||||||
|
What: /sys/devices/platform/_UDC_/udc/_UDC_/is_dualspeed file and
|
||||||
|
is_dualspeed line in /sys/devices/platform/ci13xxx_*/udc/device file.
|
||||||
|
When: 3.8
|
||||||
|
Why: The is_dualspeed file is superseded by maximum_speed in the same
|
||||||
|
directory and is_dualspeed line in device file is superseded by
|
||||||
|
max_speed line in the same file.
|
||||||
|
|
||||||
|
The maximum_speed/max_speed specifies maximum speed supported by UDC.
|
||||||
|
To check if dualspeeed is supported, check if the value is >= 3.
|
||||||
|
Various possible speeds are defined in <linux/usb/ch9.h>.
|
||||||
|
Who: Michal Nazarewicz <mina86@mina86.com>
|
||||||
|
|
||||||
----------------------------
|
----------------------------
|
||||||
|
|
||||||
What: The XFS nodelaylog mount option
|
What: The XFS nodelaylog mount option
|
||||||
|
|
|
||||||
|
|
@ -581,6 +581,13 @@ Table of Ext4 specific ioctls
|
||||||
behaviour may change in the future as it is
|
behaviour may change in the future as it is
|
||||||
not necessary and has been done this way only
|
not necessary and has been done this way only
|
||||||
for sake of simplicity.
|
for sake of simplicity.
|
||||||
|
|
||||||
|
EXT4_IOC_RESIZE_FS Resize the filesystem to a new size. The number
|
||||||
|
of blocks of resized filesystem is passed in via
|
||||||
|
64 bit integer argument. The kernel allocates
|
||||||
|
bitmaps and inode table, the userspace tool thus
|
||||||
|
just passes the new number of blocks.
|
||||||
|
|
||||||
..............................................................................
|
..............................................................................
|
||||||
|
|
||||||
References
|
References
|
||||||
|
|
|
||||||
|
|
@ -41,6 +41,8 @@ Table of Contents
|
||||||
3.5 /proc/<pid>/mountinfo - Information about mounts
|
3.5 /proc/<pid>/mountinfo - Information about mounts
|
||||||
3.6 /proc/<pid>/comm & /proc/<pid>/task/<tid>/comm
|
3.6 /proc/<pid>/comm & /proc/<pid>/task/<tid>/comm
|
||||||
|
|
||||||
|
4 Configuring procfs
|
||||||
|
4.1 Mount options
|
||||||
|
|
||||||
------------------------------------------------------------------------------
|
------------------------------------------------------------------------------
|
||||||
Preface
|
Preface
|
||||||
|
|
@ -1542,3 +1544,40 @@ a task to set its own or one of its thread siblings comm value. The comm value
|
||||||
is limited in size compared to the cmdline value, so writing anything longer
|
is limited in size compared to the cmdline value, so writing anything longer
|
||||||
then the kernel's TASK_COMM_LEN (currently 16 chars) will result in a truncated
|
then the kernel's TASK_COMM_LEN (currently 16 chars) will result in a truncated
|
||||||
comm value.
|
comm value.
|
||||||
|
|
||||||
|
|
||||||
|
------------------------------------------------------------------------------
|
||||||
|
Configuring procfs
|
||||||
|
------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
4.1 Mount options
|
||||||
|
---------------------
|
||||||
|
|
||||||
|
The following mount options are supported:
|
||||||
|
|
||||||
|
hidepid= Set /proc/<pid>/ access mode.
|
||||||
|
gid= Set the group authorized to learn processes information.
|
||||||
|
|
||||||
|
hidepid=0 means classic mode - everybody may access all /proc/<pid>/ directories
|
||||||
|
(default).
|
||||||
|
|
||||||
|
hidepid=1 means users may not access any /proc/<pid>/ directories but their
|
||||||
|
own. Sensitive files like cmdline, sched*, status are now protected against
|
||||||
|
other users. This makes it impossible to learn whether any user runs
|
||||||
|
specific program (given the program doesn't reveal itself by its behaviour).
|
||||||
|
As an additional bonus, as /proc/<pid>/cmdline is unaccessible for other users,
|
||||||
|
poorly written programs passing sensitive information via program arguments are
|
||||||
|
now protected against local eavesdroppers.
|
||||||
|
|
||||||
|
hidepid=2 means hidepid=1 plus all /proc/<pid>/ will be fully invisible to other
|
||||||
|
users. It doesn't mean that it hides a fact whether a process with a specific
|
||||||
|
pid value exists (it can be learned by other means, e.g. by "kill -0 $PID"),
|
||||||
|
but it hides process' uid and gid, which may be learned by stat()'ing
|
||||||
|
/proc/<pid>/ otherwise. It greatly complicates an intruder's task of gathering
|
||||||
|
information about running processes, whether some daemon runs with elevated
|
||||||
|
privileges, whether other user runs some sensitive program, whether other users
|
||||||
|
run any program at all, etc.
|
||||||
|
|
||||||
|
gid= defines a group authorized to learn processes information otherwise
|
||||||
|
prohibited by hidepid=. If you use some daemon like identd which needs to learn
|
||||||
|
information about processes information, just add identd to this group.
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,188 @@
|
||||||
|
ALPS Touchpad Protocol
|
||||||
|
----------------------
|
||||||
|
|
||||||
|
Introduction
|
||||||
|
------------
|
||||||
|
|
||||||
|
Currently the ALPS touchpad driver supports four protocol versions in use by
|
||||||
|
ALPS touchpads, called versions 1, 2, 3, and 4. Information about the various
|
||||||
|
protocol versions is contained in the following sections.
|
||||||
|
|
||||||
|
Detection
|
||||||
|
---------
|
||||||
|
|
||||||
|
All ALPS touchpads should respond to the "E6 report" command sequence:
|
||||||
|
E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
|
||||||
|
00-00-64.
|
||||||
|
|
||||||
|
If the E6 report is successful, the touchpad model is identified using the "E7
|
||||||
|
report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
|
||||||
|
matched against known models in the alps_model_data_array.
|
||||||
|
|
||||||
|
With protocol versions 3 and 4, the E7 report model signature is always
|
||||||
|
73-02-64. To differentiate between these versions, the response from the
|
||||||
|
"Enter Command Mode" sequence must be inspected as described below.
|
||||||
|
|
||||||
|
Command Mode
|
||||||
|
------------
|
||||||
|
|
||||||
|
Protocol versions 3 and 4 have a command mode that is used to read and write
|
||||||
|
one-byte device registers in a 16-bit address space. The command sequence
|
||||||
|
EC-EC-EC-E9 places the device in command mode, and the device will respond
|
||||||
|
with 88-07 followed by a third byte. This third byte can be used to determine
|
||||||
|
whether the devices uses the version 3 or 4 protocol.
|
||||||
|
|
||||||
|
To exit command mode, PSMOUSE_CMD_SETSTREAM (EA) is sent to the touchpad.
|
||||||
|
|
||||||
|
While in command mode, register addresses can be set by first sending a
|
||||||
|
specific command, either EC for v3 devices or F5 for v4 devices. Then the
|
||||||
|
address is sent one nibble at a time, where each nibble is encoded as a
|
||||||
|
command with optional data. This enoding differs slightly between the v3 and
|
||||||
|
v4 protocols.
|
||||||
|
|
||||||
|
Once an address has been set, the addressed register can be read by sending
|
||||||
|
PSMOUSE_CMD_GETINFO (E9). The first two bytes of the response contains the
|
||||||
|
address of the register being read, and the third contains the value of the
|
||||||
|
register. Registers are written by writing the value one nibble at a time
|
||||||
|
using the same encoding used for addresses.
|
||||||
|
|
||||||
|
Packet Format
|
||||||
|
-------------
|
||||||
|
|
||||||
|
In the following tables, the following notation is used.
|
||||||
|
|
||||||
|
CAPITALS = stick, miniscules = touchpad
|
||||||
|
|
||||||
|
?'s can have different meanings on different models, such as wheel rotation,
|
||||||
|
extra buttons, stick buttons on a dualpoint, etc.
|
||||||
|
|
||||||
|
PS/2 packet format
|
||||||
|
------------------
|
||||||
|
|
||||||
|
byte 0: 0 0 YSGN XSGN 1 M R L
|
||||||
|
byte 1: X7 X6 X5 X4 X3 X2 X1 X0
|
||||||
|
byte 2: Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
|
||||||
|
|
||||||
|
Note that the device never signals overflow condition.
|
||||||
|
|
||||||
|
ALPS Absolute Mode - Protocol Verion 1
|
||||||
|
--------------------------------------
|
||||||
|
|
||||||
|
byte 0: 1 0 0 0 1 x9 x8 x7
|
||||||
|
byte 1: 0 x6 x5 x4 x3 x2 x1 x0
|
||||||
|
byte 2: 0 ? ? l r ? fin ges
|
||||||
|
byte 3: 0 ? ? ? ? y9 y8 y7
|
||||||
|
byte 4: 0 y6 y5 y4 y3 y2 y1 y0
|
||||||
|
byte 5: 0 z6 z5 z4 z3 z2 z1 z0
|
||||||
|
|
||||||
|
ALPS Absolute Mode - Protocol Version 2
|
||||||
|
---------------------------------------
|
||||||
|
|
||||||
|
byte 0: 1 ? ? ? 1 ? ? ?
|
||||||
|
byte 1: 0 x6 x5 x4 x3 x2 x1 x0
|
||||||
|
byte 2: 0 x10 x9 x8 x7 ? fin ges
|
||||||
|
byte 3: 0 y9 y8 y7 1 M R L
|
||||||
|
byte 4: 0 y6 y5 y4 y3 y2 y1 y0
|
||||||
|
byte 5: 0 z6 z5 z4 z3 z2 z1 z0
|
||||||
|
|
||||||
|
Dualpoint device -- interleaved packet format
|
||||||
|
---------------------------------------------
|
||||||
|
|
||||||
|
byte 0: 1 1 0 0 1 1 1 1
|
||||||
|
byte 1: 0 x6 x5 x4 x3 x2 x1 x0
|
||||||
|
byte 2: 0 x10 x9 x8 x7 0 fin ges
|
||||||
|
byte 3: 0 0 YSGN XSGN 1 1 1 1
|
||||||
|
byte 4: X7 X6 X5 X4 X3 X2 X1 X0
|
||||||
|
byte 5: Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
|
||||||
|
byte 6: 0 y9 y8 y7 1 m r l
|
||||||
|
byte 7: 0 y6 y5 y4 y3 y2 y1 y0
|
||||||
|
byte 8: 0 z6 z5 z4 z3 z2 z1 z0
|
||||||
|
|
||||||
|
ALPS Absolute Mode - Protocol Version 3
|
||||||
|
---------------------------------------
|
||||||
|
|
||||||
|
ALPS protocol version 3 has three different packet formats. The first two are
|
||||||
|
associated with touchpad events, and the third is associatd with trackstick
|
||||||
|
events.
|
||||||
|
|
||||||
|
The first type is the touchpad position packet.
|
||||||
|
|
||||||
|
byte 0: 1 ? x1 x0 1 1 1 1
|
||||||
|
byte 1: 0 x10 x9 x8 x7 x6 x5 x4
|
||||||
|
byte 2: 0 y10 y9 y8 y7 y6 y5 y4
|
||||||
|
byte 3: 0 M R L 1 m r l
|
||||||
|
byte 4: 0 mt x3 x2 y3 y2 y1 y0
|
||||||
|
byte 5: 0 z6 z5 z4 z3 z2 z1 z0
|
||||||
|
|
||||||
|
Note that for some devices the trackstick buttons are reported in this packet,
|
||||||
|
and on others it is reported in the trackstick packets.
|
||||||
|
|
||||||
|
The second packet type contains bitmaps representing the x and y axes. In the
|
||||||
|
bitmaps a given bit is set if there is a finger covering that position on the
|
||||||
|
given axis. Thus the bitmap packet can be used for low-resolution multi-touch
|
||||||
|
data, although finger tracking is not possible. This packet also encodes the
|
||||||
|
number of contacts (f1 and f0 in the table below).
|
||||||
|
|
||||||
|
byte 0: 1 1 x1 x0 1 1 1 1
|
||||||
|
byte 1: 0 x8 x7 x6 x5 x4 x3 x2
|
||||||
|
byte 2: 0 y7 y6 y5 y4 y3 y2 y1
|
||||||
|
byte 3: 0 y10 y9 y8 1 1 1 1
|
||||||
|
byte 4: 0 x14 x13 x12 x11 x10 x9 y0
|
||||||
|
byte 5: 0 1 ? ? ? ? f1 f0
|
||||||
|
|
||||||
|
This packet only appears after a position packet with the mt bit set, and
|
||||||
|
ususally only appears when there are two or more contacts (although
|
||||||
|
ocassionally it's seen with only a single contact).
|
||||||
|
|
||||||
|
The final v3 packet type is the trackstick packet.
|
||||||
|
|
||||||
|
byte 0: 1 1 x7 y7 1 1 1 1
|
||||||
|
byte 1: 0 x6 x5 x4 x3 x2 x1 x0
|
||||||
|
byte 2: 0 y6 y5 y4 y3 y2 y1 y0
|
||||||
|
byte 3: 0 1 0 0 1 0 0 0
|
||||||
|
byte 4: 0 z4 z3 z2 z1 z0 ? ?
|
||||||
|
byte 5: 0 0 1 1 1 1 1 1
|
||||||
|
|
||||||
|
ALPS Absolute Mode - Protocol Version 4
|
||||||
|
---------------------------------------
|
||||||
|
|
||||||
|
Protocol version 4 has an 8-byte packet format.
|
||||||
|
|
||||||
|
byte 0: 1 ? x1 x0 1 1 1 1
|
||||||
|
byte 1: 0 x10 x9 x8 x7 x6 x5 x4
|
||||||
|
byte 2: 0 y10 y9 y8 y7 y6 y5 y4
|
||||||
|
byte 3: 0 1 x3 x2 y3 y2 y1 y0
|
||||||
|
byte 4: 0 ? ? ? 1 ? r l
|
||||||
|
byte 5: 0 z6 z5 z4 z3 z2 z1 z0
|
||||||
|
byte 6: bitmap data (described below)
|
||||||
|
byte 7: bitmap data (described below)
|
||||||
|
|
||||||
|
The last two bytes represent a partial bitmap packet, with 3 full packets
|
||||||
|
required to construct a complete bitmap packet. Once assembled, the 6-byte
|
||||||
|
bitmap packet has the following format:
|
||||||
|
|
||||||
|
byte 0: 0 1 x7 x6 x5 x4 x3 x2
|
||||||
|
byte 1: 0 x1 x0 y4 y3 y2 y1 y0
|
||||||
|
byte 2: 0 0 ? x14 x13 x12 x11 x10
|
||||||
|
byte 3: 0 x9 x8 y9 y8 y7 y6 y5
|
||||||
|
byte 4: 0 0 0 0 0 0 0 0
|
||||||
|
byte 5: 0 0 0 0 0 0 0 y10
|
||||||
|
|
||||||
|
There are several things worth noting here.
|
||||||
|
|
||||||
|
1) In the bitmap data, bit 6 of byte 0 serves as a sync byte to
|
||||||
|
identify the first fragment of a bitmap packet.
|
||||||
|
|
||||||
|
2) The bitmaps represent the same data as in the v3 bitmap packets, although
|
||||||
|
the packet layout is different.
|
||||||
|
|
||||||
|
3) There doesn't seem to be a count of the contact points anywhere in the v4
|
||||||
|
protocol packets. Deriving a count of contact points must be done by
|
||||||
|
analyzing the bitmaps.
|
||||||
|
|
||||||
|
4) There is a 3 to 1 ratio of position packets to bitmap packets. Therefore
|
||||||
|
MT position can only be updated for every third ST position update, and
|
||||||
|
the count of contact points can only be updated every third packet as
|
||||||
|
well.
|
||||||
|
|
||||||
|
So far no v4 devices with tracksticks have been encountered.
|
||||||
|
|
@ -0,0 +1,103 @@
|
||||||
|
Driver for tilt-switches connected via GPIOs
|
||||||
|
============================================
|
||||||
|
|
||||||
|
Generic driver to read data from tilt switches connected via gpios.
|
||||||
|
Orientation can be provided by one or more than one tilt switches,
|
||||||
|
i.e. each tilt switch providing one axis, and the number of axes
|
||||||
|
is also not limited.
|
||||||
|
|
||||||
|
|
||||||
|
Data structures:
|
||||||
|
----------------
|
||||||
|
|
||||||
|
The array of struct gpio in the gpios field is used to list the gpios
|
||||||
|
that represent the current tilt state.
|
||||||
|
|
||||||
|
The array of struct gpio_tilt_axis describes the axes that are reported
|
||||||
|
to the input system. The values set therein are used for the
|
||||||
|
input_set_abs_params calls needed to init the axes.
|
||||||
|
|
||||||
|
The array of struct gpio_tilt_state maps gpio states to the corresponding
|
||||||
|
values to report. The gpio state is represented as a bitfield where the
|
||||||
|
bit-index corresponds to the index of the gpio in the struct gpio array.
|
||||||
|
In the same manner the values stored in the axes array correspond to
|
||||||
|
the elements of the gpio_tilt_axis-array.
|
||||||
|
|
||||||
|
|
||||||
|
Example:
|
||||||
|
--------
|
||||||
|
|
||||||
|
Example configuration for a single TS1003 tilt switch that rotates around
|
||||||
|
one axis in 4 steps and emitts the current tilt via two GPIOs.
|
||||||
|
|
||||||
|
static int sg060_tilt_enable(struct device *dev) {
|
||||||
|
/* code to enable the sensors */
|
||||||
|
};
|
||||||
|
|
||||||
|
static void sg060_tilt_disable(struct device *dev) {
|
||||||
|
/* code to disable the sensors */
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct gpio sg060_tilt_gpios[] = {
|
||||||
|
{ SG060_TILT_GPIO_SENSOR1, GPIOF_IN, "tilt_sensor1" },
|
||||||
|
{ SG060_TILT_GPIO_SENSOR2, GPIOF_IN, "tilt_sensor2" },
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct gpio_tilt_state sg060_tilt_states[] = {
|
||||||
|
{
|
||||||
|
.gpios = (0 << 1) | (0 << 0),
|
||||||
|
.axes = (int[]) {
|
||||||
|
0,
|
||||||
|
},
|
||||||
|
}, {
|
||||||
|
.gpios = (0 << 1) | (1 << 0),
|
||||||
|
.axes = (int[]) {
|
||||||
|
1, /* 90 degrees */
|
||||||
|
},
|
||||||
|
}, {
|
||||||
|
.gpios = (1 << 1) | (1 << 0),
|
||||||
|
.axes = (int[]) {
|
||||||
|
2, /* 180 degrees */
|
||||||
|
},
|
||||||
|
}, {
|
||||||
|
.gpios = (1 << 1) | (0 << 0),
|
||||||
|
.axes = (int[]) {
|
||||||
|
3, /* 270 degrees */
|
||||||
|
},
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct gpio_tilt_axis sg060_tilt_axes[] = {
|
||||||
|
{
|
||||||
|
.axis = ABS_RY,
|
||||||
|
.min = 0,
|
||||||
|
.max = 3,
|
||||||
|
.fuzz = 0,
|
||||||
|
.flat = 0,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct gpio_tilt_platform_data sg060_tilt_pdata= {
|
||||||
|
.gpios = sg060_tilt_gpios,
|
||||||
|
.nr_gpios = ARRAY_SIZE(sg060_tilt_gpios),
|
||||||
|
|
||||||
|
.axes = sg060_tilt_axes,
|
||||||
|
.nr_axes = ARRAY_SIZE(sg060_tilt_axes),
|
||||||
|
|
||||||
|
.states = sg060_tilt_states,
|
||||||
|
.nr_states = ARRAY_SIZE(sg060_tilt_states),
|
||||||
|
|
||||||
|
.debounce_interval = 100,
|
||||||
|
|
||||||
|
.poll_interval = 1000,
|
||||||
|
.enable = sg060_tilt_enable,
|
||||||
|
.disable = sg060_tilt_disable,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device sg060_device_tilt = {
|
||||||
|
.name = "gpio-tilt-polled",
|
||||||
|
.id = -1,
|
||||||
|
.dev = {
|
||||||
|
.platform_data = &sg060_tilt_pdata,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
@ -1,5 +1,5 @@
|
||||||
Copyright (C) 2002-2010 Sentelic Corporation.
|
Copyright (C) 2002-2011 Sentelic Corporation.
|
||||||
Last update: Jan-13-2010
|
Last update: Dec-07-2011
|
||||||
|
|
||||||
==============================================================================
|
==============================================================================
|
||||||
* Finger Sensing Pad Intellimouse Mode(scrolling wheel, 4th and 5th buttons)
|
* Finger Sensing Pad Intellimouse Mode(scrolling wheel, 4th and 5th buttons)
|
||||||
|
|
@ -140,6 +140,7 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------
|
||||||
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
||||||
=> 01, Absolute coordination packet
|
=> 01, Absolute coordination packet
|
||||||
=> 10, Notify packet
|
=> 10, Notify packet
|
||||||
|
=> 11, Normal data packet with on-pad click
|
||||||
Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up.
|
Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up.
|
||||||
When both fingers are up, the last two reports have zero valid
|
When both fingers are up, the last two reports have zero valid
|
||||||
bit.
|
bit.
|
||||||
|
|
@ -164,6 +165,7 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------
|
||||||
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
||||||
=> 01, Absolute coordinates packet
|
=> 01, Absolute coordinates packet
|
||||||
=> 10, Notify packet
|
=> 10, Notify packet
|
||||||
|
=> 11, Normal data packet with on-pad click
|
||||||
Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up.
|
Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up.
|
||||||
When both fingers are up, the last two reports have zero valid
|
When both fingers are up, the last two reports have zero valid
|
||||||
bit.
|
bit.
|
||||||
|
|
@ -188,6 +190,7 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------
|
||||||
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
||||||
=> 01, Absolute coordinates packet
|
=> 01, Absolute coordinates packet
|
||||||
=> 10, Notify packet
|
=> 10, Notify packet
|
||||||
|
=> 11, Normal data packet with on-pad click
|
||||||
Bit5 => 1
|
Bit5 => 1
|
||||||
Bit4 => when in absolute coordinates mode (valid when EN_PKT_GO is 1):
|
Bit4 => when in absolute coordinates mode (valid when EN_PKT_GO is 1):
|
||||||
0: left button is generated by the on-pad command
|
0: left button is generated by the on-pad command
|
||||||
|
|
@ -205,7 +208,7 @@ Byte 4: Bit7 => scroll right button
|
||||||
Bit6 => scroll left button
|
Bit6 => scroll left button
|
||||||
Bit5 => scroll down button
|
Bit5 => scroll down button
|
||||||
Bit4 => scroll up button
|
Bit4 => scroll up button
|
||||||
* Note that if gesture and additional buttoni (Bit4~Bit7)
|
* Note that if gesture and additional button (Bit4~Bit7)
|
||||||
happen at the same time, the button information will not
|
happen at the same time, the button information will not
|
||||||
be sent.
|
be sent.
|
||||||
Bit3~Bit0 => Reserved
|
Bit3~Bit0 => Reserved
|
||||||
|
|
@ -227,6 +230,7 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------
|
||||||
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
||||||
=> 01, Absolute coordinates packet
|
=> 01, Absolute coordinates packet
|
||||||
=> 10, Notify packet
|
=> 10, Notify packet
|
||||||
|
=> 11, Normal data packet with on-pad click
|
||||||
Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up.
|
Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up.
|
||||||
When both fingers are up, the last two reports have zero valid
|
When both fingers are up, the last two reports have zero valid
|
||||||
bit.
|
bit.
|
||||||
|
|
@ -253,6 +257,7 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------
|
||||||
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
||||||
=> 01, Absolute coordination packet
|
=> 01, Absolute coordination packet
|
||||||
=> 10, Notify packet
|
=> 10, Notify packet
|
||||||
|
=> 11, Normal data packet with on-pad click
|
||||||
Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up.
|
Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up.
|
||||||
When both fingers are up, the last two reports have zero valid
|
When both fingers are up, the last two reports have zero valid
|
||||||
bit.
|
bit.
|
||||||
|
|
@ -279,8 +284,9 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------
|
||||||
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
||||||
=> 01, Absolute coordination packet
|
=> 01, Absolute coordination packet
|
||||||
=> 10, Notify packet
|
=> 10, Notify packet
|
||||||
|
=> 11, Normal data packet with on-pad click
|
||||||
Bit5 => 1
|
Bit5 => 1
|
||||||
Bit4 => when in absolute coordinate mode (valid when EN_PKT_GO is 1):
|
Bit4 => when in absolute coordinates mode (valid when EN_PKT_GO is 1):
|
||||||
0: left button is generated by the on-pad command
|
0: left button is generated by the on-pad command
|
||||||
1: left button is generated by the external button
|
1: left button is generated by the external button
|
||||||
Bit3 => 1
|
Bit3 => 1
|
||||||
|
|
@ -306,6 +312,110 @@ Sample sequence of Multi-finger, Multi-coordinate mode:
|
||||||
notify packet (valid bit == 1), abs pkt 1, abs pkt 2, abs pkt 1,
|
notify packet (valid bit == 1), abs pkt 1, abs pkt 2, abs pkt 1,
|
||||||
abs pkt 2, ..., notify packet (valid bit == 0)
|
abs pkt 2, ..., notify packet (valid bit == 0)
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
* Absolute position for STL3888-Cx and STL3888-Dx.
|
||||||
|
==============================================================================
|
||||||
|
Single Finger, Absolute Coordinate Mode (SFAC)
|
||||||
|
Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
|
||||||
|
BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
|
||||||
|
1 |0|1|0|P|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 |r|l|B|F|X|X|Y|Y|
|
||||||
|
|---------------| |---------------| |---------------| |---------------|
|
||||||
|
|
||||||
|
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
||||||
|
=> 01, Absolute coordinates packet
|
||||||
|
=> 10, Notify packet
|
||||||
|
Bit5 => Coordinate mode(always 0 in SFAC mode):
|
||||||
|
0: single-finger absolute coordinates (SFAC) mode
|
||||||
|
1: multi-finger, multiple coordinates (MFMC) mode
|
||||||
|
Bit4 => 0: The LEFT button is generated by on-pad command (OPC)
|
||||||
|
1: The LEFT button is generated by external button
|
||||||
|
Default is 1 even if the LEFT button is not pressed.
|
||||||
|
Bit3 => Always 1, as specified by PS/2 protocol.
|
||||||
|
Bit2 => Middle Button, 1 is pressed, 0 is not pressed.
|
||||||
|
Bit1 => Right Button, 1 is pressed, 0 is not pressed.
|
||||||
|
Bit0 => Left Button, 1 is pressed, 0 is not pressed.
|
||||||
|
Byte 2: X coordinate (xpos[9:2])
|
||||||
|
Byte 3: Y coordinate (ypos[9:2])
|
||||||
|
Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
|
||||||
|
Bit3~Bit2 => X coordinate (ypos[1:0])
|
||||||
|
Bit4 => 4th mouse button(forward one page)
|
||||||
|
Bit5 => 5th mouse button(backward one page)
|
||||||
|
Bit6 => scroll left button
|
||||||
|
Bit7 => scroll right button
|
||||||
|
|
||||||
|
Multi Finger, Multiple Coordinates Mode (MFMC):
|
||||||
|
Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
|
||||||
|
BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
|
||||||
|
1 |0|1|1|P|1|F|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 |r|l|B|F|X|X|Y|Y|
|
||||||
|
|---------------| |---------------| |---------------| |---------------|
|
||||||
|
|
||||||
|
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
||||||
|
=> 01, Absolute coordination packet
|
||||||
|
=> 10, Notify packet
|
||||||
|
Bit5 => Coordinate mode (always 1 in MFMC mode):
|
||||||
|
0: single-finger absolute coordinates (SFAC) mode
|
||||||
|
1: multi-finger, multiple coordinates (MFMC) mode
|
||||||
|
Bit4 => 0: The LEFT button is generated by on-pad command (OPC)
|
||||||
|
1: The LEFT button is generated by external button
|
||||||
|
Default is 1 even if the LEFT button is not pressed.
|
||||||
|
Bit3 => Always 1, as specified by PS/2 protocol.
|
||||||
|
Bit2 => Finger index, 0 is the first finger, 1 is the second finger.
|
||||||
|
If bit 1 and 0 are all 1 and bit 4 is 0, the middle external
|
||||||
|
button is pressed.
|
||||||
|
Bit1 => Right Button, 1 is pressed, 0 is not pressed.
|
||||||
|
Bit0 => Left Button, 1 is pressed, 0 is not pressed.
|
||||||
|
Byte 2: X coordinate (xpos[9:2])
|
||||||
|
Byte 3: Y coordinate (ypos[9:2])
|
||||||
|
Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
|
||||||
|
Bit3~Bit2 => X coordinate (ypos[1:0])
|
||||||
|
Bit4 => 4th mouse button(forward one page)
|
||||||
|
Bit5 => 5th mouse button(backward one page)
|
||||||
|
Bit6 => scroll left button
|
||||||
|
Bit7 => scroll right button
|
||||||
|
|
||||||
|
When one of the two fingers is up, the device will output four consecutive
|
||||||
|
MFMC#0 report packets with zero X and Y to represent 1st finger is up or
|
||||||
|
four consecutive MFMC#1 report packets with zero X and Y to represent that
|
||||||
|
the 2nd finger is up. On the other hand, if both fingers are up, the device
|
||||||
|
will output four consecutive single-finger, absolute coordinate(SFAC) packets
|
||||||
|
with zero X and Y.
|
||||||
|
|
||||||
|
Notify Packet for STL3888-Cx/Dx
|
||||||
|
Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
|
||||||
|
BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
|
||||||
|
1 |1|0|0|P|1|M|R|L| 2 |C|C|C|C|C|C|C|C| 3 |0|0|F|F|0|0|0|i| 4 |r|l|u|d|0|0|0|0|
|
||||||
|
|---------------| |---------------| |---------------| |---------------|
|
||||||
|
|
||||||
|
Byte 1: Bit7~Bit6 => 00, Normal data packet
|
||||||
|
=> 01, Absolute coordinates packet
|
||||||
|
=> 10, Notify packet
|
||||||
|
Bit5 => Always 0
|
||||||
|
Bit4 => 0: The LEFT button is generated by on-pad command(OPC)
|
||||||
|
1: The LEFT button is generated by external button
|
||||||
|
Default is 1 even if the LEFT button is not pressed.
|
||||||
|
Bit3 => 1
|
||||||
|
Bit2 => Middle Button, 1 is pressed, 0 is not pressed.
|
||||||
|
Bit1 => Right Button, 1 is pressed, 0 is not pressed.
|
||||||
|
Bit0 => Left Button, 1 is pressed, 0 is not pressed.
|
||||||
|
Byte 2: Message type:
|
||||||
|
0xba => gesture information
|
||||||
|
0xc0 => one finger hold-rotating gesture
|
||||||
|
Byte 3: The first parameter for the received message:
|
||||||
|
0xba => gesture ID (refer to the 'Gesture ID' section)
|
||||||
|
0xc0 => region ID
|
||||||
|
Byte 4: The second parameter for the received message:
|
||||||
|
0xba => N/A
|
||||||
|
0xc0 => finger up/down information
|
||||||
|
|
||||||
|
Sample sequence of Multi-finger, Multi-coordinates mode:
|
||||||
|
|
||||||
|
notify packet (valid bit == 1), MFMC packet 1 (byte 1, bit 2 == 0),
|
||||||
|
MFMC packet 2 (byte 1, bit 2 == 1), MFMC packet 1, MFMC packet 2,
|
||||||
|
..., notify packet (valid bit == 0)
|
||||||
|
|
||||||
|
That is, when the device is in MFMC mode, the host will receive
|
||||||
|
interleaved absolute coordinate packets for each finger.
|
||||||
|
|
||||||
==============================================================================
|
==============================================================================
|
||||||
* FSP Enable/Disable packet
|
* FSP Enable/Disable packet
|
||||||
==============================================================================
|
==============================================================================
|
||||||
|
|
@ -348,9 +458,10 @@ http://www.computer-engineering.org/ps2mouse/
|
||||||
==============================================================================
|
==============================================================================
|
||||||
1. Identify FSP by reading device ID(0x00) and version(0x01) register
|
1. Identify FSP by reading device ID(0x00) and version(0x01) register
|
||||||
|
|
||||||
2. Determine number of buttons by reading status2 (0x0b) register
|
2a. For FSP version < STL3888 Cx, determine number of buttons by reading
|
||||||
|
the 'test mode status' (0x20) register:
|
||||||
|
|
||||||
buttons = reg[0x0b] & 0x30
|
buttons = reg[0x20] & 0x30
|
||||||
|
|
||||||
if buttons == 0x30 or buttons == 0x20:
|
if buttons == 0x30 or buttons == 0x20:
|
||||||
# two/four buttons
|
# two/four buttons
|
||||||
|
|
@ -365,6 +476,10 @@ http://www.computer-engineering.org/ps2mouse/
|
||||||
Refer to 'Finger Sensing Pad PS/2 Mouse Intellimouse'
|
Refer to 'Finger Sensing Pad PS/2 Mouse Intellimouse'
|
||||||
section A for packet parsing detail
|
section A for packet parsing detail
|
||||||
|
|
||||||
|
2b. For FSP version >= STL3888 Cx:
|
||||||
|
Refer to 'Finger Sensing Pad PS/2 Mouse Intellimouse'
|
||||||
|
section A for packet parsing detail (ignore byte 4, bit ~ 7)
|
||||||
|
|
||||||
==============================================================================
|
==============================================================================
|
||||||
* Programming Sequence for Register Reading/Writing
|
* Programming Sequence for Register Reading/Writing
|
||||||
==============================================================================
|
==============================================================================
|
||||||
|
|
@ -374,7 +489,7 @@ Register inversion requirement:
|
||||||
Following values needed to be inverted(the '~' operator in C) before being
|
Following values needed to be inverted(the '~' operator in C) before being
|
||||||
sent to FSP:
|
sent to FSP:
|
||||||
|
|
||||||
0xe9, 0xee, 0xf2 and 0xff.
|
0xe8, 0xe9, 0xee, 0xf2, 0xf3 and 0xff.
|
||||||
|
|
||||||
Register swapping requirement:
|
Register swapping requirement:
|
||||||
|
|
||||||
|
|
@ -415,7 +530,18 @@ Register reading sequence:
|
||||||
|
|
||||||
8. send 0xe9(status request) PS/2 command to FSP;
|
8. send 0xe9(status request) PS/2 command to FSP;
|
||||||
|
|
||||||
9. the response read from FSP should be the requested register value.
|
9. the 4th byte of the response read from FSP should be the
|
||||||
|
requested register value(?? indicates don't care byte):
|
||||||
|
|
||||||
|
host: 0xe9
|
||||||
|
3888: 0xfa (??) (??) (val)
|
||||||
|
|
||||||
|
* Note that since the Cx release, the hardware will return 1's
|
||||||
|
complement of the register value at the 3rd byte of status request
|
||||||
|
result:
|
||||||
|
|
||||||
|
host: 0xe9
|
||||||
|
3888: 0xfa (??) (~val) (val)
|
||||||
|
|
||||||
Register writing sequence:
|
Register writing sequence:
|
||||||
|
|
||||||
|
|
@ -465,71 +591,194 @@ Register writing sequence:
|
||||||
|
|
||||||
9. the register writing sequence is completed.
|
9. the register writing sequence is completed.
|
||||||
|
|
||||||
|
* Note that since the Cx release, the hardware will return 1's
|
||||||
|
complement of the register value at the 3rd byte of status request
|
||||||
|
result. Host can optionally send another 0xe9 (status request) PS/2
|
||||||
|
command to FSP at the end of register writing to verify that the
|
||||||
|
register writing operation is successful (?? indicates don't care
|
||||||
|
byte):
|
||||||
|
|
||||||
|
host: 0xe9
|
||||||
|
3888: 0xfa (??) (~val) (val)
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
* Programming Sequence for Page Register Reading/Writing
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
In order to overcome the limitation of maximum number of registers
|
||||||
|
supported, the hardware separates register into different groups called
|
||||||
|
'pages.' Each page is able to include up to 255 registers.
|
||||||
|
|
||||||
|
The default page after power up is 0x82; therefore, if one has to get
|
||||||
|
access to register 0x8301, one has to use following sequence to switch
|
||||||
|
to page 0x83, then start reading/writing from/to offset 0x01 by using
|
||||||
|
the register read/write sequence described in previous section.
|
||||||
|
|
||||||
|
Page register reading sequence:
|
||||||
|
|
||||||
|
1. send 0xf3 PS/2 command to FSP;
|
||||||
|
|
||||||
|
2. send 0x66 PS/2 command to FSP;
|
||||||
|
|
||||||
|
3. send 0x88 PS/2 command to FSP;
|
||||||
|
|
||||||
|
4. send 0xf3 PS/2 command to FSP;
|
||||||
|
|
||||||
|
5. send 0x83 PS/2 command to FSP;
|
||||||
|
|
||||||
|
6. send 0x88 PS/2 command to FSP;
|
||||||
|
|
||||||
|
7. send 0xe9(status request) PS/2 command to FSP;
|
||||||
|
|
||||||
|
8. the response read from FSP should be the requested page value.
|
||||||
|
|
||||||
|
Page register writing sequence:
|
||||||
|
|
||||||
|
1. send 0xf3 PS/2 command to FSP;
|
||||||
|
|
||||||
|
2. send 0x38 PS/2 command to FSP;
|
||||||
|
|
||||||
|
3. send 0x88 PS/2 command to FSP;
|
||||||
|
|
||||||
|
4. send 0xf3 PS/2 command to FSP;
|
||||||
|
|
||||||
|
5. if the page address being written is not required to be
|
||||||
|
inverted(refer to the 'Register inversion requirement' section),
|
||||||
|
goto step 6
|
||||||
|
|
||||||
|
5a. send 0x47 PS/2 command to FSP;
|
||||||
|
|
||||||
|
5b. send the inverted page address to FSP and goto step 9;
|
||||||
|
|
||||||
|
6. if the page address being written is not required to be
|
||||||
|
swapped(refer to the 'Register swapping requirement' section),
|
||||||
|
goto step 7
|
||||||
|
|
||||||
|
6a. send 0x44 PS/2 command to FSP;
|
||||||
|
|
||||||
|
6b. send the swapped page address to FSP and goto step 9;
|
||||||
|
|
||||||
|
7. send 0x33 PS/2 command to FSP;
|
||||||
|
|
||||||
|
8. send the page address to FSP;
|
||||||
|
|
||||||
|
9. the page register writing sequence is completed.
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
* Gesture ID
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
Unlike other devices which sends multiple fingers' coordinates to host,
|
||||||
|
FSP processes multiple fingers' coordinates internally and convert them
|
||||||
|
into a 8 bits integer, namely 'Gesture ID.' Following is a list of
|
||||||
|
supported gesture IDs:
|
||||||
|
|
||||||
|
ID Description
|
||||||
|
0x86 2 finger straight up
|
||||||
|
0x82 2 finger straight down
|
||||||
|
0x80 2 finger straight right
|
||||||
|
0x84 2 finger straight left
|
||||||
|
0x8f 2 finger zoom in
|
||||||
|
0x8b 2 finger zoom out
|
||||||
|
0xc0 2 finger curve, counter clockwise
|
||||||
|
0xc4 2 finger curve, clockwise
|
||||||
|
0x2e 3 finger straight up
|
||||||
|
0x2a 3 finger straight down
|
||||||
|
0x28 3 finger straight right
|
||||||
|
0x2c 3 finger straight left
|
||||||
|
0x38 palm
|
||||||
|
|
||||||
==============================================================================
|
==============================================================================
|
||||||
* Register Listing
|
* Register Listing
|
||||||
==============================================================================
|
==============================================================================
|
||||||
|
|
||||||
|
Registers are represented in 16 bits values. The higher 8 bits represent
|
||||||
|
the page address and the lower 8 bits represent the relative offset within
|
||||||
|
that particular page. Refer to the 'Programming Sequence for Page Register
|
||||||
|
Reading/Writing' section for instructions on how to change current page
|
||||||
|
address.
|
||||||
|
|
||||||
offset width default r/w name
|
offset width default r/w name
|
||||||
0x00 bit7~bit0 0x01 RO device ID
|
0x8200 bit7~bit0 0x01 RO device ID
|
||||||
|
|
||||||
0x01 bit7~bit0 0xc0 RW version ID
|
0x8201 bit7~bit0 RW version ID
|
||||||
|
0xc1: STL3888 Ax
|
||||||
|
0xd0 ~ 0xd2: STL3888 Bx
|
||||||
|
0xe0 ~ 0xe1: STL3888 Cx
|
||||||
|
0xe2 ~ 0xe3: STL3888 Dx
|
||||||
|
|
||||||
0x02 bit7~bit0 0x01 RO vendor ID
|
0x8202 bit7~bit0 0x01 RO vendor ID
|
||||||
|
|
||||||
0x03 bit7~bit0 0x01 RO product ID
|
0x8203 bit7~bit0 0x01 RO product ID
|
||||||
|
|
||||||
0x04 bit3~bit0 0x01 RW revision ID
|
0x8204 bit3~bit0 0x01 RW revision ID
|
||||||
|
|
||||||
0x0b RO test mode status 1
|
0x820b test mode status 1
|
||||||
bit3 1 RO 0: rotate 180 degree, 1: no rotation
|
bit3 1 RO 0: rotate 180 degree
|
||||||
|
1: no rotation
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
bit5~bit4 RO number of buttons
|
0x820f register file page control
|
||||||
11 => 2, lbtn/rbtn
|
bit2 0 RW 1: rotate 180 degree
|
||||||
10 => 4, lbtn/rbtn/scru/scrd
|
0: no rotation
|
||||||
01 => 6, lbtn/rbtn/scru/scrd/scrl/scrr
|
*supported since Cx
|
||||||
00 => 6, lbtn/rbtn/scru/scrd/fbtn/bbtn
|
|
||||||
|
|
||||||
0x0f RW register file page control
|
|
||||||
bit0 0 RW 1 to enable page 1 register files
|
bit0 0 RW 1 to enable page 1 register files
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
0x10 RW system control 1
|
0x8210 RW system control 1
|
||||||
bit0 1 RW Reserved, must be 1
|
bit0 1 RW Reserved, must be 1
|
||||||
bit1 0 RW Reserved, must be 0
|
bit1 0 RW Reserved, must be 0
|
||||||
bit4 1 RW Reserved, must be 0
|
bit4 0 RW Reserved, must be 0
|
||||||
bit5 0 RW register clock gating enable
|
bit5 1 RW register clock gating enable
|
||||||
0: read only, 1: read/write enable
|
0: read only, 1: read/write enable
|
||||||
(Note that following registers does not require clock gating being
|
(Note that following registers does not require clock gating being
|
||||||
enabled prior to write: 05 06 07 08 09 0c 0f 10 11 12 16 17 18 23 2e
|
enabled prior to write: 05 06 07 08 09 0c 0f 10 11 12 16 17 18 23 2e
|
||||||
40 41 42 43. In addition to that, this bit must be 1 when gesture
|
40 41 42 43. In addition to that, this bit must be 1 when gesture
|
||||||
mode is enabled)
|
mode is enabled)
|
||||||
|
|
||||||
0x31 RW on-pad command detection
|
0x8220 test mode status
|
||||||
|
bit5~bit4 RO number of buttons
|
||||||
|
11 => 2, lbtn/rbtn
|
||||||
|
10 => 4, lbtn/rbtn/scru/scrd
|
||||||
|
01 => 6, lbtn/rbtn/scru/scrd/scrl/scrr
|
||||||
|
00 => 6, lbtn/rbtn/scru/scrd/fbtn/bbtn
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
|
0x8231 RW on-pad command detection
|
||||||
bit7 0 RW on-pad command left button down tag
|
bit7 0 RW on-pad command left button down tag
|
||||||
enable
|
enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
0x34 RW on-pad command control 5
|
0x8234 RW on-pad command control 5
|
||||||
bit4~bit0 0x05 RW XLO in 0s/4/1, so 03h = 0010.1b = 2.5
|
bit4~bit0 0x05 RW XLO in 0s/4/1, so 03h = 0010.1b = 2.5
|
||||||
(Note that position unit is in 0.5 scanline)
|
(Note that position unit is in 0.5 scanline)
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
bit7 0 RW on-pad tap zone enable
|
bit7 0 RW on-pad tap zone enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
0x35 RW on-pad command control 6
|
0x8235 RW on-pad command control 6
|
||||||
bit4~bit0 0x1d RW XHI in 0s/4/1, so 19h = 1100.1b = 12.5
|
bit4~bit0 0x1d RW XHI in 0s/4/1, so 19h = 1100.1b = 12.5
|
||||||
(Note that position unit is in 0.5 scanline)
|
(Note that position unit is in 0.5 scanline)
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
0x36 RW on-pad command control 7
|
0x8236 RW on-pad command control 7
|
||||||
bit4~bit0 0x04 RW YLO in 0s/4/1, so 03h = 0010.1b = 2.5
|
bit4~bit0 0x04 RW YLO in 0s/4/1, so 03h = 0010.1b = 2.5
|
||||||
(Note that position unit is in 0.5 scanline)
|
(Note that position unit is in 0.5 scanline)
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
0x37 RW on-pad command control 8
|
0x8237 RW on-pad command control 8
|
||||||
bit4~bit0 0x13 RW YHI in 0s/4/1, so 11h = 1000.1b = 8.5
|
bit4~bit0 0x13 RW YHI in 0s/4/1, so 11h = 1000.1b = 8.5
|
||||||
(Note that position unit is in 0.5 scanline)
|
(Note that position unit is in 0.5 scanline)
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
0x40 RW system control 5
|
0x8240 RW system control 5
|
||||||
bit1 0 RW FSP Intellimouse mode enable
|
bit1 0 RW FSP Intellimouse mode enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
bit2 0 RW movement + abs. coordinate mode enable
|
bit2 0 RW movement + abs. coordinate mode enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
|
|
@ -537,6 +786,7 @@ offset width default r/w name
|
||||||
bit 1 is not set. However, the format is different from that of bit 1.
|
bit 1 is not set. However, the format is different from that of bit 1.
|
||||||
In addition, when bit 1 and bit 2 are set at the same time, bit 2 will
|
In addition, when bit 1 and bit 2 are set at the same time, bit 2 will
|
||||||
override bit 1.)
|
override bit 1.)
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
bit3 0 RW abs. coordinate only mode enable
|
bit3 0 RW abs. coordinate only mode enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
|
|
@ -544,9 +794,11 @@ offset width default r/w name
|
||||||
bit 1 is not set. However, the format is different from that of bit 1.
|
bit 1 is not set. However, the format is different from that of bit 1.
|
||||||
In addition, when bit 1, bit 2 and bit 3 are set at the same time,
|
In addition, when bit 1, bit 2 and bit 3 are set at the same time,
|
||||||
bit 3 will override bit 1 and 2.)
|
bit 3 will override bit 1 and 2.)
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
bit5 0 RW auto switch enable
|
bit5 0 RW auto switch enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
bit6 0 RW G0 abs. + notify packet format enable
|
bit6 0 RW G0 abs. + notify packet format enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
|
|
@ -554,18 +806,68 @@ offset width default r/w name
|
||||||
bit 2 and 3. That is, if any of those bit is 1, host will receive
|
bit 2 and 3. That is, if any of those bit is 1, host will receive
|
||||||
absolute coordinates; otherwise, host only receives packets with
|
absolute coordinates; otherwise, host only receives packets with
|
||||||
relative coordinate.)
|
relative coordinate.)
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
bit7 0 RW EN_PS2_F2: PS/2 gesture mode 2nd
|
bit7 0 RW EN_PS2_F2: PS/2 gesture mode 2nd
|
||||||
finger packet enable
|
finger packet enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
0x43 RW on-pad control
|
0x8243 RW on-pad control
|
||||||
bit0 0 RW on-pad control enable
|
bit0 0 RW on-pad control enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
(Note that if this bit is cleared, bit 3/5 will be ineffective)
|
(Note that if this bit is cleared, bit 3/5 will be ineffective)
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
bit3 0 RW on-pad fix vertical scrolling enable
|
bit3 0 RW on-pad fix vertical scrolling enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
bit5 0 RW on-pad fix horizontal scrolling enable
|
bit5 0 RW on-pad fix horizontal scrolling enable
|
||||||
0: disable, 1: enable
|
0: disable, 1: enable
|
||||||
|
*only supported by H/W prior to Cx
|
||||||
|
|
||||||
|
0x8290 RW software control register 1
|
||||||
|
bit0 0 RW absolute coordination mode
|
||||||
|
0: disable, 1: enable
|
||||||
|
*supported since Cx
|
||||||
|
|
||||||
|
bit1 0 RW gesture ID output
|
||||||
|
0: disable, 1: enable
|
||||||
|
*supported since Cx
|
||||||
|
|
||||||
|
bit2 0 RW two fingers' coordinates output
|
||||||
|
0: disable, 1: enable
|
||||||
|
*supported since Cx
|
||||||
|
|
||||||
|
bit3 0 RW finger up one packet output
|
||||||
|
0: disable, 1: enable
|
||||||
|
*supported since Cx
|
||||||
|
|
||||||
|
bit4 0 RW absolute coordination continuous mode
|
||||||
|
0: disable, 1: enable
|
||||||
|
*supported since Cx
|
||||||
|
|
||||||
|
bit6~bit5 00 RW gesture group selection
|
||||||
|
00: basic
|
||||||
|
01: suite
|
||||||
|
10: suite pro
|
||||||
|
11: advanced
|
||||||
|
*supported since Cx
|
||||||
|
|
||||||
|
bit7 0 RW Bx packet output compatible mode
|
||||||
|
0: disable, 1: enable *supported since Cx
|
||||||
|
*supported since Cx
|
||||||
|
|
||||||
|
|
||||||
|
0x833d RW on-pad command control 1
|
||||||
|
bit7 1 RW on-pad command detection enable
|
||||||
|
0: disable, 1: enable
|
||||||
|
*supported since Cx
|
||||||
|
|
||||||
|
0x833e RW on-pad command detection
|
||||||
|
bit7 0 RW on-pad command left button down tag
|
||||||
|
enable. Works only in H/W based PS/2
|
||||||
|
data packet mode.
|
||||||
|
0: disable, 1: enable
|
||||||
|
*supported since Cx
|
||||||
|
|
|
||||||
|
|
@ -17,8 +17,8 @@ You can use common commands, such as cp and scp, to copy the
|
||||||
memory image to a dump file on the local disk, or across the network to
|
memory image to a dump file on the local disk, or across the network to
|
||||||
a remote system.
|
a remote system.
|
||||||
|
|
||||||
Kdump and kexec are currently supported on the x86, x86_64, ppc64 and ia64
|
Kdump and kexec are currently supported on the x86, x86_64, ppc64, ia64,
|
||||||
architectures.
|
and s390x architectures.
|
||||||
|
|
||||||
When the system kernel boots, it reserves a small section of memory for
|
When the system kernel boots, it reserves a small section of memory for
|
||||||
the dump-capture kernel. This ensures that ongoing Direct Memory Access
|
the dump-capture kernel. This ensures that ongoing Direct Memory Access
|
||||||
|
|
@ -34,11 +34,18 @@ Similarly on PPC64 machines first 32KB of physical memory is needed for
|
||||||
booting regardless of where the kernel is loaded and to support 64K page
|
booting regardless of where the kernel is loaded and to support 64K page
|
||||||
size kexec backs up the first 64KB memory.
|
size kexec backs up the first 64KB memory.
|
||||||
|
|
||||||
|
For s390x, when kdump is triggered, the crashkernel region is exchanged
|
||||||
|
with the region [0, crashkernel region size] and then the kdump kernel
|
||||||
|
runs in [0, crashkernel region size]. Therefore no relocatable kernel is
|
||||||
|
needed for s390x.
|
||||||
|
|
||||||
All of the necessary information about the system kernel's core image is
|
All of the necessary information about the system kernel's core image is
|
||||||
encoded in the ELF format, and stored in a reserved area of memory
|
encoded in the ELF format, and stored in a reserved area of memory
|
||||||
before a crash. The physical address of the start of the ELF header is
|
before a crash. The physical address of the start of the ELF header is
|
||||||
passed to the dump-capture kernel through the elfcorehdr= boot
|
passed to the dump-capture kernel through the elfcorehdr= boot
|
||||||
parameter.
|
parameter. Optionally the size of the ELF header can also be passed
|
||||||
|
when using the elfcorehdr=[size[KMG]@]offset[KMG] syntax.
|
||||||
|
|
||||||
|
|
||||||
With the dump-capture kernel, you can access the memory image, or "old
|
With the dump-capture kernel, you can access the memory image, or "old
|
||||||
memory," in two ways:
|
memory," in two ways:
|
||||||
|
|
@ -291,6 +298,10 @@ Boot into System Kernel
|
||||||
The region may be automatically placed on ia64, see the
|
The region may be automatically placed on ia64, see the
|
||||||
dump-capture kernel config option notes above.
|
dump-capture kernel config option notes above.
|
||||||
|
|
||||||
|
On s390x, typically use "crashkernel=xxM". The value of xx is dependent
|
||||||
|
on the memory consumption of the kdump system. In general this is not
|
||||||
|
dependent on the memory size of the production system.
|
||||||
|
|
||||||
Load the Dump-capture Kernel
|
Load the Dump-capture Kernel
|
||||||
============================
|
============================
|
||||||
|
|
||||||
|
|
@ -308,6 +319,8 @@ For ppc64:
|
||||||
- Use vmlinux
|
- Use vmlinux
|
||||||
For ia64:
|
For ia64:
|
||||||
- Use vmlinux or vmlinuz.gz
|
- Use vmlinux or vmlinuz.gz
|
||||||
|
For s390x:
|
||||||
|
- Use image or bzImage
|
||||||
|
|
||||||
|
|
||||||
If you are using a uncompressed vmlinux image then use following command
|
If you are using a uncompressed vmlinux image then use following command
|
||||||
|
|
@ -337,6 +350,8 @@ For i386, x86_64 and ia64:
|
||||||
For ppc64:
|
For ppc64:
|
||||||
"1 maxcpus=1 noirqdistrib reset_devices"
|
"1 maxcpus=1 noirqdistrib reset_devices"
|
||||||
|
|
||||||
|
For s390x:
|
||||||
|
"1 maxcpus=1 cgroup_disable=memory"
|
||||||
|
|
||||||
Notes on loading the dump-capture kernel:
|
Notes on loading the dump-capture kernel:
|
||||||
|
|
||||||
|
|
@ -362,6 +377,20 @@ Notes on loading the dump-capture kernel:
|
||||||
dump. Hence generally it is useful either to build a UP dump-capture
|
dump. Hence generally it is useful either to build a UP dump-capture
|
||||||
kernel or specify maxcpus=1 option while loading dump-capture kernel.
|
kernel or specify maxcpus=1 option while loading dump-capture kernel.
|
||||||
|
|
||||||
|
* For s390x there are two kdump modes: If a ELF header is specified with
|
||||||
|
the elfcorehdr= kernel parameter, it is used by the kdump kernel as it
|
||||||
|
is done on all other architectures. If no elfcorehdr= kernel parameter is
|
||||||
|
specified, the s390x kdump kernel dynamically creates the header. The
|
||||||
|
second mode has the advantage that for CPU and memory hotplug, kdump has
|
||||||
|
not to be reloaded with kexec_load().
|
||||||
|
|
||||||
|
* For s390x systems with many attached devices the "cio_ignore" kernel
|
||||||
|
parameter should be used for the kdump kernel in order to prevent allocation
|
||||||
|
of kernel memory for devices that are not relevant for kdump. The same
|
||||||
|
applies to systems that use SCSI/FCP devices. In that case the
|
||||||
|
"allow_lun_scan" zfcp module parameter should be set to zero before
|
||||||
|
setting FCP devices online.
|
||||||
|
|
||||||
Kernel Panic
|
Kernel Panic
|
||||||
============
|
============
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -329,6 +329,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||||
is a lot of faster
|
is a lot of faster
|
||||||
off - do not initialize any AMD IOMMU found in
|
off - do not initialize any AMD IOMMU found in
|
||||||
the system
|
the system
|
||||||
|
force_isolation - Force device isolation for all
|
||||||
|
devices. The IOMMU driver is not
|
||||||
|
allowed anymore to lift isolation
|
||||||
|
requirements as needed. This option
|
||||||
|
does not override iommu=pt
|
||||||
|
|
||||||
amijoy.map= [HW,JOY] Amiga joystick support
|
amijoy.map= [HW,JOY] Amiga joystick support
|
||||||
Map of devices attached to JOY0DAT and JOY1DAT
|
Map of devices attached to JOY0DAT and JOY1DAT
|
||||||
|
|
@ -623,6 +628,25 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||||
no_debug_objects
|
no_debug_objects
|
||||||
[KNL] Disable object debugging
|
[KNL] Disable object debugging
|
||||||
|
|
||||||
|
debug_guardpage_minorder=
|
||||||
|
[KNL] When CONFIG_DEBUG_PAGEALLOC is set, this
|
||||||
|
parameter allows control of the order of pages that will
|
||||||
|
be intentionally kept free (and hence protected) by the
|
||||||
|
buddy allocator. Bigger value increase the probability
|
||||||
|
of catching random memory corruption, but reduce the
|
||||||
|
amount of memory for normal system use. The maximum
|
||||||
|
possible value is MAX_ORDER/2. Setting this parameter
|
||||||
|
to 1 or 2 should be enough to identify most random
|
||||||
|
memory corruption problems caused by bugs in kernel or
|
||||||
|
driver code when a CPU writes to (or reads from) a
|
||||||
|
random memory location. Note that there exists a class
|
||||||
|
of memory corruptions problems caused by buggy H/W or
|
||||||
|
F/W or by drivers badly programing DMA (basically when
|
||||||
|
memory is written at bus level and the CPU MMU is
|
||||||
|
bypassed) which are not detectable by
|
||||||
|
CONFIG_DEBUG_PAGEALLOC, hence this option will not help
|
||||||
|
tracking down these problems.
|
||||||
|
|
||||||
debugpat [X86] Enable PAT debugging
|
debugpat [X86] Enable PAT debugging
|
||||||
|
|
||||||
decnet.addr= [HW,NET]
|
decnet.addr= [HW,NET]
|
||||||
|
|
@ -1059,7 +1083,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||||
nomerge
|
nomerge
|
||||||
forcesac
|
forcesac
|
||||||
soft
|
soft
|
||||||
pt [x86, IA-64]
|
pt [x86, IA-64]
|
||||||
|
group_mf [x86, IA-64]
|
||||||
|
|
||||||
|
|
||||||
io7= [HW] IO7 for Marvel based alpha systems
|
io7= [HW] IO7 for Marvel based alpha systems
|
||||||
See comment before marvel_specify_io7 in
|
See comment before marvel_specify_io7 in
|
||||||
|
|
@ -1178,9 +1204,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||||
kvm.ignore_msrs=[KVM] Ignore guest accesses to unhandled MSRs.
|
kvm.ignore_msrs=[KVM] Ignore guest accesses to unhandled MSRs.
|
||||||
Default is 0 (don't ignore, but inject #GP)
|
Default is 0 (don't ignore, but inject #GP)
|
||||||
|
|
||||||
kvm.oos_shadow= [KVM] Disable out-of-sync shadow paging.
|
|
||||||
Default is 1 (enabled)
|
|
||||||
|
|
||||||
kvm.mmu_audit= [KVM] This is a R/W parameter which allows audit
|
kvm.mmu_audit= [KVM] This is a R/W parameter which allows audit
|
||||||
KVM MMU at runtime.
|
KVM MMU at runtime.
|
||||||
Default is 0 (off)
|
Default is 0 (off)
|
||||||
|
|
@ -1630,12 +1653,17 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||||
The default is to return 64-bit inode numbers.
|
The default is to return 64-bit inode numbers.
|
||||||
|
|
||||||
nfs.nfs4_disable_idmapping=
|
nfs.nfs4_disable_idmapping=
|
||||||
[NFSv4] When set, this option disables the NFSv4
|
[NFSv4] When set to the default of '1', this option
|
||||||
idmapper on the client, but only if the mount
|
ensures that both the RPC level authentication
|
||||||
is using the 'sec=sys' security flavour. This may
|
scheme and the NFS level operations agree to use
|
||||||
make migration from legacy NFSv2/v3 systems easier
|
numeric uids/gids if the mount is using the
|
||||||
provided that the server has the appropriate support.
|
'sec=sys' security flavour. In effect it is
|
||||||
The default is to always enable NFSv4 idmapping.
|
disabling idmapping, which can make migration from
|
||||||
|
legacy NFSv2/v3 systems to NFSv4 easier.
|
||||||
|
Servers that do not support this mode of operation
|
||||||
|
will be autodetected by the client, and it will fall
|
||||||
|
back to using the idmapper.
|
||||||
|
To turn off this behaviour, set the value to '0'.
|
||||||
|
|
||||||
nmi_debug= [KNL,AVR32,SH] Specify one or more actions to take
|
nmi_debug= [KNL,AVR32,SH] Specify one or more actions to take
|
||||||
when a NMI is triggered.
|
when a NMI is triggered.
|
||||||
|
|
@ -2637,6 +2665,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||||
[USB] Start with the old device initialization
|
[USB] Start with the old device initialization
|
||||||
scheme (default 0 = off).
|
scheme (default 0 = off).
|
||||||
|
|
||||||
|
usbcore.usbfs_memory_mb=
|
||||||
|
[USB] Memory limit (in MB) for buffers allocated by
|
||||||
|
usbfs (default = 16, 0 = max = 2047).
|
||||||
|
|
||||||
usbcore.use_both_schemes=
|
usbcore.use_both_schemes=
|
||||||
[USB] Try the other device initialization scheme
|
[USB] Try the other device initialization scheme
|
||||||
if the first one fails (default 1 = enabled).
|
if the first one fails (default 1 = enabled).
|
||||||
|
|
|
||||||
|
|
@ -7,12 +7,9 @@ This subsystem deals with:
|
||||||
|
|
||||||
- Multiplexing of pins, pads, fingers (etc) see below for details
|
- Multiplexing of pins, pads, fingers (etc) see below for details
|
||||||
|
|
||||||
The intention is to also deal with:
|
- Configuration of pins, pads, fingers (etc), such as software-controlled
|
||||||
|
biasing and driving mode specific pins, such as pull-up/down, open drain,
|
||||||
- Software-controlled biasing and driving mode specific pins, such as
|
load capacitance etc.
|
||||||
pull-up/down, open drain etc, load capacitance configuration when controlled
|
|
||||||
by software, etc.
|
|
||||||
|
|
||||||
|
|
||||||
Top-level interface
|
Top-level interface
|
||||||
===================
|
===================
|
||||||
|
|
@ -32,7 +29,7 @@ Definition of PIN:
|
||||||
be sparse - i.e. there may be gaps in the space with numbers where no
|
be sparse - i.e. there may be gaps in the space with numbers where no
|
||||||
pin exists.
|
pin exists.
|
||||||
|
|
||||||
When a PIN CONTROLLER is instatiated, it will register a descriptor to the
|
When a PIN CONTROLLER is instantiated, it will register a descriptor to the
|
||||||
pin control framework, and this descriptor contains an array of pin descriptors
|
pin control framework, and this descriptor contains an array of pin descriptors
|
||||||
describing the pins handled by this specific pin controller.
|
describing the pins handled by this specific pin controller.
|
||||||
|
|
||||||
|
|
@ -61,14 +58,14 @@ this in our driver:
|
||||||
|
|
||||||
#include <linux/pinctrl/pinctrl.h>
|
#include <linux/pinctrl/pinctrl.h>
|
||||||
|
|
||||||
const struct pinctrl_pin_desc __refdata foo_pins[] = {
|
const struct pinctrl_pin_desc foo_pins[] = {
|
||||||
PINCTRL_PIN(0, "A1"),
|
PINCTRL_PIN(0, "A8"),
|
||||||
PINCTRL_PIN(1, "A2"),
|
PINCTRL_PIN(1, "B8"),
|
||||||
PINCTRL_PIN(2, "A3"),
|
PINCTRL_PIN(2, "C8"),
|
||||||
...
|
...
|
||||||
PINCTRL_PIN(61, "H6"),
|
PINCTRL_PIN(61, "F1"),
|
||||||
PINCTRL_PIN(62, "H7"),
|
PINCTRL_PIN(62, "G1"),
|
||||||
PINCTRL_PIN(63, "H8"),
|
PINCTRL_PIN(63, "H1"),
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct pinctrl_desc foo_desc = {
|
static struct pinctrl_desc foo_desc = {
|
||||||
|
|
@ -88,11 +85,16 @@ int __init foo_probe(void)
|
||||||
pr_err("could not register foo pin driver\n");
|
pr_err("could not register foo pin driver\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
To enable the pinctrl subsystem and the subgroups for PINMUX and PINCONF and
|
||||||
|
selected drivers, you need to select them from your machine's Kconfig entry,
|
||||||
|
since these are so tightly integrated with the machines they are used on.
|
||||||
|
See for example arch/arm/mach-u300/Kconfig for an example.
|
||||||
|
|
||||||
Pins usually have fancier names than this. You can find these in the dataheet
|
Pins usually have fancier names than this. You can find these in the dataheet
|
||||||
for your chip. Notice that the core pinctrl.h file provides a fancy macro
|
for your chip. Notice that the core pinctrl.h file provides a fancy macro
|
||||||
called PINCTRL_PIN() to create the struct entries. As you can see I enumerated
|
called PINCTRL_PIN() to create the struct entries. As you can see I enumerated
|
||||||
the pins from 0 in the upper left corner to 63 in the lower right corner,
|
the pins from 0 in the upper left corner to 63 in the lower right corner.
|
||||||
this enumeration was arbitrarily chosen, in practice you need to think
|
This enumeration was arbitrarily chosen, in practice you need to think
|
||||||
through your numbering system so that it matches the layout of registers
|
through your numbering system so that it matches the layout of registers
|
||||||
and such things in your driver, or the code may become complicated. You must
|
and such things in your driver, or the code may become complicated. You must
|
||||||
also consider matching of offsets to the GPIO ranges that may be handled by
|
also consider matching of offsets to the GPIO ranges that may be handled by
|
||||||
|
|
@ -133,8 +135,8 @@ struct foo_group {
|
||||||
const unsigned num_pins;
|
const unsigned num_pins;
|
||||||
};
|
};
|
||||||
|
|
||||||
static unsigned int spi0_pins[] = { 0, 8, 16, 24 };
|
static const unsigned int spi0_pins[] = { 0, 8, 16, 24 };
|
||||||
static unsigned int i2c0_pins[] = { 24, 25 };
|
static const unsigned int i2c0_pins[] = { 24, 25 };
|
||||||
|
|
||||||
static const struct foo_group foo_groups[] = {
|
static const struct foo_group foo_groups[] = {
|
||||||
{
|
{
|
||||||
|
|
@ -193,6 +195,88 @@ structure, for example specific register ranges associated with each group
|
||||||
and so on.
|
and so on.
|
||||||
|
|
||||||
|
|
||||||
|
Pin configuration
|
||||||
|
=================
|
||||||
|
|
||||||
|
Pins can sometimes be software-configured in an various ways, mostly related
|
||||||
|
to their electronic properties when used as inputs or outputs. For example you
|
||||||
|
may be able to make an output pin high impedance, or "tristate" meaning it is
|
||||||
|
effectively disconnected. You may be able to connect an input pin to VDD or GND
|
||||||
|
using a certain resistor value - pull up and pull down - so that the pin has a
|
||||||
|
stable value when nothing is driving the rail it is connected to, or when it's
|
||||||
|
unconnected.
|
||||||
|
|
||||||
|
For example, a platform may do this:
|
||||||
|
|
||||||
|
ret = pin_config_set("foo-dev", "FOO_GPIO_PIN", PLATFORM_X_PULL_UP);
|
||||||
|
|
||||||
|
To pull up a pin to VDD. The pin configuration driver implements callbacks for
|
||||||
|
changing pin configuration in the pin controller ops like this:
|
||||||
|
|
||||||
|
#include <linux/pinctrl/pinctrl.h>
|
||||||
|
#include <linux/pinctrl/pinconf.h>
|
||||||
|
#include "platform_x_pindefs.h"
|
||||||
|
|
||||||
|
static int foo_pin_config_get(struct pinctrl_dev *pctldev,
|
||||||
|
unsigned offset,
|
||||||
|
unsigned long *config)
|
||||||
|
{
|
||||||
|
struct my_conftype conf;
|
||||||
|
|
||||||
|
... Find setting for pin @ offset ...
|
||||||
|
|
||||||
|
*config = (unsigned long) conf;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int foo_pin_config_set(struct pinctrl_dev *pctldev,
|
||||||
|
unsigned offset,
|
||||||
|
unsigned long config)
|
||||||
|
{
|
||||||
|
struct my_conftype *conf = (struct my_conftype *) config;
|
||||||
|
|
||||||
|
switch (conf) {
|
||||||
|
case PLATFORM_X_PULL_UP:
|
||||||
|
...
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static int foo_pin_config_group_get (struct pinctrl_dev *pctldev,
|
||||||
|
unsigned selector,
|
||||||
|
unsigned long *config)
|
||||||
|
{
|
||||||
|
...
|
||||||
|
}
|
||||||
|
|
||||||
|
static int foo_pin_config_group_set (struct pinctrl_dev *pctldev,
|
||||||
|
unsigned selector,
|
||||||
|
unsigned long config)
|
||||||
|
{
|
||||||
|
...
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct pinconf_ops foo_pconf_ops = {
|
||||||
|
.pin_config_get = foo_pin_config_get,
|
||||||
|
.pin_config_set = foo_pin_config_set,
|
||||||
|
.pin_config_group_get = foo_pin_config_group_get,
|
||||||
|
.pin_config_group_set = foo_pin_config_group_set,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Pin config operations are handled by some pin controller */
|
||||||
|
static struct pinctrl_desc foo_desc = {
|
||||||
|
...
|
||||||
|
.confops = &foo_pconf_ops,
|
||||||
|
};
|
||||||
|
|
||||||
|
Since some controllers have special logic for handling entire groups of pins
|
||||||
|
they can exploit the special whole-group pin control function. The
|
||||||
|
pin_config_group_set() callback is allowed to return the error code -EAGAIN,
|
||||||
|
for groups it does not want to handle, or if it just wants to do some
|
||||||
|
group-level handling and then fall through to iterate over all pins, in which
|
||||||
|
case each individual pin will be treated by separate pin_config_set() calls as
|
||||||
|
well.
|
||||||
|
|
||||||
|
|
||||||
Interaction with the GPIO subsystem
|
Interaction with the GPIO subsystem
|
||||||
===================================
|
===================================
|
||||||
|
|
||||||
|
|
@ -214,19 +298,20 @@ static struct pinctrl_gpio_range gpio_range_a = {
|
||||||
.name = "chip a",
|
.name = "chip a",
|
||||||
.id = 0,
|
.id = 0,
|
||||||
.base = 32,
|
.base = 32,
|
||||||
|
.pin_base = 32,
|
||||||
.npins = 16,
|
.npins = 16,
|
||||||
.gc = &chip_a;
|
.gc = &chip_a;
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct pinctrl_gpio_range gpio_range_a = {
|
static struct pinctrl_gpio_range gpio_range_b = {
|
||||||
.name = "chip b",
|
.name = "chip b",
|
||||||
.id = 0,
|
.id = 0,
|
||||||
.base = 48,
|
.base = 48,
|
||||||
|
.pin_base = 64,
|
||||||
.npins = 8,
|
.npins = 8,
|
||||||
.gc = &chip_b;
|
.gc = &chip_b;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
{
|
{
|
||||||
struct pinctrl_dev *pctl;
|
struct pinctrl_dev *pctl;
|
||||||
...
|
...
|
||||||
|
|
@ -235,42 +320,39 @@ static struct pinctrl_gpio_range gpio_range_a = {
|
||||||
}
|
}
|
||||||
|
|
||||||
So this complex system has one pin controller handling two different
|
So this complex system has one pin controller handling two different
|
||||||
GPIO chips. Chip a has 16 pins and chip b has 8 pins. They are mapped in
|
GPIO chips. "chip a" has 16 pins and "chip b" has 8 pins. The "chip a" and
|
||||||
the global GPIO pin space at:
|
"chip b" have different .pin_base, which means a start pin number of the
|
||||||
|
GPIO range.
|
||||||
|
|
||||||
chip a: [32 .. 47]
|
The GPIO range of "chip a" starts from the GPIO base of 32 and actual
|
||||||
chip b: [48 .. 55]
|
pin range also starts from 32. However "chip b" has different starting
|
||||||
|
offset for the GPIO range and pin range. The GPIO range of "chip b" starts
|
||||||
|
from GPIO number 48, while the pin range of "chip b" starts from 64.
|
||||||
|
|
||||||
|
We can convert a gpio number to actual pin number using this "pin_base".
|
||||||
|
They are mapped in the global GPIO pin space at:
|
||||||
|
|
||||||
|
chip a:
|
||||||
|
- GPIO range : [32 .. 47]
|
||||||
|
- pin range : [32 .. 47]
|
||||||
|
chip b:
|
||||||
|
- GPIO range : [48 .. 55]
|
||||||
|
- pin range : [64 .. 71]
|
||||||
|
|
||||||
When GPIO-specific functions in the pin control subsystem are called, these
|
When GPIO-specific functions in the pin control subsystem are called, these
|
||||||
ranges will be used to look up the apropriate pin controller by inspecting
|
ranges will be used to look up the appropriate pin controller by inspecting
|
||||||
and matching the pin to the pin ranges across all controllers. When a
|
and matching the pin to the pin ranges across all controllers. When a
|
||||||
pin controller handling the matching range is found, GPIO-specific functions
|
pin controller handling the matching range is found, GPIO-specific functions
|
||||||
will be called on that specific pin controller.
|
will be called on that specific pin controller.
|
||||||
|
|
||||||
For all functionalities dealing with pin biasing, pin muxing etc, the pin
|
For all functionalities dealing with pin biasing, pin muxing etc, the pin
|
||||||
controller subsystem will subtract the range's .base offset from the passed
|
controller subsystem will subtract the range's .base offset from the passed
|
||||||
in gpio pin number, and pass that on to the pin control driver, so the driver
|
in gpio number, and add the ranges's .pin_base offset to retrive a pin number.
|
||||||
will get an offset into its handled number range. Further it is also passed
|
After that, the subsystem passes it on to the pin control driver, so the driver
|
||||||
|
will get an pin number into its handled number range. Further it is also passed
|
||||||
the range ID value, so that the pin controller knows which range it should
|
the range ID value, so that the pin controller knows which range it should
|
||||||
deal with.
|
deal with.
|
||||||
|
|
||||||
For example: if a user issues pinctrl_gpio_set_foo(50), the pin control
|
|
||||||
subsystem will find that the second range on this pin controller matches,
|
|
||||||
subtract the base 48 and call the
|
|
||||||
pinctrl_driver_gpio_set_foo(pinctrl, range, 2) where the latter function has
|
|
||||||
this signature:
|
|
||||||
|
|
||||||
int pinctrl_driver_gpio_set_foo(struct pinctrl_dev *pctldev,
|
|
||||||
struct pinctrl_gpio_range *rangeid,
|
|
||||||
unsigned offset);
|
|
||||||
|
|
||||||
Now the driver knows that we want to do some GPIO-specific operation on the
|
|
||||||
second GPIO range handled by "chip b", at offset 2 in that specific range.
|
|
||||||
|
|
||||||
(If the GPIO subsystem is ever refactored to use a local per-GPIO controller
|
|
||||||
pin space, this mapping will need to be augmented accordingly.)
|
|
||||||
|
|
||||||
|
|
||||||
PINMUX interfaces
|
PINMUX interfaces
|
||||||
=================
|
=================
|
||||||
|
|
||||||
|
|
@ -438,7 +520,7 @@ you. Define enumerators only for the pins you can control if that makes sense.
|
||||||
|
|
||||||
Assumptions:
|
Assumptions:
|
||||||
|
|
||||||
We assume that the number possible function maps to pin groups is limited by
|
We assume that the number of possible function maps to pin groups is limited by
|
||||||
the hardware. I.e. we assume that there is no system where any function can be
|
the hardware. I.e. we assume that there is no system where any function can be
|
||||||
mapped to any pin, like in a phone exchange. So the available pins groups for
|
mapped to any pin, like in a phone exchange. So the available pins groups for
|
||||||
a certain function will be limited to a few choices (say up to eight or so),
|
a certain function will be limited to a few choices (say up to eight or so),
|
||||||
|
|
@ -585,7 +667,7 @@ int foo_list_funcs(struct pinctrl_dev *pctldev, unsigned selector)
|
||||||
|
|
||||||
const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
|
const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
|
||||||
{
|
{
|
||||||
return myfuncs[selector].name;
|
return foo_functions[selector].name;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
|
static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
|
||||||
|
|
@ -600,16 +682,16 @@ static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
|
||||||
int foo_enable(struct pinctrl_dev *pctldev, unsigned selector,
|
int foo_enable(struct pinctrl_dev *pctldev, unsigned selector,
|
||||||
unsigned group)
|
unsigned group)
|
||||||
{
|
{
|
||||||
u8 regbit = (1 << group);
|
u8 regbit = (1 << selector + group);
|
||||||
|
|
||||||
writeb((readb(MUX)|regbit), MUX)
|
writeb((readb(MUX)|regbit), MUX)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int foo_disable(struct pinctrl_dev *pctldev, unsigned selector,
|
void foo_disable(struct pinctrl_dev *pctldev, unsigned selector,
|
||||||
unsigned group)
|
unsigned group)
|
||||||
{
|
{
|
||||||
u8 regbit = (1 << group);
|
u8 regbit = (1 << selector + group);
|
||||||
|
|
||||||
writeb((readb(MUX) & ~(regbit)), MUX)
|
writeb((readb(MUX) & ~(regbit)), MUX)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
@ -647,6 +729,17 @@ All the above functions are mandatory to implement for a pinmux driver.
|
||||||
Pinmux interaction with the GPIO subsystem
|
Pinmux interaction with the GPIO subsystem
|
||||||
==========================================
|
==========================================
|
||||||
|
|
||||||
|
The public pinmux API contains two functions named pinmux_request_gpio()
|
||||||
|
and pinmux_free_gpio(). These two functions shall *ONLY* be called from
|
||||||
|
gpiolib-based drivers as part of their gpio_request() and
|
||||||
|
gpio_free() semantics. Likewise the pinmux_gpio_direction_[input|output]
|
||||||
|
shall only be called from within respective gpio_direction_[input|output]
|
||||||
|
gpiolib implementation.
|
||||||
|
|
||||||
|
NOTE that platforms and individual drivers shall *NOT* request GPIO pins to be
|
||||||
|
muxed in. Instead, implement a proper gpiolib driver and have that driver
|
||||||
|
request proper muxing for its pins.
|
||||||
|
|
||||||
The function list could become long, especially if you can convert every
|
The function list could become long, especially if you can convert every
|
||||||
individual pin into a GPIO pin independent of any other pins, and then try
|
individual pin into a GPIO pin independent of any other pins, and then try
|
||||||
the approach to define every pin as a function.
|
the approach to define every pin as a function.
|
||||||
|
|
@ -654,19 +747,24 @@ the approach to define every pin as a function.
|
||||||
In this case, the function array would become 64 entries for each GPIO
|
In this case, the function array would become 64 entries for each GPIO
|
||||||
setting and then the device functions.
|
setting and then the device functions.
|
||||||
|
|
||||||
For this reason there is an additional function a pinmux driver can implement
|
For this reason there are two functions a pinmux driver can implement
|
||||||
to enable only GPIO on an individual pin: .gpio_request_enable(). The same
|
to enable only GPIO on an individual pin: .gpio_request_enable() and
|
||||||
.free() function as for other functions is assumed to be usable also for
|
.gpio_disable_free().
|
||||||
GPIO pins.
|
|
||||||
|
|
||||||
This function will pass in the affected GPIO range identified by the pin
|
This function will pass in the affected GPIO range identified by the pin
|
||||||
controller core, so you know which GPIO pins are being affected by the request
|
controller core, so you know which GPIO pins are being affected by the request
|
||||||
operation.
|
operation.
|
||||||
|
|
||||||
Alternatively it is fully allowed to use named functions for each GPIO
|
If your driver needs to have an indication from the framework of whether the
|
||||||
pin, the pinmux_request_gpio() will attempt to obtain the function "gpioN"
|
GPIO pin shall be used for input or output you can implement the
|
||||||
where "N" is the global GPIO pin number if no special GPIO-handler is
|
.gpio_set_direction() function. As described this shall be called from the
|
||||||
registered.
|
gpiolib driver and the affected GPIO range, pin offset and desired direction
|
||||||
|
will be passed along to this function.
|
||||||
|
|
||||||
|
Alternatively to using these special functions, it is fully allowed to use
|
||||||
|
named functions for each GPIO pin, the pinmux_request_gpio() will attempt to
|
||||||
|
obtain the function "gpioN" where "N" is the global GPIO pin number if no
|
||||||
|
special GPIO-handler is registered.
|
||||||
|
|
||||||
|
|
||||||
Pinmux board/machine configuration
|
Pinmux board/machine configuration
|
||||||
|
|
@ -683,19 +781,19 @@ spi on the second function mapping:
|
||||||
|
|
||||||
#include <linux/pinctrl/machine.h>
|
#include <linux/pinctrl/machine.h>
|
||||||
|
|
||||||
static struct pinmux_map pmx_mapping[] = {
|
static const struct pinmux_map __initdata pmx_mapping[] = {
|
||||||
{
|
{
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
.function = "spi0",
|
.function = "spi0",
|
||||||
.dev_name = "foo-spi.0",
|
.dev_name = "foo-spi.0",
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
.function = "i2c0",
|
.function = "i2c0",
|
||||||
.dev_name = "foo-i2c.0",
|
.dev_name = "foo-i2c.0",
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
.function = "mmc0",
|
.function = "mmc0",
|
||||||
.dev_name = "foo-mmc.0",
|
.dev_name = "foo-mmc.0",
|
||||||
},
|
},
|
||||||
|
|
@ -714,14 +812,14 @@ for example if they are not yet instantiated or cumbersome to obtain.
|
||||||
|
|
||||||
You register this pinmux mapping to the pinmux subsystem by simply:
|
You register this pinmux mapping to the pinmux subsystem by simply:
|
||||||
|
|
||||||
ret = pinmux_register_mappings(&pmx_mapping, ARRAY_SIZE(pmx_mapping));
|
ret = pinmux_register_mappings(pmx_mapping, ARRAY_SIZE(pmx_mapping));
|
||||||
|
|
||||||
Since the above construct is pretty common there is a helper macro to make
|
Since the above construct is pretty common there is a helper macro to make
|
||||||
it even more compact which assumes you want to use pinctrl.0 and position
|
it even more compact which assumes you want to use pinctrl-foo and position
|
||||||
0 for mapping, for example:
|
0 for mapping, for example:
|
||||||
|
|
||||||
static struct pinmux_map pmx_mapping[] = {
|
static struct pinmux_map __initdata pmx_mapping[] = {
|
||||||
PINMUX_MAP_PRIMARY("I2CMAP", "i2c0", "foo-i2c.0"),
|
PINMUX_MAP("I2CMAP", "pinctrl-foo", "i2c0", "foo-i2c.0"),
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -734,14 +832,14 @@ As it is possible to map a function to different groups of pins an optional
|
||||||
...
|
...
|
||||||
{
|
{
|
||||||
.name = "spi0-pos-A",
|
.name = "spi0-pos-A",
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
.function = "spi0",
|
.function = "spi0",
|
||||||
.group = "spi0_0_grp",
|
.group = "spi0_0_grp",
|
||||||
.dev_name = "foo-spi.0",
|
.dev_name = "foo-spi.0",
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.name = "spi0-pos-B",
|
.name = "spi0-pos-B",
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
.function = "spi0",
|
.function = "spi0",
|
||||||
.group = "spi0_1_grp",
|
.group = "spi0_1_grp",
|
||||||
.dev_name = "foo-spi.0",
|
.dev_name = "foo-spi.0",
|
||||||
|
|
@ -760,46 +858,46 @@ case), we define a mapping like this:
|
||||||
...
|
...
|
||||||
{
|
{
|
||||||
.name "2bit"
|
.name "2bit"
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
.function = "mmc0",
|
|
||||||
.group = "mmc0_0_grp",
|
|
||||||
.dev_name = "foo-mmc.0",
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.name "4bit"
|
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
|
||||||
.function = "mmc0",
|
|
||||||
.group = "mmc0_0_grp",
|
|
||||||
.dev_name = "foo-mmc.0",
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.name "4bit"
|
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
|
||||||
.function = "mmc0",
|
.function = "mmc0",
|
||||||
.group = "mmc0_1_grp",
|
.group = "mmc0_1_grp",
|
||||||
.dev_name = "foo-mmc.0",
|
.dev_name = "foo-mmc.0",
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.name "8bit"
|
.name "4bit"
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
.function = "mmc0",
|
|
||||||
.group = "mmc0_0_grp",
|
|
||||||
.dev_name = "foo-mmc.0",
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.name "8bit"
|
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
|
||||||
.function = "mmc0",
|
.function = "mmc0",
|
||||||
.group = "mmc0_1_grp",
|
.group = "mmc0_1_grp",
|
||||||
.dev_name = "foo-mmc.0",
|
.dev_name = "foo-mmc.0",
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.name "8bit"
|
.name "4bit"
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
.function = "mmc0",
|
.function = "mmc0",
|
||||||
.group = "mmc0_2_grp",
|
.group = "mmc0_2_grp",
|
||||||
.dev_name = "foo-mmc.0",
|
.dev_name = "foo-mmc.0",
|
||||||
},
|
},
|
||||||
|
{
|
||||||
|
.name "8bit"
|
||||||
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
|
.function = "mmc0",
|
||||||
|
.group = "mmc0_1_grp",
|
||||||
|
.dev_name = "foo-mmc.0",
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name "8bit"
|
||||||
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
|
.function = "mmc0",
|
||||||
|
.group = "mmc0_2_grp",
|
||||||
|
.dev_name = "foo-mmc.0",
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name "8bit"
|
||||||
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
|
.function = "mmc0",
|
||||||
|
.group = "mmc0_3_grp",
|
||||||
|
.dev_name = "foo-mmc.0",
|
||||||
|
},
|
||||||
...
|
...
|
||||||
|
|
||||||
The result of grabbing this mapping from the device with something like
|
The result of grabbing this mapping from the device with something like
|
||||||
|
|
@ -898,7 +996,7 @@ like this:
|
||||||
|
|
||||||
{
|
{
|
||||||
.name "POWERMAP"
|
.name "POWERMAP"
|
||||||
.ctrl_dev_name = "pinctrl.0",
|
.ctrl_dev_name = "pinctrl-foo",
|
||||||
.function = "power_func",
|
.function = "power_func",
|
||||||
.hog_on_boot = true,
|
.hog_on_boot = true,
|
||||||
},
|
},
|
||||||
|
|
|
||||||
|
|
@ -12,7 +12,7 @@ Drivers can register a regulator by calling :-
|
||||||
|
|
||||||
struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,
|
struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,
|
||||||
struct device *dev, struct regulator_init_data *init_data,
|
struct device *dev, struct regulator_init_data *init_data,
|
||||||
void *driver_data);
|
void *driver_data, struct device_node *of_node);
|
||||||
|
|
||||||
This will register the regulators capabilities and operations to the regulator
|
This will register the regulators capabilities and operations to the regulator
|
||||||
core.
|
core.
|
||||||
|
|
|
||||||
|
|
@ -41,7 +41,6 @@ ldd
|
||||||
Debugging modules
|
Debugging modules
|
||||||
The proc file system
|
The proc file system
|
||||||
Starting points for debugging scripting languages etc.
|
Starting points for debugging scripting languages etc.
|
||||||
Dumptool & Lcrash
|
|
||||||
SysRq
|
SysRq
|
||||||
References
|
References
|
||||||
Special Thanks
|
Special Thanks
|
||||||
|
|
@ -2455,39 +2454,6 @@ jdb <filename> another fully interactive gdb style debugger.
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
Dumptool & Lcrash ( lkcd )
|
|
||||||
==========================
|
|
||||||
Michael Holzheu & others here at IBM have a fairly mature port of
|
|
||||||
SGI's lcrash tool which allows one to look at kernel structures in a
|
|
||||||
running kernel.
|
|
||||||
|
|
||||||
It also complements a tool called dumptool which dumps all the kernel's
|
|
||||||
memory pages & registers to either a tape or a disk.
|
|
||||||
This can be used by tech support or an ambitious end user do
|
|
||||||
post mortem debugging of a machine like gdb core dumps.
|
|
||||||
|
|
||||||
Going into how to use this tool in detail will be explained
|
|
||||||
in other documentation supplied by IBM with the patches & the
|
|
||||||
lcrash homepage http://oss.sgi.com/projects/lkcd/ & the lcrash manpage.
|
|
||||||
|
|
||||||
How they work
|
|
||||||
-------------
|
|
||||||
Lcrash is a perfectly normal program,however, it requires 2
|
|
||||||
additional files, Kerntypes which is built using a patch to the
|
|
||||||
linux kernel sources in the linux root directory & the System.map.
|
|
||||||
|
|
||||||
Kerntypes is an objectfile whose sole purpose in life
|
|
||||||
is to provide stabs debug info to lcrash, to do this
|
|
||||||
Kerntypes is built from kerntypes.c which just includes the most commonly
|
|
||||||
referenced header files used when debugging, lcrash can then read the
|
|
||||||
.stabs section of this file.
|
|
||||||
|
|
||||||
Debugging a live system it uses /dev/mem
|
|
||||||
alternatively for post mortem debugging it uses the data
|
|
||||||
collected by dumptool.
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
SysRq
|
SysRq
|
||||||
=====
|
=====
|
||||||
This is now supported by linux for s/390 & z/Architecture.
|
This is now supported by linux for s/390 & z/Architecture.
|
||||||
|
|
|
||||||
|
|
@ -101,7 +101,7 @@ hardware.
|
||||||
Returns the current state of modem control inputs. The state
|
Returns the current state of modem control inputs. The state
|
||||||
of the outputs should not be returned, since the core keeps
|
of the outputs should not be returned, since the core keeps
|
||||||
track of their state. The state information should include:
|
track of their state. The state information should include:
|
||||||
- TIOCM_DCD state of DCD signal
|
- TIOCM_CAR state of DCD signal
|
||||||
- TIOCM_CTS state of CTS signal
|
- TIOCM_CTS state of CTS signal
|
||||||
- TIOCM_DSR state of DSR signal
|
- TIOCM_DSR state of DSR signal
|
||||||
- TIOCM_RI state of RI signal
|
- TIOCM_RI state of RI signal
|
||||||
|
|
|
||||||
|
|
@ -40,8 +40,8 @@ but the call_site can usually be used to extrapolate that information.
|
||||||
==================
|
==================
|
||||||
mm_page_alloc page=%p pfn=%lu order=%d migratetype=%d gfp_flags=%s
|
mm_page_alloc page=%p pfn=%lu order=%d migratetype=%d gfp_flags=%s
|
||||||
mm_page_alloc_zone_locked page=%p pfn=%lu order=%u migratetype=%d cpu=%d percpu_refill=%d
|
mm_page_alloc_zone_locked page=%p pfn=%lu order=%u migratetype=%d cpu=%d percpu_refill=%d
|
||||||
mm_page_free_direct page=%p pfn=%lu order=%d
|
mm_page_free page=%p pfn=%lu order=%d
|
||||||
mm_pagevec_free page=%p pfn=%lu order=%d cold=%d
|
mm_page_free_batched page=%p pfn=%lu order=%d cold=%d
|
||||||
|
|
||||||
These four events deal with page allocation and freeing. mm_page_alloc is
|
These four events deal with page allocation and freeing. mm_page_alloc is
|
||||||
a simple indicator of page allocator activity. Pages may be allocated from
|
a simple indicator of page allocator activity. Pages may be allocated from
|
||||||
|
|
@ -53,13 +53,13 @@ amounts of activity imply high activity on the zone->lock. Taking this lock
|
||||||
impairs performance by disabling interrupts, dirtying cache lines between
|
impairs performance by disabling interrupts, dirtying cache lines between
|
||||||
CPUs and serialising many CPUs.
|
CPUs and serialising many CPUs.
|
||||||
|
|
||||||
When a page is freed directly by the caller, the mm_page_free_direct event
|
When a page is freed directly by the caller, the only mm_page_free event
|
||||||
is triggered. Significant amounts of activity here could indicate that the
|
is triggered. Significant amounts of activity here could indicate that the
|
||||||
callers should be batching their activities.
|
callers should be batching their activities.
|
||||||
|
|
||||||
When pages are freed using a pagevec, the mm_pagevec_free is
|
When pages are freed in batch, the also mm_page_free_batched is triggered.
|
||||||
triggered. Broadly speaking, pages are taken off the LRU lock in bulk and
|
Broadly speaking, pages are taken off the LRU lock in bulk and
|
||||||
freed in batch with a pagevec. Significant amounts of activity here could
|
freed in batch with a page list. Significant amounts of activity here could
|
||||||
indicate that the system is under memory pressure and can also indicate
|
indicate that the system is under memory pressure and can also indicate
|
||||||
contention on the zone->lru_lock.
|
contention on the zone->lru_lock.
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -17,8 +17,8 @@ use Getopt::Long;
|
||||||
|
|
||||||
# Tracepoint events
|
# Tracepoint events
|
||||||
use constant MM_PAGE_ALLOC => 1;
|
use constant MM_PAGE_ALLOC => 1;
|
||||||
use constant MM_PAGE_FREE_DIRECT => 2;
|
use constant MM_PAGE_FREE => 2;
|
||||||
use constant MM_PAGEVEC_FREE => 3;
|
use constant MM_PAGE_FREE_BATCHED => 3;
|
||||||
use constant MM_PAGE_PCPU_DRAIN => 4;
|
use constant MM_PAGE_PCPU_DRAIN => 4;
|
||||||
use constant MM_PAGE_ALLOC_ZONE_LOCKED => 5;
|
use constant MM_PAGE_ALLOC_ZONE_LOCKED => 5;
|
||||||
use constant MM_PAGE_ALLOC_EXTFRAG => 6;
|
use constant MM_PAGE_ALLOC_EXTFRAG => 6;
|
||||||
|
|
@ -223,10 +223,10 @@ EVENT_PROCESS:
|
||||||
# Perl Switch() sucks majorly
|
# Perl Switch() sucks majorly
|
||||||
if ($tracepoint eq "mm_page_alloc") {
|
if ($tracepoint eq "mm_page_alloc") {
|
||||||
$perprocesspid{$process_pid}->{MM_PAGE_ALLOC}++;
|
$perprocesspid{$process_pid}->{MM_PAGE_ALLOC}++;
|
||||||
} elsif ($tracepoint eq "mm_page_free_direct") {
|
} elsif ($tracepoint eq "mm_page_free") {
|
||||||
$perprocesspid{$process_pid}->{MM_PAGE_FREE_DIRECT}++;
|
$perprocesspid{$process_pid}->{MM_PAGE_FREE}++
|
||||||
} elsif ($tracepoint eq "mm_pagevec_free") {
|
} elsif ($tracepoint eq "mm_page_free_batched") {
|
||||||
$perprocesspid{$process_pid}->{MM_PAGEVEC_FREE}++;
|
$perprocesspid{$process_pid}->{MM_PAGE_FREE_BATCHED}++;
|
||||||
} elsif ($tracepoint eq "mm_page_pcpu_drain") {
|
} elsif ($tracepoint eq "mm_page_pcpu_drain") {
|
||||||
$perprocesspid{$process_pid}->{MM_PAGE_PCPU_DRAIN}++;
|
$perprocesspid{$process_pid}->{MM_PAGE_PCPU_DRAIN}++;
|
||||||
$perprocesspid{$process_pid}->{STATE_PCPU_PAGES_DRAINED}++;
|
$perprocesspid{$process_pid}->{STATE_PCPU_PAGES_DRAINED}++;
|
||||||
|
|
@ -336,8 +336,8 @@ sub dump_stats {
|
||||||
$process_pid,
|
$process_pid,
|
||||||
$stats{$process_pid}->{MM_PAGE_ALLOC},
|
$stats{$process_pid}->{MM_PAGE_ALLOC},
|
||||||
$stats{$process_pid}->{MM_PAGE_ALLOC_ZONE_LOCKED},
|
$stats{$process_pid}->{MM_PAGE_ALLOC_ZONE_LOCKED},
|
||||||
$stats{$process_pid}->{MM_PAGE_FREE_DIRECT},
|
$stats{$process_pid}->{MM_PAGE_FREE},
|
||||||
$stats{$process_pid}->{MM_PAGEVEC_FREE},
|
$stats{$process_pid}->{MM_PAGE_FREE_BATCHED},
|
||||||
$stats{$process_pid}->{MM_PAGE_PCPU_DRAIN},
|
$stats{$process_pid}->{MM_PAGE_PCPU_DRAIN},
|
||||||
$stats{$process_pid}->{HIGH_PCPU_DRAINS},
|
$stats{$process_pid}->{HIGH_PCPU_DRAINS},
|
||||||
$stats{$process_pid}->{HIGH_PCPU_REFILLS},
|
$stats{$process_pid}->{HIGH_PCPU_REFILLS},
|
||||||
|
|
@ -364,8 +364,8 @@ sub aggregate_perprocesspid() {
|
||||||
|
|
||||||
$perprocess{$process}->{MM_PAGE_ALLOC} += $perprocesspid{$process_pid}->{MM_PAGE_ALLOC};
|
$perprocess{$process}->{MM_PAGE_ALLOC} += $perprocesspid{$process_pid}->{MM_PAGE_ALLOC};
|
||||||
$perprocess{$process}->{MM_PAGE_ALLOC_ZONE_LOCKED} += $perprocesspid{$process_pid}->{MM_PAGE_ALLOC_ZONE_LOCKED};
|
$perprocess{$process}->{MM_PAGE_ALLOC_ZONE_LOCKED} += $perprocesspid{$process_pid}->{MM_PAGE_ALLOC_ZONE_LOCKED};
|
||||||
$perprocess{$process}->{MM_PAGE_FREE_DIRECT} += $perprocesspid{$process_pid}->{MM_PAGE_FREE_DIRECT};
|
$perprocess{$process}->{MM_PAGE_FREE} += $perprocesspid{$process_pid}->{MM_PAGE_FREE};
|
||||||
$perprocess{$process}->{MM_PAGEVEC_FREE} += $perprocesspid{$process_pid}->{MM_PAGEVEC_FREE};
|
$perprocess{$process}->{MM_PAGE_FREE_BATCHED} += $perprocesspid{$process_pid}->{MM_PAGE_FREE_BATCHED};
|
||||||
$perprocess{$process}->{MM_PAGE_PCPU_DRAIN} += $perprocesspid{$process_pid}->{MM_PAGE_PCPU_DRAIN};
|
$perprocess{$process}->{MM_PAGE_PCPU_DRAIN} += $perprocesspid{$process_pid}->{MM_PAGE_PCPU_DRAIN};
|
||||||
$perprocess{$process}->{HIGH_PCPU_DRAINS} += $perprocesspid{$process_pid}->{HIGH_PCPU_DRAINS};
|
$perprocess{$process}->{HIGH_PCPU_DRAINS} += $perprocesspid{$process_pid}->{HIGH_PCPU_DRAINS};
|
||||||
$perprocess{$process}->{HIGH_PCPU_REFILLS} += $perprocesspid{$process_pid}->{HIGH_PCPU_REFILLS};
|
$perprocess{$process}->{HIGH_PCPU_REFILLS} += $perprocesspid{$process_pid}->{HIGH_PCPU_REFILLS};
|
||||||
|
|
|
||||||
|
|
@ -93,14 +93,14 @@ By specifying the -a switch and analysing sleep, the system-wide events
|
||||||
for a duration of time can be examined.
|
for a duration of time can be examined.
|
||||||
|
|
||||||
$ perf stat -a \
|
$ perf stat -a \
|
||||||
-e kmem:mm_page_alloc -e kmem:mm_page_free_direct \
|
-e kmem:mm_page_alloc -e kmem:mm_page_free \
|
||||||
-e kmem:mm_pagevec_free \
|
-e kmem:mm_page_free_batched \
|
||||||
sleep 10
|
sleep 10
|
||||||
Performance counter stats for 'sleep 10':
|
Performance counter stats for 'sleep 10':
|
||||||
|
|
||||||
9630 kmem:mm_page_alloc
|
9630 kmem:mm_page_alloc
|
||||||
2143 kmem:mm_page_free_direct
|
2143 kmem:mm_page_free
|
||||||
7424 kmem:mm_pagevec_free
|
7424 kmem:mm_page_free_batched
|
||||||
|
|
||||||
10.002577764 seconds time elapsed
|
10.002577764 seconds time elapsed
|
||||||
|
|
||||||
|
|
@ -119,15 +119,15 @@ basis using set_ftrace_pid.
|
||||||
Events can be activated and tracked for the duration of a process on a local
|
Events can be activated and tracked for the duration of a process on a local
|
||||||
basis using PCL such as follows.
|
basis using PCL such as follows.
|
||||||
|
|
||||||
$ perf stat -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \
|
$ perf stat -e kmem:mm_page_alloc -e kmem:mm_page_free \
|
||||||
-e kmem:mm_pagevec_free ./hackbench 10
|
-e kmem:mm_page_free_batched ./hackbench 10
|
||||||
Time: 0.909
|
Time: 0.909
|
||||||
|
|
||||||
Performance counter stats for './hackbench 10':
|
Performance counter stats for './hackbench 10':
|
||||||
|
|
||||||
17803 kmem:mm_page_alloc
|
17803 kmem:mm_page_alloc
|
||||||
12398 kmem:mm_page_free_direct
|
12398 kmem:mm_page_free
|
||||||
4827 kmem:mm_pagevec_free
|
4827 kmem:mm_page_free_batched
|
||||||
|
|
||||||
0.973913387 seconds time elapsed
|
0.973913387 seconds time elapsed
|
||||||
|
|
||||||
|
|
@ -146,8 +146,8 @@ to know what the standard deviation is. By and large, this is left to the
|
||||||
performance analyst to do it by hand. In the event that the discrete event
|
performance analyst to do it by hand. In the event that the discrete event
|
||||||
occurrences are useful to the performance analyst, then perf can be used.
|
occurrences are useful to the performance analyst, then perf can be used.
|
||||||
|
|
||||||
$ perf stat --repeat 5 -e kmem:mm_page_alloc -e kmem:mm_page_free_direct
|
$ perf stat --repeat 5 -e kmem:mm_page_alloc -e kmem:mm_page_free
|
||||||
-e kmem:mm_pagevec_free ./hackbench 10
|
-e kmem:mm_page_free_batched ./hackbench 10
|
||||||
Time: 0.890
|
Time: 0.890
|
||||||
Time: 0.895
|
Time: 0.895
|
||||||
Time: 0.915
|
Time: 0.915
|
||||||
|
|
@ -157,8 +157,8 @@ occurrences are useful to the performance analyst, then perf can be used.
|
||||||
Performance counter stats for './hackbench 10' (5 runs):
|
Performance counter stats for './hackbench 10' (5 runs):
|
||||||
|
|
||||||
16630 kmem:mm_page_alloc ( +- 3.542% )
|
16630 kmem:mm_page_alloc ( +- 3.542% )
|
||||||
11486 kmem:mm_page_free_direct ( +- 4.771% )
|
11486 kmem:mm_page_free ( +- 4.771% )
|
||||||
4730 kmem:mm_pagevec_free ( +- 2.325% )
|
4730 kmem:mm_page_free_batched ( +- 2.325% )
|
||||||
|
|
||||||
0.982653002 seconds time elapsed ( +- 1.448% )
|
0.982653002 seconds time elapsed ( +- 1.448% )
|
||||||
|
|
||||||
|
|
@ -168,15 +168,15 @@ aggregation of discrete events, then a script would need to be developed.
|
||||||
Using --repeat, it is also possible to view how events are fluctuating over
|
Using --repeat, it is also possible to view how events are fluctuating over
|
||||||
time on a system-wide basis using -a and sleep.
|
time on a system-wide basis using -a and sleep.
|
||||||
|
|
||||||
$ perf stat -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \
|
$ perf stat -e kmem:mm_page_alloc -e kmem:mm_page_free \
|
||||||
-e kmem:mm_pagevec_free \
|
-e kmem:mm_page_free_batched \
|
||||||
-a --repeat 10 \
|
-a --repeat 10 \
|
||||||
sleep 1
|
sleep 1
|
||||||
Performance counter stats for 'sleep 1' (10 runs):
|
Performance counter stats for 'sleep 1' (10 runs):
|
||||||
|
|
||||||
1066 kmem:mm_page_alloc ( +- 26.148% )
|
1066 kmem:mm_page_alloc ( +- 26.148% )
|
||||||
182 kmem:mm_page_free_direct ( +- 5.464% )
|
182 kmem:mm_page_free ( +- 5.464% )
|
||||||
890 kmem:mm_pagevec_free ( +- 30.079% )
|
890 kmem:mm_page_free_batched ( +- 30.079% )
|
||||||
|
|
||||||
1.002251757 seconds time elapsed ( +- 0.005% )
|
1.002251757 seconds time elapsed ( +- 0.005% )
|
||||||
|
|
||||||
|
|
@ -220,8 +220,8 @@ were generating events within the kernel. To begin this sort of analysis, the
|
||||||
data must be recorded. At the time of writing, this required root:
|
data must be recorded. At the time of writing, this required root:
|
||||||
|
|
||||||
$ perf record -c 1 \
|
$ perf record -c 1 \
|
||||||
-e kmem:mm_page_alloc -e kmem:mm_page_free_direct \
|
-e kmem:mm_page_alloc -e kmem:mm_page_free \
|
||||||
-e kmem:mm_pagevec_free \
|
-e kmem:mm_page_free_batched \
|
||||||
./hackbench 10
|
./hackbench 10
|
||||||
Time: 0.894
|
Time: 0.894
|
||||||
[ perf record: Captured and wrote 0.733 MB perf.data (~32010 samples) ]
|
[ perf record: Captured and wrote 0.733 MB perf.data (~32010 samples) ]
|
||||||
|
|
@ -260,8 +260,8 @@ noticed that X was generating an insane amount of page allocations so let's look
|
||||||
at it:
|
at it:
|
||||||
|
|
||||||
$ perf record -c 1 -f \
|
$ perf record -c 1 -f \
|
||||||
-e kmem:mm_page_alloc -e kmem:mm_page_free_direct \
|
-e kmem:mm_page_alloc -e kmem:mm_page_free \
|
||||||
-e kmem:mm_pagevec_free \
|
-e kmem:mm_page_free_batched \
|
||||||
-p `pidof X`
|
-p `pidof X`
|
||||||
|
|
||||||
This was interrupted after a few seconds and
|
This was interrupted after a few seconds and
|
||||||
|
|
|
||||||
|
|
@ -47,10 +47,11 @@ This allows to filter away annoying devices that talk continuously.
|
||||||
|
|
||||||
2. Find which bus connects to the desired device
|
2. Find which bus connects to the desired device
|
||||||
|
|
||||||
Run "cat /proc/bus/usb/devices", and find the T-line which corresponds to
|
Run "cat /sys/kernel/debug/usb/devices", and find the T-line which corresponds
|
||||||
the device. Usually you do it by looking for the vendor string. If you have
|
to the device. Usually you do it by looking for the vendor string. If you have
|
||||||
many similar devices, unplug one and compare two /proc/bus/usb/devices outputs.
|
many similar devices, unplug one and compare the two
|
||||||
The T-line will have a bus number. Example:
|
/sys/kernel/debug/usb/devices outputs. The T-line will have a bus number.
|
||||||
|
Example:
|
||||||
|
|
||||||
T: Bus=03 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 2 Spd=12 MxCh= 0
|
T: Bus=03 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 2 Spd=12 MxCh= 0
|
||||||
D: Ver= 1.10 Cls=00(>ifc ) Sub=00 Prot=00 MxPS= 8 #Cfgs= 1
|
D: Ver= 1.10 Cls=00(>ifc ) Sub=00 Prot=00 MxPS= 8 #Cfgs= 1
|
||||||
|
|
@ -58,7 +59,10 @@ P: Vendor=0557 ProdID=2004 Rev= 1.00
|
||||||
S: Manufacturer=ATEN
|
S: Manufacturer=ATEN
|
||||||
S: Product=UC100KM V2.00
|
S: Product=UC100KM V2.00
|
||||||
|
|
||||||
Bus=03 means it's bus 3.
|
"Bus=03" means it's bus 3. Alternatively, you can look at the output from
|
||||||
|
"lsusb" and get the bus number from the appropriate line. Example:
|
||||||
|
|
||||||
|
Bus 003 Device 002: ID 0557:2004 ATEN UC100KM V2.00
|
||||||
|
|
||||||
3. Start 'cat'
|
3. Start 'cat'
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1466,6 +1466,31 @@ is supported; 2 if the processor requires all virtual machines to have
|
||||||
an RMA, or 1 if the processor can use an RMA but doesn't require it,
|
an RMA, or 1 if the processor can use an RMA but doesn't require it,
|
||||||
because it supports the Virtual RMA (VRMA) facility.
|
because it supports the Virtual RMA (VRMA) facility.
|
||||||
|
|
||||||
|
4.64 KVM_NMI
|
||||||
|
|
||||||
|
Capability: KVM_CAP_USER_NMI
|
||||||
|
Architectures: x86
|
||||||
|
Type: vcpu ioctl
|
||||||
|
Parameters: none
|
||||||
|
Returns: 0 on success, -1 on error
|
||||||
|
|
||||||
|
Queues an NMI on the thread's vcpu. Note this is well defined only
|
||||||
|
when KVM_CREATE_IRQCHIP has not been called, since this is an interface
|
||||||
|
between the virtual cpu core and virtual local APIC. After KVM_CREATE_IRQCHIP
|
||||||
|
has been called, this interface is completely emulated within the kernel.
|
||||||
|
|
||||||
|
To use this to emulate the LINT1 input with KVM_CREATE_IRQCHIP, use the
|
||||||
|
following algorithm:
|
||||||
|
|
||||||
|
- pause the vpcu
|
||||||
|
- read the local APIC's state (KVM_GET_LAPIC)
|
||||||
|
- check whether changing LINT1 will queue an NMI (see the LVT entry for LINT1)
|
||||||
|
- if so, issue KVM_NMI
|
||||||
|
- resume the vcpu
|
||||||
|
|
||||||
|
Some guests configure the LINT1 NMI input to cause a panic, aiding in
|
||||||
|
debugging.
|
||||||
|
|
||||||
5. The kvm_run structure
|
5. The kvm_run structure
|
||||||
|
|
||||||
Application code obtains a pointer to the kvm_run structure by
|
Application code obtains a pointer to the kvm_run structure by
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,7 @@
|
||||||
00-INDEX
|
00-INDEX
|
||||||
- this file.
|
- this file.
|
||||||
|
convert_drivers_to_kernel_api.txt
|
||||||
|
- how-to for converting old watchdog drivers to the new kernel API.
|
||||||
hpwdt.txt
|
hpwdt.txt
|
||||||
- information on the HP iLO2 NMI watchdog
|
- information on the HP iLO2 NMI watchdog
|
||||||
pcwd-watchdog.txt
|
pcwd-watchdog.txt
|
||||||
|
|
|
||||||
|
|
@ -163,6 +163,25 @@ Here is a simple example for a watchdog device:
|
||||||
+};
|
+};
|
||||||
|
|
||||||
|
|
||||||
|
Handle the 'nowayout' feature
|
||||||
|
-----------------------------
|
||||||
|
|
||||||
|
A few drivers use nowayout statically, i.e. there is no module parameter for it
|
||||||
|
and only CONFIG_WATCHDOG_NOWAYOUT determines if the feature is going to be
|
||||||
|
used. This needs to be converted by initializing the status variable of the
|
||||||
|
watchdog_device like this:
|
||||||
|
|
||||||
|
.status = WATCHDOG_NOWAYOUT_INIT_STATUS,
|
||||||
|
|
||||||
|
Most drivers, however, also allow runtime configuration of nowayout, usually
|
||||||
|
by adding a module parameter. The conversion for this would be something like:
|
||||||
|
|
||||||
|
watchdog_set_nowayout(&s3c2410_wdd, nowayout);
|
||||||
|
|
||||||
|
The module parameter itself needs to stay, everything else related to nowayout
|
||||||
|
can go, though. This will likely be some code in open(), close() or write().
|
||||||
|
|
||||||
|
|
||||||
Register the watchdog device
|
Register the watchdog device
|
||||||
----------------------------
|
----------------------------
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
The Linux WatchDog Timer Driver Core kernel API.
|
The Linux WatchDog Timer Driver Core kernel API.
|
||||||
===============================================
|
===============================================
|
||||||
Last reviewed: 22-Jul-2011
|
Last reviewed: 29-Nov-2011
|
||||||
|
|
||||||
Wim Van Sebroeck <wim@iguana.be>
|
Wim Van Sebroeck <wim@iguana.be>
|
||||||
|
|
||||||
|
|
@ -142,6 +142,14 @@ bit-operations. The status bits that are defined are:
|
||||||
* WDOG_NO_WAY_OUT: this bit stores the nowayout setting for the watchdog.
|
* WDOG_NO_WAY_OUT: this bit stores the nowayout setting for the watchdog.
|
||||||
If this bit is set then the watchdog timer will not be able to stop.
|
If this bit is set then the watchdog timer will not be able to stop.
|
||||||
|
|
||||||
|
To set the WDOG_NO_WAY_OUT status bit (before registering your watchdog
|
||||||
|
timer device) you can either:
|
||||||
|
* set it statically in your watchdog_device struct with
|
||||||
|
.status = WATCHDOG_NOWAYOUT_INIT_STATUS,
|
||||||
|
(this will set the value the same as CONFIG_WATCHDOG_NOWAYOUT) or
|
||||||
|
* use the following helper function:
|
||||||
|
static inline void watchdog_set_nowayout(struct watchdog_device *wdd, int nowayout)
|
||||||
|
|
||||||
Note: The WatchDog Timer Driver Core supports the magic close feature and
|
Note: The WatchDog Timer Driver Core supports the magic close feature and
|
||||||
the nowayout feature. To use the magic close feature you must set the
|
the nowayout feature. To use the magic close feature you must set the
|
||||||
WDIOF_MAGICCLOSE bit in the options field of the watchdog's info structure.
|
WDIOF_MAGICCLOSE bit in the options field of the watchdog's info structure.
|
||||||
|
|
|
||||||
129
MAINTAINERS
129
MAINTAINERS
|
|
@ -184,11 +184,6 @@ S: Maintained
|
||||||
F: Documentation/filesystems/9p.txt
|
F: Documentation/filesystems/9p.txt
|
||||||
F: fs/9p/
|
F: fs/9p/
|
||||||
|
|
||||||
A2232 SERIAL BOARD DRIVER
|
|
||||||
L: linux-m68k@lists.linux-m68k.org
|
|
||||||
S: Orphan
|
|
||||||
F: drivers/staging/generic_serial/ser_a2232*
|
|
||||||
|
|
||||||
AACRAID SCSI RAID DRIVER
|
AACRAID SCSI RAID DRIVER
|
||||||
M: Adaptec OEM Raid Solutions <aacraid@adaptec.com>
|
M: Adaptec OEM Raid Solutions <aacraid@adaptec.com>
|
||||||
L: linux-scsi@vger.kernel.org
|
L: linux-scsi@vger.kernel.org
|
||||||
|
|
@ -347,7 +342,7 @@ S: Supported
|
||||||
F: drivers/mfd/adp5520.c
|
F: drivers/mfd/adp5520.c
|
||||||
F: drivers/video/backlight/adp5520_bl.c
|
F: drivers/video/backlight/adp5520_bl.c
|
||||||
F: drivers/leds/leds-adp5520.c
|
F: drivers/leds/leds-adp5520.c
|
||||||
F: drivers/gpio/adp5520-gpio.c
|
F: drivers/gpio/gpio-adp5520.c
|
||||||
F: drivers/input/keyboard/adp5520-keys.c
|
F: drivers/input/keyboard/adp5520-keys.c
|
||||||
|
|
||||||
ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587)
|
ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587)
|
||||||
|
|
@ -356,7 +351,7 @@ L: device-drivers-devel@blackfin.uclinux.org
|
||||||
W: http://wiki.analog.com/ADP5588
|
W: http://wiki.analog.com/ADP5588
|
||||||
S: Supported
|
S: Supported
|
||||||
F: drivers/input/keyboard/adp5588-keys.c
|
F: drivers/input/keyboard/adp5588-keys.c
|
||||||
F: drivers/gpio/adp5588-gpio.c
|
F: drivers/gpio/gpio-adp5588.c
|
||||||
|
|
||||||
ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
|
ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
|
||||||
M: Michael Hennerich <michael.hennerich@analog.com>
|
M: Michael Hennerich <michael.hennerich@analog.com>
|
||||||
|
|
@ -919,7 +914,6 @@ M: Lennert Buytenhek <kernel@wantstofly.org>
|
||||||
M: Nicolas Pitre <nico@fluxnic.net>
|
M: Nicolas Pitre <nico@fluxnic.net>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
S: Odd Fixes
|
S: Odd Fixes
|
||||||
F: arch/arm/mach-loki/
|
|
||||||
F: arch/arm/mach-kirkwood/
|
F: arch/arm/mach-kirkwood/
|
||||||
F: arch/arm/mach-mv78xx0/
|
F: arch/arm/mach-mv78xx0/
|
||||||
F: arch/arm/mach-orion5x/
|
F: arch/arm/mach-orion5x/
|
||||||
|
|
@ -1081,8 +1075,8 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-s5pv210/mach-aquila.c
|
F: arch/arm/mach-s5pv210/mach-aquila.c
|
||||||
F: arch/arm/mach-s5pv210/mach-goni.c
|
F: arch/arm/mach-s5pv210/mach-goni.c
|
||||||
F: arch/arm/mach-exynos4/mach-universal_c210.c
|
F: arch/arm/mach-exynos/mach-universal_c210.c
|
||||||
F: arch/arm/mach-exynos4/mach-nuri.c
|
F: arch/arm/mach-exynos/mach-nuri.c
|
||||||
|
|
||||||
ARM/SAMSUNG S5P SERIES FIMC SUPPORT
|
ARM/SAMSUNG S5P SERIES FIMC SUPPORT
|
||||||
M: Kyungmin Park <kyungmin.park@samsung.com>
|
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||||
|
|
@ -1110,7 +1104,6 @@ M: Tomasz Stanislawski <t.stanislaws@samsung.com>
|
||||||
L: linux-arm-kernel@lists.infradead.org
|
L: linux-arm-kernel@lists.infradead.org
|
||||||
L: linux-media@vger.kernel.org
|
L: linux-media@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/plat-s5p/dev-tv.c
|
|
||||||
F: drivers/media/video/s5p-tv/
|
F: drivers/media/video/s5p-tv/
|
||||||
|
|
||||||
ARM/SHMOBILE ARM ARCHITECTURE
|
ARM/SHMOBILE ARM ARCHITECTURE
|
||||||
|
|
@ -1145,14 +1138,13 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
W: http://www.mcuos.com
|
W: http://www.mcuos.com
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-w90x900/
|
F: arch/arm/mach-w90x900/
|
||||||
F: arch/arm/mach-nuc93x/
|
|
||||||
F: drivers/input/keyboard/w90p910_keypad.c
|
F: drivers/input/keyboard/w90p910_keypad.c
|
||||||
F: drivers/input/touchscreen/w90p910_ts.c
|
F: drivers/input/touchscreen/w90p910_ts.c
|
||||||
F: drivers/watchdog/nuc900_wdt.c
|
F: drivers/watchdog/nuc900_wdt.c
|
||||||
F: drivers/net/ethernet/nuvoton/w90p910_ether.c
|
F: drivers/net/ethernet/nuvoton/w90p910_ether.c
|
||||||
F: drivers/mtd/nand/nuc900_nand.c
|
F: drivers/mtd/nand/nuc900_nand.c
|
||||||
F: drivers/rtc/rtc-nuc900.c
|
F: drivers/rtc/rtc-nuc900.c
|
||||||
F: drivers/spi/spi_nuc900.c
|
F: drivers/spi/spi-nuc900.c
|
||||||
F: drivers/usb/host/ehci-w90x900.c
|
F: drivers/usb/host/ehci-w90x900.c
|
||||||
F: drivers/video/nuc900fb.c
|
F: drivers/video/nuc900fb.c
|
||||||
|
|
||||||
|
|
@ -1177,7 +1169,6 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-ux500/
|
F: arch/arm/mach-ux500/
|
||||||
F: drivers/dma/ste_dma40*
|
F: drivers/dma/ste_dma40*
|
||||||
F: drivers/mfd/ab3550*
|
|
||||||
F: drivers/mfd/abx500*
|
F: drivers/mfd/abx500*
|
||||||
F: drivers/mfd/ab8500*
|
F: drivers/mfd/ab8500*
|
||||||
F: drivers/mfd/stmpe*
|
F: drivers/mfd/stmpe*
|
||||||
|
|
@ -1357,7 +1348,7 @@ F: drivers/net/ethernet/cadence/
|
||||||
ATMEL SPI DRIVER
|
ATMEL SPI DRIVER
|
||||||
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||||
S: Supported
|
S: Supported
|
||||||
F: drivers/spi/atmel_spi.*
|
F: drivers/spi/spi-atmel.*
|
||||||
|
|
||||||
ATMEL USBA UDC DRIVER
|
ATMEL USBA UDC DRIVER
|
||||||
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||||
|
|
@ -1496,7 +1487,7 @@ M: Sonic Zhang <sonic.zhang@analog.com>
|
||||||
L: uclinux-dist-devel@blackfin.uclinux.org
|
L: uclinux-dist-devel@blackfin.uclinux.org
|
||||||
W: http://blackfin.uclinux.org
|
W: http://blackfin.uclinux.org
|
||||||
S: Supported
|
S: Supported
|
||||||
F: drivers/tty/serial/bfin_5xx.c
|
F: drivers/tty/serial/bfin_uart.c
|
||||||
|
|
||||||
BLACKFIN WATCHDOG DRIVER
|
BLACKFIN WATCHDOG DRIVER
|
||||||
M: Mike Frysinger <vapier.adi@gmail.com>
|
M: Mike Frysinger <vapier.adi@gmail.com>
|
||||||
|
|
@ -1587,7 +1578,7 @@ M: Franky (Zhenhui) Lin <frankyl@broadcom.com>
|
||||||
M: Kan Yan <kanyan@broadcom.com>
|
M: Kan Yan <kanyan@broadcom.com>
|
||||||
L: linux-wireless@vger.kernel.org
|
L: linux-wireless@vger.kernel.org
|
||||||
S: Supported
|
S: Supported
|
||||||
F: drivers/staging/brcm80211/
|
F: drivers/net/wireless/brcm80211/
|
||||||
|
|
||||||
BROADCOM BNX2FC 10 GIGABIT FCOE DRIVER
|
BROADCOM BNX2FC 10 GIGABIT FCOE DRIVER
|
||||||
M: Bhanu Prakash Gollapudi <bprakash@broadcom.com>
|
M: Bhanu Prakash Gollapudi <bprakash@broadcom.com>
|
||||||
|
|
@ -1626,7 +1617,7 @@ BT8XXGPIO DRIVER
|
||||||
M: Michael Buesch <m@bues.ch>
|
M: Michael Buesch <m@bues.ch>
|
||||||
W: http://bu3sch.de/btgpio.php
|
W: http://bu3sch.de/btgpio.php
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/gpio/bt8xxgpio.c
|
F: drivers/gpio/gpio-bt8xx.c
|
||||||
|
|
||||||
BTRFS FILE SYSTEM
|
BTRFS FILE SYSTEM
|
||||||
M: Chris Mason <chris.mason@oracle.com>
|
M: Chris Mason <chris.mason@oracle.com>
|
||||||
|
|
@ -1654,6 +1645,14 @@ T: git git://git.alsa-project.org/alsa-kernel.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: sound/pci/oxygen/
|
F: sound/pci/oxygen/
|
||||||
|
|
||||||
|
C6X ARCHITECTURE
|
||||||
|
M: Mark Salter <msalter@redhat.com>
|
||||||
|
M: Aurelien Jacquiot <a-jacquiot@ti.com>
|
||||||
|
L: linux-c6x-dev@linux-c6x.org
|
||||||
|
W: http://www.linux-c6x.org/wiki/index.php/Main_Page
|
||||||
|
S: Maintained
|
||||||
|
F: arch/c6x/
|
||||||
|
|
||||||
CACHEFILES: FS-CACHE BACKEND FOR CACHING ON MOUNTED FILESYSTEMS
|
CACHEFILES: FS-CACHE BACKEND FOR CACHING ON MOUNTED FILESYSTEMS
|
||||||
M: David Howells <dhowells@redhat.com>
|
M: David Howells <dhowells@redhat.com>
|
||||||
L: linux-cachefs@redhat.com
|
L: linux-cachefs@redhat.com
|
||||||
|
|
@ -1667,7 +1666,7 @@ L: linux-media@vger.kernel.org
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: Documentation/video4linux/cafe_ccic
|
F: Documentation/video4linux/cafe_ccic
|
||||||
F: drivers/media/video/cafe_ccic*
|
F: drivers/media/video/marvell-ccic/
|
||||||
|
|
||||||
CAIF NETWORK LAYER
|
CAIF NETWORK LAYER
|
||||||
M: Sjur Braendeland <sjur.brandeland@stericsson.com>
|
M: Sjur Braendeland <sjur.brandeland@stericsson.com>
|
||||||
|
|
@ -1891,12 +1890,6 @@ L: platform-driver-x86@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/platform/x86/compal-laptop.c
|
F: drivers/platform/x86/compal-laptop.c
|
||||||
|
|
||||||
COMPUTONE INTELLIPORT MULTIPORT CARD
|
|
||||||
W: http://www.wittsend.com/computone.html
|
|
||||||
S: Orphan
|
|
||||||
F: Documentation/serial/computone.txt
|
|
||||||
F: drivers/staging/tty/ip2/
|
|
||||||
|
|
||||||
CONEXANT ACCESSRUNNER USB DRIVER
|
CONEXANT ACCESSRUNNER USB DRIVER
|
||||||
M: Simon Arlott <cxacru@fire.lp0.eu>
|
M: Simon Arlott <cxacru@fire.lp0.eu>
|
||||||
L: accessrunner-general@lists.sourceforge.net
|
L: accessrunner-general@lists.sourceforge.net
|
||||||
|
|
@ -2111,7 +2104,7 @@ DAVICOM FAST ETHERNET (DMFE) NETWORK DRIVER
|
||||||
L: netdev@vger.kernel.org
|
L: netdev@vger.kernel.org
|
||||||
S: Orphan
|
S: Orphan
|
||||||
F: Documentation/networking/dmfe.txt
|
F: Documentation/networking/dmfe.txt
|
||||||
F: drivers/net/ethernet/tulip/dmfe.c
|
F: drivers/net/ethernet/dec/tulip/dmfe.c
|
||||||
|
|
||||||
DC390/AM53C974 SCSI driver
|
DC390/AM53C974 SCSI driver
|
||||||
M: Kurt Garloff <garloff@suse.de>
|
M: Kurt Garloff <garloff@suse.de>
|
||||||
|
|
@ -2184,6 +2177,13 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/usb/dwc3/
|
F: drivers/usb/dwc3/
|
||||||
|
|
||||||
|
DEVICE FREQUENCY (DEVFREQ)
|
||||||
|
M: MyungJoo Ham <myungjoo.ham@samsung.com>
|
||||||
|
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||||
|
L: linux-kernel@vger.kernel.org
|
||||||
|
S: Maintained
|
||||||
|
F: drivers/devfreq/
|
||||||
|
|
||||||
DEVICE NUMBER REGISTRY
|
DEVICE NUMBER REGISTRY
|
||||||
M: Torben Mathiasen <device@lanana.org>
|
M: Torben Mathiasen <device@lanana.org>
|
||||||
W: http://lanana.org/docs/device-list/index.html
|
W: http://lanana.org/docs/device-list/index.html
|
||||||
|
|
@ -2200,15 +2200,6 @@ F: drivers/md/dm*
|
||||||
F: include/linux/device-mapper.h
|
F: include/linux/device-mapper.h
|
||||||
F: include/linux/dm-*.h
|
F: include/linux/dm-*.h
|
||||||
|
|
||||||
DIGI INTL. EPCA DRIVER
|
|
||||||
M: "Digi International, Inc" <Eng.Linux@digi.com>
|
|
||||||
L: Eng.Linux@digi.com
|
|
||||||
W: http://www.digi.com
|
|
||||||
S: Orphan
|
|
||||||
F: Documentation/serial/digiepca.txt
|
|
||||||
F: drivers/staging/tty/epca*
|
|
||||||
F: drivers/staging/tty/digi*
|
|
||||||
|
|
||||||
DIOLAN U2C-12 I2C DRIVER
|
DIOLAN U2C-12 I2C DRIVER
|
||||||
M: Guenter Roeck <guenter.roeck@ericsson.com>
|
M: Guenter Roeck <guenter.roeck@ericsson.com>
|
||||||
L: linux-i2c@vger.kernel.org
|
L: linux-i2c@vger.kernel.org
|
||||||
|
|
@ -2930,7 +2921,7 @@ GRETH 10/100/1G Ethernet MAC device driver
|
||||||
M: Kristoffer Glembo <kristoffer@gaisler.com>
|
M: Kristoffer Glembo <kristoffer@gaisler.com>
|
||||||
L: netdev@vger.kernel.org
|
L: netdev@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/net/greth*
|
F: drivers/net/ethernet/aeroflex/
|
||||||
|
|
||||||
GSPCA FINEPIX SUBDRIVER
|
GSPCA FINEPIX SUBDRIVER
|
||||||
M: Frank Zago <frank@zago.net>
|
M: Frank Zago <frank@zago.net>
|
||||||
|
|
@ -3880,8 +3871,7 @@ L: keyrings@linux-nfs.org
|
||||||
S: Supported
|
S: Supported
|
||||||
F: Documentation/security/keys-trusted-encrypted.txt
|
F: Documentation/security/keys-trusted-encrypted.txt
|
||||||
F: include/keys/encrypted-type.h
|
F: include/keys/encrypted-type.h
|
||||||
F: security/keys/encrypted.c
|
F: security/keys/encrypted-keys/
|
||||||
F: security/keys/encrypted.h
|
|
||||||
|
|
||||||
KGDB / KDB /debug_core
|
KGDB / KDB /debug_core
|
||||||
M: Jason Wessel <jason.wessel@windriver.com>
|
M: Jason Wessel <jason.wessel@windriver.com>
|
||||||
|
|
@ -5131,10 +5121,19 @@ L: linux-mtd@lists.infradead.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/mtd/devices/phram.c
|
F: drivers/mtd/devices/phram.c
|
||||||
|
|
||||||
|
PICOXCELL SUPPORT
|
||||||
|
M: Jamie Iles <jamie@jamieiles.com>
|
||||||
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
|
T: git git://github.com/jamieiles/linux-2.6-ji.git
|
||||||
|
S: Supported
|
||||||
|
F: arch/arm/mach-picoxcell
|
||||||
|
F: drivers/*/picoxcell*
|
||||||
|
F: drivers/*/*/picoxcell*
|
||||||
|
|
||||||
PIN CONTROL SUBSYSTEM
|
PIN CONTROL SUBSYSTEM
|
||||||
M: Linus Walleij <linus.walleij@linaro.org>
|
M: Linus Walleij <linus.walleij@linaro.org>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/pinmux/
|
F: drivers/pinctrl/
|
||||||
|
|
||||||
PKTCDVD DRIVER
|
PKTCDVD DRIVER
|
||||||
M: Peter Osterlund <petero2@telia.com>
|
M: Peter Osterlund <petero2@telia.com>
|
||||||
|
|
@ -5317,35 +5316,27 @@ F: drivers/media/video/pvrusb2/
|
||||||
PXA2xx/PXA3xx SUPPORT
|
PXA2xx/PXA3xx SUPPORT
|
||||||
M: Eric Miao <eric.y.miao@gmail.com>
|
M: Eric Miao <eric.y.miao@gmail.com>
|
||||||
M: Russell King <linux@arm.linux.org.uk>
|
M: Russell King <linux@arm.linux.org.uk>
|
||||||
|
M: Haojian Zhuang <haojian.zhuang@marvell.com>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
|
T: git git://github.com/hzhuang1/linux.git
|
||||||
|
T: git git://git.linaro.org/people/ycmiao/pxa-linux.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-pxa/
|
F: arch/arm/mach-pxa/
|
||||||
F: drivers/pcmcia/pxa2xx*
|
F: drivers/pcmcia/pxa2xx*
|
||||||
F: drivers/spi/pxa2xx*
|
F: drivers/spi/spi-pxa2xx*
|
||||||
F: drivers/usb/gadget/pxa2*
|
F: drivers/usb/gadget/pxa2*
|
||||||
F: include/sound/pxa2xx-lib.h
|
F: include/sound/pxa2xx-lib.h
|
||||||
F: sound/arm/pxa*
|
F: sound/arm/pxa*
|
||||||
F: sound/soc/pxa
|
F: sound/soc/pxa
|
||||||
|
|
||||||
PXA168 SUPPORT
|
MMP SUPPORT
|
||||||
M: Eric Miao <eric.y.miao@gmail.com>
|
M: Eric Miao <eric.y.miao@gmail.com>
|
||||||
M: Jason Chagas <jason.chagas@marvell.com>
|
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
|
|
||||||
S: Maintained
|
|
||||||
|
|
||||||
PXA910 SUPPORT
|
|
||||||
M: Eric Miao <eric.y.miao@gmail.com>
|
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
|
|
||||||
S: Maintained
|
|
||||||
|
|
||||||
MMP2 SUPPORT (aka ARMADA610)
|
|
||||||
M: Haojian Zhuang <haojian.zhuang@marvell.com>
|
M: Haojian Zhuang <haojian.zhuang@marvell.com>
|
||||||
M: Eric Miao <eric.y.miao@gmail.com>
|
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
|
T: git git://github.com/hzhuang1/linux.git
|
||||||
|
T: git git://git.linaro.org/people/ycmiao/pxa-linux.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
F: arch/arm/mach-mmp/
|
||||||
|
|
||||||
PXA MMCI DRIVER
|
PXA MMCI DRIVER
|
||||||
S: Orphan
|
S: Orphan
|
||||||
|
|
@ -5555,11 +5546,6 @@ M: Maxim Levitsky <maximlevitsky@gmail.com>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/memstick/host/r592.*
|
F: drivers/memstick/host/r592.*
|
||||||
|
|
||||||
RISCOM8 DRIVER
|
|
||||||
S: Orphan
|
|
||||||
F: Documentation/serial/riscom8.txt
|
|
||||||
F: drivers/staging/tty/riscom8*
|
|
||||||
|
|
||||||
ROCKETPORT DRIVER
|
ROCKETPORT DRIVER
|
||||||
P: Comtrol Corp.
|
P: Comtrol Corp.
|
||||||
W: http://www.comtrol.com
|
W: http://www.comtrol.com
|
||||||
|
|
@ -5819,13 +5805,14 @@ L: linux-mmc@vger.kernel.org
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/mmc/host/sdhci.*
|
F: drivers/mmc/host/sdhci.*
|
||||||
|
F: drivers/mmc/host/sdhci-pltfm.[ch]
|
||||||
|
|
||||||
SECURE DIGITAL HOST CONTROLLER INTERFACE, OPEN FIRMWARE BINDINGS (SDHCI-OF)
|
SECURE DIGITAL HOST CONTROLLER INTERFACE, OPEN FIRMWARE BINDINGS (SDHCI-OF)
|
||||||
M: Anton Vorontsov <avorontsov@ru.mvista.com>
|
M: Anton Vorontsov <avorontsov@ru.mvista.com>
|
||||||
L: linuxppc-dev@lists.ozlabs.org
|
L: linuxppc-dev@lists.ozlabs.org
|
||||||
L: linux-mmc@vger.kernel.org
|
L: linux-mmc@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/mmc/host/sdhci-of.*
|
F: drivers/mmc/host/sdhci-pltfm.[ch]
|
||||||
|
|
||||||
SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) SAMSUNG DRIVER
|
SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) SAMSUNG DRIVER
|
||||||
M: Ben Dooks <ben-linux@fluff.org>
|
M: Ben Dooks <ben-linux@fluff.org>
|
||||||
|
|
@ -6204,9 +6191,7 @@ M: Viresh Kumar <viresh.kumar@st.com>
|
||||||
W: http://www.st.com/spear
|
W: http://www.st.com/spear
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-spear*/clock.c
|
F: arch/arm/mach-spear*/clock.c
|
||||||
F: arch/arm/mach-spear*/include/mach/clkdev.h
|
|
||||||
F: arch/arm/plat-spear/clock.c
|
F: arch/arm/plat-spear/clock.c
|
||||||
F: arch/arm/plat-spear/include/plat/clkdev.h
|
|
||||||
F: arch/arm/plat-spear/include/plat/clock.h
|
F: arch/arm/plat-spear/include/plat/clock.h
|
||||||
|
|
||||||
SPEAR PAD MULTIPLEXING SUPPORT
|
SPEAR PAD MULTIPLEXING SUPPORT
|
||||||
|
|
@ -6222,11 +6207,6 @@ F: arch/arm/mach-spear3xx/spear3*0_evb.c
|
||||||
F: arch/arm/mach-spear6xx/spear600.c
|
F: arch/arm/mach-spear6xx/spear600.c
|
||||||
F: arch/arm/mach-spear6xx/spear600_evb.c
|
F: arch/arm/mach-spear6xx/spear600_evb.c
|
||||||
|
|
||||||
SPECIALIX IO8+ MULTIPORT SERIAL CARD DRIVER
|
|
||||||
S: Orphan
|
|
||||||
F: Documentation/serial/specialix.txt
|
|
||||||
F: drivers/staging/tty/specialix*
|
|
||||||
|
|
||||||
SPI SUBSYSTEM
|
SPI SUBSYSTEM
|
||||||
M: Grant Likely <grant.likely@secretlab.ca>
|
M: Grant Likely <grant.likely@secretlab.ca>
|
||||||
L: spi-devel-general@lists.sourceforge.net
|
L: spi-devel-general@lists.sourceforge.net
|
||||||
|
|
@ -6304,11 +6284,6 @@ M: Manu Abraham <abraham.manu@gmail.com>
|
||||||
S: Odd Fixes
|
S: Odd Fixes
|
||||||
F: drivers/staging/crystalhd/
|
F: drivers/staging/crystalhd/
|
||||||
|
|
||||||
STAGING - CYPRESS WESTBRIDGE SUPPORT
|
|
||||||
M: David Cross <david.cross@cypress.com>
|
|
||||||
S: Odd Fixes
|
|
||||||
F: drivers/staging/westbridge/
|
|
||||||
|
|
||||||
STAGING - ECHO CANCELLER
|
STAGING - ECHO CANCELLER
|
||||||
M: Steve Underwood <steveu@coppice.org>
|
M: Steve Underwood <steveu@coppice.org>
|
||||||
M: David Rowe <david@rowetel.com>
|
M: David Rowe <david@rowetel.com>
|
||||||
|
|
@ -6340,7 +6315,7 @@ STAGING - LIRC (LINUX INFRARED REMOTE CONTROL) DRIVERS
|
||||||
M: Jarod Wilson <jarod@wilsonet.com>
|
M: Jarod Wilson <jarod@wilsonet.com>
|
||||||
W: http://www.lirc.org/
|
W: http://www.lirc.org/
|
||||||
S: Odd Fixes
|
S: Odd Fixes
|
||||||
F: drivers/staging/lirc/
|
F: drivers/staging/media/lirc/
|
||||||
|
|
||||||
STAGING - NVIDIA COMPLIANT EMBEDDED CONTROLLER INTERFACE (nvec)
|
STAGING - NVIDIA COMPLIANT EMBEDDED CONTROLLER INTERFACE (nvec)
|
||||||
M: Julian Andres Klode <jak@jak-linux.org>
|
M: Julian Andres Klode <jak@jak-linux.org>
|
||||||
|
|
@ -6376,7 +6351,7 @@ F: drivers/staging/sm7xx/
|
||||||
STAGING - SOFTLOGIC 6x10 MPEG CODEC
|
STAGING - SOFTLOGIC 6x10 MPEG CODEC
|
||||||
M: Ben Collins <bcollins@bluecherry.net>
|
M: Ben Collins <bcollins@bluecherry.net>
|
||||||
S: Odd Fixes
|
S: Odd Fixes
|
||||||
F: drivers/staging/solo6x10/
|
F: drivers/staging/media/solo6x10/
|
||||||
|
|
||||||
STAGING - SPEAKUP CONSOLE SPEECH DRIVER
|
STAGING - SPEAKUP CONSOLE SPEECH DRIVER
|
||||||
M: William Hubbs <w.d.hubbs@gmail.com>
|
M: William Hubbs <w.d.hubbs@gmail.com>
|
||||||
|
|
@ -6414,7 +6389,7 @@ S: Odd Fixes
|
||||||
F: drivers/staging/winbond/
|
F: drivers/staging/winbond/
|
||||||
|
|
||||||
STAGING - XGI Z7,Z9,Z11 PCI DISPLAY DRIVER
|
STAGING - XGI Z7,Z9,Z11 PCI DISPLAY DRIVER
|
||||||
M: Arnaud Patard <apatard@mandriva.com>
|
M: Arnaud Patard <arnaud.patard@rtp-net.org>
|
||||||
S: Odd Fixes
|
S: Odd Fixes
|
||||||
F: drivers/staging/xgifb/
|
F: drivers/staging/xgifb/
|
||||||
|
|
||||||
|
|
@ -6679,7 +6654,7 @@ TULIP NETWORK DRIVERS
|
||||||
M: Grant Grundler <grundler@parisc-linux.org>
|
M: Grant Grundler <grundler@parisc-linux.org>
|
||||||
L: netdev@vger.kernel.org
|
L: netdev@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/net/ethernet/tulip/
|
F: drivers/net/ethernet/dec/tulip/
|
||||||
|
|
||||||
TUN/TAP driver
|
TUN/TAP driver
|
||||||
M: Maxim Krasnyansky <maxk@qualcomm.com>
|
M: Maxim Krasnyansky <maxk@qualcomm.com>
|
||||||
|
|
|
||||||
|
|
@ -70,10 +70,6 @@ config GENERIC_ISA_DMA
|
||||||
bool
|
bool
|
||||||
default y
|
default y
|
||||||
|
|
||||||
config GENERIC_IOMAP
|
|
||||||
bool
|
|
||||||
default n
|
|
||||||
|
|
||||||
source "init/Kconfig"
|
source "init/Kconfig"
|
||||||
source "kernel/Kconfig.freezer"
|
source "kernel/Kconfig.freezer"
|
||||||
|
|
||||||
|
|
@ -319,6 +315,7 @@ config ISA_DMA_API
|
||||||
config PCI
|
config PCI
|
||||||
bool
|
bool
|
||||||
depends on !ALPHA_JENSEN
|
depends on !ALPHA_JENSEN
|
||||||
|
select GENERIC_PCI_IOMAP
|
||||||
default y
|
default y
|
||||||
help
|
help
|
||||||
Find out whether you have a PCI motherboard. PCI is the name of a
|
Find out whether you have a PCI motherboard. PCI is the name of a
|
||||||
|
|
|
||||||
|
|
@ -185,15 +185,3 @@ struct dma_map_ops alpha_noop_ops = {
|
||||||
|
|
||||||
struct dma_map_ops *dma_ops = &alpha_noop_ops;
|
struct dma_map_ops *dma_ops = &alpha_noop_ops;
|
||||||
EXPORT_SYMBOL(dma_ops);
|
EXPORT_SYMBOL(dma_ops);
|
||||||
|
|
||||||
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
|
|
||||||
{
|
|
||||||
return NULL;
|
|
||||||
}
|
|
||||||
|
|
||||||
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
|
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
EXPORT_SYMBOL(pci_iomap);
|
|
||||||
EXPORT_SYMBOL(pci_iounmap);
|
|
||||||
|
|
|
||||||
|
|
@ -508,30 +508,7 @@ sys_pciconfig_iobase(long which, unsigned long bus, unsigned long dfn)
|
||||||
return -EOPNOTSUPP;
|
return -EOPNOTSUPP;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Create an __iomem token from a PCI BAR. Copied from lib/iomap.c with
|
/* Destroy an __iomem token. Not copied from lib/iomap.c. */
|
||||||
no changes, since we don't want the other things in that object file. */
|
|
||||||
|
|
||||||
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
|
|
||||||
{
|
|
||||||
resource_size_t start = pci_resource_start(dev, bar);
|
|
||||||
resource_size_t len = pci_resource_len(dev, bar);
|
|
||||||
unsigned long flags = pci_resource_flags(dev, bar);
|
|
||||||
|
|
||||||
if (!len || !start)
|
|
||||||
return NULL;
|
|
||||||
if (maxlen && len > maxlen)
|
|
||||||
len = maxlen;
|
|
||||||
if (flags & IORESOURCE_IO)
|
|
||||||
return ioport_map(start, len);
|
|
||||||
if (flags & IORESOURCE_MEM) {
|
|
||||||
/* Not checking IORESOURCE_CACHEABLE because alpha does
|
|
||||||
not distinguish between ioremap and ioremap_nocache. */
|
|
||||||
return ioremap(start, len);
|
|
||||||
}
|
|
||||||
return NULL;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Destroy that token. Not copied from lib/iomap.c. */
|
|
||||||
|
|
||||||
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
|
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
|
||||||
{
|
{
|
||||||
|
|
@ -539,7 +516,6 @@ void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
|
||||||
iounmap(addr);
|
iounmap(addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
EXPORT_SYMBOL(pci_iomap);
|
|
||||||
EXPORT_SYMBOL(pci_iounmap);
|
EXPORT_SYMBOL(pci_iounmap);
|
||||||
|
|
||||||
/* FIXME: Some boxes have multiple ISA bridges! */
|
/* FIXME: Some boxes have multiple ISA bridges! */
|
||||||
|
|
|
||||||
|
|
@ -16,6 +16,7 @@ config ARM
|
||||||
select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
|
select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
|
||||||
select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
|
select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
|
||||||
select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
|
select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
|
||||||
|
select ARCH_BINFMT_ELF_RANDOMIZE_PIE
|
||||||
select HAVE_GENERIC_DMA_COHERENT
|
select HAVE_GENERIC_DMA_COHERENT
|
||||||
select HAVE_KERNEL_GZIP
|
select HAVE_KERNEL_GZIP
|
||||||
select HAVE_KERNEL_LZO
|
select HAVE_KERNEL_LZO
|
||||||
|
|
@ -30,6 +31,7 @@ config ARM
|
||||||
select HAVE_SPARSE_IRQ
|
select HAVE_SPARSE_IRQ
|
||||||
select GENERIC_IRQ_SHOW
|
select GENERIC_IRQ_SHOW
|
||||||
select CPU_PM if (SUSPEND || CPU_IDLE)
|
select CPU_PM if (SUSPEND || CPU_IDLE)
|
||||||
|
select GENERIC_PCI_IOMAP
|
||||||
help
|
help
|
||||||
The ARM series is a line of low-power-consumption RISC chip designs
|
The ARM series is a line of low-power-consumption RISC chip designs
|
||||||
licensed by ARM Ltd and targeted at embedded applications and
|
licensed by ARM Ltd and targeted at embedded applications and
|
||||||
|
|
@ -447,6 +449,7 @@ config ARCH_MXS
|
||||||
select ARCH_REQUIRE_GPIOLIB
|
select ARCH_REQUIRE_GPIOLIB
|
||||||
select CLKDEV_LOOKUP
|
select CLKDEV_LOOKUP
|
||||||
select CLKSRC_MMIO
|
select CLKSRC_MMIO
|
||||||
|
select HAVE_CLK_PREPARE
|
||||||
help
|
help
|
||||||
Support for Freescale MXS-based family of processors
|
Support for Freescale MXS-based family of processors
|
||||||
|
|
||||||
|
|
@ -597,6 +600,7 @@ config ARCH_MMP
|
||||||
select ARCH_REQUIRE_GPIOLIB
|
select ARCH_REQUIRE_GPIOLIB
|
||||||
select CLKDEV_LOOKUP
|
select CLKDEV_LOOKUP
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
|
select GPIO_PXA
|
||||||
select HAVE_SCHED_CLOCK
|
select HAVE_SCHED_CLOCK
|
||||||
select TICK_ONESHOT
|
select TICK_ONESHOT
|
||||||
select PLAT_PXA
|
select PLAT_PXA
|
||||||
|
|
@ -658,6 +662,7 @@ config ARCH_PICOXCELL
|
||||||
select HAVE_SCHED_CLOCK
|
select HAVE_SCHED_CLOCK
|
||||||
select HAVE_TCM
|
select HAVE_TCM
|
||||||
select NO_IOPORT
|
select NO_IOPORT
|
||||||
|
select SPARSE_IRQ
|
||||||
select USE_OF
|
select USE_OF
|
||||||
help
|
help
|
||||||
This enables support for systems based on the Picochip picoXcell
|
This enables support for systems based on the Picochip picoXcell
|
||||||
|
|
@ -681,6 +686,7 @@ config ARCH_PXA
|
||||||
select CLKSRC_MMIO
|
select CLKSRC_MMIO
|
||||||
select ARCH_REQUIRE_GPIOLIB
|
select ARCH_REQUIRE_GPIOLIB
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
|
select GPIO_PXA
|
||||||
select HAVE_SCHED_CLOCK
|
select HAVE_SCHED_CLOCK
|
||||||
select TICK_ONESHOT
|
select TICK_ONESHOT
|
||||||
select PLAT_PXA
|
select PLAT_PXA
|
||||||
|
|
@ -748,7 +754,7 @@ config ARCH_SA1100
|
||||||
select ARCH_HAS_CPUFREQ
|
select ARCH_HAS_CPUFREQ
|
||||||
select CPU_FREQ
|
select CPU_FREQ
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
select HAVE_CLK
|
select CLKDEV_LOOKUP
|
||||||
select HAVE_SCHED_CLOCK
|
select HAVE_SCHED_CLOCK
|
||||||
select TICK_ONESHOT
|
select TICK_ONESHOT
|
||||||
select ARCH_REQUIRE_GPIOLIB
|
select ARCH_REQUIRE_GPIOLIB
|
||||||
|
|
@ -892,7 +898,6 @@ config ARCH_U300
|
||||||
select HAVE_MACH_CLKDEV
|
select HAVE_MACH_CLKDEV
|
||||||
select GENERIC_GPIO
|
select GENERIC_GPIO
|
||||||
select ARCH_REQUIRE_GPIOLIB
|
select ARCH_REQUIRE_GPIOLIB
|
||||||
select NEED_MACH_MEMORY_H
|
|
||||||
help
|
help
|
||||||
Support for ST-Ericsson U300 series mobile platforms.
|
Support for ST-Ericsson U300 series mobile platforms.
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -100,6 +100,14 @@ choice
|
||||||
Note that the system will appear to hang during boot if there
|
Note that the system will appear to hang during boot if there
|
||||||
is nothing connected to read from the DCC.
|
is nothing connected to read from the DCC.
|
||||||
|
|
||||||
|
config AT91_DEBUG_LL_DBGU0
|
||||||
|
bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
|
||||||
|
depends on HAVE_AT91_DBGU0
|
||||||
|
|
||||||
|
config AT91_DEBUG_LL_DBGU1
|
||||||
|
bool "Kernel low-level debugging on 9263, 9g45 and cap9"
|
||||||
|
depends on HAVE_AT91_DBGU1
|
||||||
|
|
||||||
config DEBUG_FOOTBRIDGE_COM1
|
config DEBUG_FOOTBRIDGE_COM1
|
||||||
bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
|
bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
|
||||||
depends on FOOTBRIDGE
|
depends on FOOTBRIDGE
|
||||||
|
|
@ -247,6 +255,43 @@ choice
|
||||||
their output to the standard serial port on the RealView
|
their output to the standard serial port on the RealView
|
||||||
PB1176 platform.
|
PB1176 platform.
|
||||||
|
|
||||||
|
config DEBUG_MSM_UART1
|
||||||
|
bool "Kernel low-level debugging messages via MSM UART1"
|
||||||
|
depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
|
||||||
|
help
|
||||||
|
Say Y here if you want the debug print routines to direct
|
||||||
|
their output to the first serial port on MSM devices.
|
||||||
|
|
||||||
|
config DEBUG_MSM_UART2
|
||||||
|
bool "Kernel low-level debugging messages via MSM UART2"
|
||||||
|
depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
|
||||||
|
help
|
||||||
|
Say Y here if you want the debug print routines to direct
|
||||||
|
their output to the second serial port on MSM devices.
|
||||||
|
|
||||||
|
config DEBUG_MSM_UART3
|
||||||
|
bool "Kernel low-level debugging messages via MSM UART3"
|
||||||
|
depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
|
||||||
|
help
|
||||||
|
Say Y here if you want the debug print routines to direct
|
||||||
|
their output to the third serial port on MSM devices.
|
||||||
|
|
||||||
|
config DEBUG_MSM8660_UART
|
||||||
|
bool "Kernel low-level debugging messages via MSM 8660 UART"
|
||||||
|
depends on ARCH_MSM8X60
|
||||||
|
select MSM_HAS_DEBUG_UART_HS
|
||||||
|
help
|
||||||
|
Say Y here if you want the debug print routines to direct
|
||||||
|
their output to the serial port on MSM 8660 devices.
|
||||||
|
|
||||||
|
config DEBUG_MSM8960_UART
|
||||||
|
bool "Kernel low-level debugging messages via MSM 8960 UART"
|
||||||
|
depends on ARCH_MSM8960
|
||||||
|
select MSM_HAS_DEBUG_UART_HS
|
||||||
|
help
|
||||||
|
Say Y here if you want the debug print routines to direct
|
||||||
|
their output to the serial port on MSM 8960 devices.
|
||||||
|
|
||||||
endchoice
|
endchoice
|
||||||
|
|
||||||
config EARLY_PRINTK
|
config EARLY_PRINTK
|
||||||
|
|
|
||||||
|
|
@ -114,6 +114,13 @@ usart5: serial@fffd8000 {
|
||||||
atmel,use-dma-tx;
|
atmel,use-dma-tx;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
macb0: ethernet@fffc4000 {
|
||||||
|
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||||
|
reg = <0xfffc4000 0x100>;
|
||||||
|
interrupts = <21>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -101,6 +101,13 @@ usart3: serial@fff98000 {
|
||||||
atmel,use-dma-tx;
|
atmel,use-dma-tx;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
macb0: ethernet@fffbc000 {
|
||||||
|
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||||
|
reg = <0xfffbc000 0x100>;
|
||||||
|
interrupts = <25>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -30,6 +30,11 @@ dbgu: serial@ffffee00 {
|
||||||
usart1: serial@fff90000 {
|
usart1: serial@fff90000 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
macb0: ethernet@fffbc000 {
|
||||||
|
phy-mode = "rmii";
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,137 @@
|
||||||
|
/*
|
||||||
|
* Samsung's Exynos4210 based Origen board device tree source
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
||||||
|
* http://www.samsung.com
|
||||||
|
* Copyright (c) 2010-2011 Linaro Ltd.
|
||||||
|
* www.linaro.org
|
||||||
|
*
|
||||||
|
* Device tree source file for Insignal's Origen board which is based on
|
||||||
|
* Samsung's Exynos4210 SoC.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License version 2 as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/include/ "exynos4210.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Insignal Origen evaluation board based on Exynos4210";
|
||||||
|
compatible = "insignal,origen", "samsung,exynos4210";
|
||||||
|
|
||||||
|
memory {
|
||||||
|
reg = <0x40000000 0x40000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12530000 {
|
||||||
|
samsung,sdhci-bus-width = <4>;
|
||||||
|
linux,mmc_cap_4_bit_data;
|
||||||
|
samsung,sdhci-cd-internal;
|
||||||
|
gpio-cd = <&gpk2 2 2 3 3>;
|
||||||
|
gpios = <&gpk2 0 2 0 3>,
|
||||||
|
<&gpk2 1 2 0 3>,
|
||||||
|
<&gpk2 3 2 3 3>,
|
||||||
|
<&gpk2 4 2 3 3>,
|
||||||
|
<&gpk2 5 2 3 3>,
|
||||||
|
<&gpk2 6 2 3 3>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12510000 {
|
||||||
|
samsung,sdhci-bus-width = <4>;
|
||||||
|
linux,mmc_cap_4_bit_data;
|
||||||
|
samsung,sdhci-cd-internal;
|
||||||
|
gpio-cd = <&gpk0 2 2 3 3>;
|
||||||
|
gpios = <&gpk0 0 2 0 3>,
|
||||||
|
<&gpk0 1 2 0 3>,
|
||||||
|
<&gpk0 3 2 3 3>,
|
||||||
|
<&gpk0 4 2 3 3>,
|
||||||
|
<&gpk0 5 2 3 3>,
|
||||||
|
<&gpk0 6 2 3 3>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpio_keys {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
up {
|
||||||
|
label = "Up";
|
||||||
|
gpios = <&gpx2 0 0 0 2>;
|
||||||
|
linux,code = <103>;
|
||||||
|
};
|
||||||
|
|
||||||
|
down {
|
||||||
|
label = "Down";
|
||||||
|
gpios = <&gpx2 1 0 0 2>;
|
||||||
|
linux,code = <108>;
|
||||||
|
};
|
||||||
|
|
||||||
|
back {
|
||||||
|
label = "Back";
|
||||||
|
gpios = <&gpx1 7 0 0 2>;
|
||||||
|
linux,code = <158>;
|
||||||
|
};
|
||||||
|
|
||||||
|
home {
|
||||||
|
label = "Home";
|
||||||
|
gpios = <&gpx1 6 0 0 2>;
|
||||||
|
linux,code = <102>;
|
||||||
|
};
|
||||||
|
|
||||||
|
menu {
|
||||||
|
label = "Menu";
|
||||||
|
gpios = <&gpx1 5 0 0 2>;
|
||||||
|
linux,code = <139>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
keypad@100A0000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12520000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12540000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13860000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13870000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13880000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13890000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138A0000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138B0000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138C0000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138D0000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,182 @@
|
||||||
|
/*
|
||||||
|
* Samsung's Exynos4210 based SMDKV310 board device tree source
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
||||||
|
* http://www.samsung.com
|
||||||
|
* Copyright (c) 2010-2011 Linaro Ltd.
|
||||||
|
* www.linaro.org
|
||||||
|
*
|
||||||
|
* Device tree source file for Samsung's SMDKV310 board which is based on
|
||||||
|
* Samsung's Exynos4210 SoC.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License version 2 as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/include/ "exynos4210.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Samsung smdkv310 evaluation board based on Exynos4210";
|
||||||
|
compatible = "samsung,smdkv310", "samsung,exynos4210";
|
||||||
|
|
||||||
|
memory {
|
||||||
|
reg = <0x40000000 0x80000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12530000 {
|
||||||
|
samsung,sdhci-bus-width = <4>;
|
||||||
|
linux,mmc_cap_4_bit_data;
|
||||||
|
samsung,sdhci-cd-internal;
|
||||||
|
gpio-cd = <&gpk2 2 2 3 3>;
|
||||||
|
gpios = <&gpk2 0 2 0 3>,
|
||||||
|
<&gpk2 1 2 0 3>,
|
||||||
|
<&gpk2 3 2 3 3>,
|
||||||
|
<&gpk2 4 2 3 3>,
|
||||||
|
<&gpk2 5 2 3 3>,
|
||||||
|
<&gpk2 6 2 3 3>;
|
||||||
|
};
|
||||||
|
|
||||||
|
keypad@100A0000 {
|
||||||
|
samsung,keypad-num-rows = <2>;
|
||||||
|
samsung,keypad-num-columns = <8>;
|
||||||
|
linux,keypad-no-autorepeat;
|
||||||
|
linux,keypad-wakeup;
|
||||||
|
|
||||||
|
row-gpios = <&gpx2 0 3 3 0>,
|
||||||
|
<&gpx2 1 3 3 0>;
|
||||||
|
|
||||||
|
col-gpios = <&gpx1 0 3 0 0>,
|
||||||
|
<&gpx1 1 3 0 0>,
|
||||||
|
<&gpx1 2 3 0 0>,
|
||||||
|
<&gpx1 3 3 0 0>,
|
||||||
|
<&gpx1 4 3 0 0>,
|
||||||
|
<&gpx1 5 3 0 0>,
|
||||||
|
<&gpx1 6 3 0 0>,
|
||||||
|
<&gpx1 7 3 0 0>;
|
||||||
|
|
||||||
|
key_1 {
|
||||||
|
keypad,row = <0>;
|
||||||
|
keypad,column = <3>;
|
||||||
|
linux,code = <2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_2 {
|
||||||
|
keypad,row = <0>;
|
||||||
|
keypad,column = <4>;
|
||||||
|
linux,code = <3>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_3 {
|
||||||
|
keypad,row = <0>;
|
||||||
|
keypad,column = <5>;
|
||||||
|
linux,code = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_4 {
|
||||||
|
keypad,row = <0>;
|
||||||
|
keypad,column = <6>;
|
||||||
|
linux,code = <5>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_5 {
|
||||||
|
keypad,row = <0>;
|
||||||
|
keypad,column = <7>;
|
||||||
|
linux,code = <6>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_a {
|
||||||
|
keypad,row = <1>;
|
||||||
|
keypad,column = <3>;
|
||||||
|
linux,code = <30>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_b {
|
||||||
|
keypad,row = <1>;
|
||||||
|
keypad,column = <4>;
|
||||||
|
linux,code = <48>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_c {
|
||||||
|
keypad,row = <1>;
|
||||||
|
keypad,column = <5>;
|
||||||
|
linux,code = <46>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_d {
|
||||||
|
keypad,row = <1>;
|
||||||
|
keypad,column = <6>;
|
||||||
|
linux,code = <32>;
|
||||||
|
};
|
||||||
|
|
||||||
|
key_e {
|
||||||
|
keypad,row = <1>;
|
||||||
|
keypad,column = <7>;
|
||||||
|
linux,code = <18>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13860000 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
samsung,i2c-sda-delay = <100>;
|
||||||
|
samsung,i2c-max-bus-freq = <20000>;
|
||||||
|
gpios = <&gpd1 0 2 3 0>,
|
||||||
|
<&gpd1 1 2 3 0>;
|
||||||
|
|
||||||
|
eeprom@50 {
|
||||||
|
compatible = "samsung,24ad0xd1";
|
||||||
|
reg = <0x50>;
|
||||||
|
};
|
||||||
|
|
||||||
|
eeprom@52 {
|
||||||
|
compatible = "samsung,24ad0xd1";
|
||||||
|
reg = <0x52>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12510000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12520000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12540000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13870000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13880000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13890000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138A0000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138B0000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138C0000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138D0000 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,397 @@
|
||||||
|
/*
|
||||||
|
* Samsung's Exynos4210 SoC device tree source
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
||||||
|
* http://www.samsung.com
|
||||||
|
* Copyright (c) 2010-2011 Linaro Ltd.
|
||||||
|
* www.linaro.org
|
||||||
|
*
|
||||||
|
* Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
|
||||||
|
* based board files can include this file and provide values for board specfic
|
||||||
|
* bindings.
|
||||||
|
*
|
||||||
|
* Note: This file does not include device nodes for all the controllers in
|
||||||
|
* Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
|
||||||
|
* nodes can be added to this file.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License version 2 as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/include/ "skeleton.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
compatible = "samsung,exynos4210";
|
||||||
|
interrupt-parent = <&gic>;
|
||||||
|
|
||||||
|
gic:interrupt-controller@10490000 {
|
||||||
|
compatible = "arm,cortex-a9-gic";
|
||||||
|
#interrupt-cells = <3>;
|
||||||
|
interrupt-controller;
|
||||||
|
reg = <0x10490000 0x1000>, <0x10480000 0x100>;
|
||||||
|
};
|
||||||
|
|
||||||
|
watchdog@10060000 {
|
||||||
|
compatible = "samsung,s3c2410-wdt";
|
||||||
|
reg = <0x10060000 0x100>;
|
||||||
|
interrupts = <0 43 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
rtc@10070000 {
|
||||||
|
compatible = "samsung,s3c6410-rtc";
|
||||||
|
reg = <0x10070000 0x100>;
|
||||||
|
interrupts = <0 44 0>, <0 45 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
keypad@100A0000 {
|
||||||
|
compatible = "samsung,s5pv210-keypad";
|
||||||
|
reg = <0x100A0000 0x100>;
|
||||||
|
interrupts = <0 109 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12510000 {
|
||||||
|
compatible = "samsung,exynos4210-sdhci";
|
||||||
|
reg = <0x12510000 0x100>;
|
||||||
|
interrupts = <0 73 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12520000 {
|
||||||
|
compatible = "samsung,exynos4210-sdhci";
|
||||||
|
reg = <0x12520000 0x100>;
|
||||||
|
interrupts = <0 74 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12530000 {
|
||||||
|
compatible = "samsung,exynos4210-sdhci";
|
||||||
|
reg = <0x12530000 0x100>;
|
||||||
|
interrupts = <0 75 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@12540000 {
|
||||||
|
compatible = "samsung,exynos4210-sdhci";
|
||||||
|
reg = <0x12540000 0x100>;
|
||||||
|
interrupts = <0 76 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@13800000 {
|
||||||
|
compatible = "samsung,exynos4210-uart";
|
||||||
|
reg = <0x13800000 0x100>;
|
||||||
|
interrupts = <0 52 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@13810000 {
|
||||||
|
compatible = "samsung,exynos4210-uart";
|
||||||
|
reg = <0x13810000 0x100>;
|
||||||
|
interrupts = <0 53 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@13820000 {
|
||||||
|
compatible = "samsung,exynos4210-uart";
|
||||||
|
reg = <0x13820000 0x100>;
|
||||||
|
interrupts = <0 54 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@13830000 {
|
||||||
|
compatible = "samsung,exynos4210-uart";
|
||||||
|
reg = <0x13830000 0x100>;
|
||||||
|
interrupts = <0 55 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13860000 {
|
||||||
|
compatible = "samsung,s3c2440-i2c";
|
||||||
|
reg = <0x13860000 0x100>;
|
||||||
|
interrupts = <0 58 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13870000 {
|
||||||
|
compatible = "samsung,s3c2440-i2c";
|
||||||
|
reg = <0x13870000 0x100>;
|
||||||
|
interrupts = <0 59 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13880000 {
|
||||||
|
compatible = "samsung,s3c2440-i2c";
|
||||||
|
reg = <0x13880000 0x100>;
|
||||||
|
interrupts = <0 60 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@13890000 {
|
||||||
|
compatible = "samsung,s3c2440-i2c";
|
||||||
|
reg = <0x13890000 0x100>;
|
||||||
|
interrupts = <0 61 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138A0000 {
|
||||||
|
compatible = "samsung,s3c2440-i2c";
|
||||||
|
reg = <0x138A0000 0x100>;
|
||||||
|
interrupts = <0 62 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138B0000 {
|
||||||
|
compatible = "samsung,s3c2440-i2c";
|
||||||
|
reg = <0x138B0000 0x100>;
|
||||||
|
interrupts = <0 63 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138C0000 {
|
||||||
|
compatible = "samsung,s3c2440-i2c";
|
||||||
|
reg = <0x138C0000 0x100>;
|
||||||
|
interrupts = <0 64 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@138D0000 {
|
||||||
|
compatible = "samsung,s3c2440-i2c";
|
||||||
|
reg = <0x138D0000 0x100>;
|
||||||
|
interrupts = <0 65 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
amba {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
compatible = "arm,amba-bus";
|
||||||
|
interrupt-parent = <&gic>;
|
||||||
|
ranges;
|
||||||
|
|
||||||
|
pdma0: pdma@12680000 {
|
||||||
|
compatible = "arm,pl330", "arm,primecell";
|
||||||
|
reg = <0x12680000 0x1000>;
|
||||||
|
interrupts = <0 35 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pdma1: pdma@12690000 {
|
||||||
|
compatible = "arm,pl330", "arm,primecell";
|
||||||
|
reg = <0x12690000 0x1000>;
|
||||||
|
interrupts = <0 36 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
gpio-controllers {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
gpio-controller;
|
||||||
|
ranges;
|
||||||
|
|
||||||
|
gpa0: gpio-controller@11400000 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400000 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpa1: gpio-controller@11400020 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400020 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpb: gpio-controller@11400040 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400040 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpc0: gpio-controller@11400060 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400060 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpc1: gpio-controller@11400080 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400080 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpd0: gpio-controller@114000A0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x114000A0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpd1: gpio-controller@114000C0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x114000C0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpe0: gpio-controller@114000E0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x114000E0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpe1: gpio-controller@11400100 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400100 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpe2: gpio-controller@11400120 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400120 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpe3: gpio-controller@11400140 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400140 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpe4: gpio-controller@11400160 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400160 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpf0: gpio-controller@11400180 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11400180 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpf1: gpio-controller@114001A0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x114001A0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpf2: gpio-controller@114001C0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x114001C0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpf3: gpio-controller@114001E0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x114001E0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpj0: gpio-controller@11000000 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000000 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpj1: gpio-controller@11000020 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000020 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpk0: gpio-controller@11000040 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000040 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpk1: gpio-controller@11000060 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000060 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpk2: gpio-controller@11000080 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000080 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpk3: gpio-controller@110000A0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x110000A0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpl0: gpio-controller@110000C0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x110000C0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpl1: gpio-controller@110000E0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x110000E0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpl2: gpio-controller@11000100 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000100 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpy0: gpio-controller@11000120 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000120 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpy1: gpio-controller@11000140 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000140 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpy2: gpio-controller@11000160 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000160 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpy3: gpio-controller@11000180 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000180 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpy4: gpio-controller@110001A0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x110001A0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpy5: gpio-controller@110001C0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x110001C0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpy6: gpio-controller@110001E0 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x110001E0 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpx0: gpio-controller@11000C00 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000C00 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpx1: gpio-controller@11000C20 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000C20 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpx2: gpio-controller@11000C40 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000C40 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpx3: gpio-controller@11000C60 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x11000C60 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpz: gpio-controller@03860000 {
|
||||||
|
compatible = "samsung,exynos4-gpio";
|
||||||
|
reg = <0x03860000 0x20>;
|
||||||
|
#gpio-cells = <4>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -194,5 +194,17 @@ dma@fff3d000 {
|
||||||
reg = <0xfff3d000 0x1000>;
|
reg = <0xfff3d000 0x1000>;
|
||||||
interrupts = <0 92 4>;
|
interrupts = <0 92 4>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
ethernet@fff50000 {
|
||||||
|
compatible = "calxeda,hb-xgmac";
|
||||||
|
reg = <0xfff50000 0x1000>;
|
||||||
|
interrupts = <0 77 4 0 78 4 0 79 4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
ethernet@fff51000 {
|
||||||
|
compatible = "calxeda,hb-xgmac";
|
||||||
|
reg = <0xfff51000 0x1000>;
|
||||||
|
interrupts = <0 80 4 0 81 4 0 82 4>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -35,20 +35,19 @@ esdhc@70004000 { /* ESDHC1 */
|
||||||
};
|
};
|
||||||
|
|
||||||
esdhc@70008000 { /* ESDHC2 */
|
esdhc@70008000 { /* ESDHC2 */
|
||||||
cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */
|
cd-gpios = <&gpio1 6 0>;
|
||||||
wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */
|
wp-gpios = <&gpio1 5 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart2: uart@7000c000 { /* UART3 */
|
uart3: uart@7000c000 {
|
||||||
fsl,uart-has-rtscts;
|
fsl,uart-has-rtscts;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
ecspi@70010000 { /* ECSPI1 */
|
ecspi@70010000 { /* ECSPI1 */
|
||||||
fsl,spi-num-chipselects = <2>;
|
fsl,spi-num-chipselects = <2>;
|
||||||
cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */
|
cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
|
||||||
<&gpio3 25 0>; /* GPIO4_25 */
|
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
pmic: mc13892@0 {
|
pmic: mc13892@0 {
|
||||||
|
|
@ -57,7 +56,7 @@ pmic: mc13892@0 {
|
||||||
compatible = "fsl,mc13892";
|
compatible = "fsl,mc13892";
|
||||||
spi-max-frequency = <6000000>;
|
spi-max-frequency = <6000000>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */
|
mc13xxx-irq-gpios = <&gpio1 8 0>;
|
||||||
fsl,mc13xxx-uses-regulator;
|
fsl,mc13xxx-uses-regulator;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -91,12 +90,12 @@ iomuxc@73fa8000 {
|
||||||
reg = <0x73fa8000 0x4000>;
|
reg = <0x73fa8000 0x4000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0: uart@73fbc000 {
|
uart1: uart@73fbc000 {
|
||||||
fsl,uart-has-rtscts;
|
fsl,uart-has-rtscts;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1: uart@73fc0000 {
|
uart2: uart@73fc0000 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -127,7 +126,7 @@ gpio-keys {
|
||||||
|
|
||||||
power {
|
power {
|
||||||
label = "Power Button";
|
label = "Power Button";
|
||||||
gpios = <&gpio1 21 0>;
|
gpios = <&gpio2 21 0>;
|
||||||
linux,code = <116>; /* KEY_POWER */
|
linux,code = <116>; /* KEY_POWER */
|
||||||
gpio-key,wakeup;
|
gpio-key,wakeup;
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -14,9 +14,9 @@
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
aliases {
|
aliases {
|
||||||
serial0 = &uart0;
|
serial0 = &uart1;
|
||||||
serial1 = &uart1;
|
serial1 = &uart2;
|
||||||
serial2 = &uart2;
|
serial2 = &uart3;
|
||||||
};
|
};
|
||||||
|
|
||||||
tzic: tz-interrupt-controller@e0000000 {
|
tzic: tz-interrupt-controller@e0000000 {
|
||||||
|
|
@ -86,7 +86,7 @@ esdhc@70008000 { /* ESDHC2 */
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart2: uart@7000c000 { /* UART3 */
|
uart3: uart@7000c000 {
|
||||||
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
|
||||||
reg = <0x7000c000 0x4000>;
|
reg = <0x7000c000 0x4000>;
|
||||||
interrupts = <33>;
|
interrupts = <33>;
|
||||||
|
|
@ -117,7 +117,7 @@ esdhc@70024000 { /* ESDHC4 */
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio0: gpio@73f84000 { /* GPIO1 */
|
gpio1: gpio@73f84000 {
|
||||||
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x73f84000 0x4000>;
|
reg = <0x73f84000 0x4000>;
|
||||||
interrupts = <50 51>;
|
interrupts = <50 51>;
|
||||||
|
|
@ -127,7 +127,7 @@ gpio0: gpio@73f84000 { /* GPIO1 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio1: gpio@73f88000 { /* GPIO2 */
|
gpio2: gpio@73f88000 {
|
||||||
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x73f88000 0x4000>;
|
reg = <0x73f88000 0x4000>;
|
||||||
interrupts = <52 53>;
|
interrupts = <52 53>;
|
||||||
|
|
@ -137,7 +137,7 @@ gpio1: gpio@73f88000 { /* GPIO2 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio2: gpio@73f8c000 { /* GPIO3 */
|
gpio3: gpio@73f8c000 {
|
||||||
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x73f8c000 0x4000>;
|
reg = <0x73f8c000 0x4000>;
|
||||||
interrupts = <54 55>;
|
interrupts = <54 55>;
|
||||||
|
|
@ -147,7 +147,7 @@ gpio2: gpio@73f8c000 { /* GPIO3 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio3: gpio@73f90000 { /* GPIO4 */
|
gpio4: gpio@73f90000 {
|
||||||
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x73f90000 0x4000>;
|
reg = <0x73f90000 0x4000>;
|
||||||
interrupts = <56 57>;
|
interrupts = <56 57>;
|
||||||
|
|
@ -171,14 +171,14 @@ wdog@73f9c000 { /* WDOG2 */
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0: uart@73fbc000 {
|
uart1: uart@73fbc000 {
|
||||||
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
|
||||||
reg = <0x73fbc000 0x4000>;
|
reg = <0x73fbc000 0x4000>;
|
||||||
interrupts = <31>;
|
interrupts = <31>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1: uart@73fc0000 {
|
uart2: uart@73fc0000 {
|
||||||
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
|
||||||
reg = <0x73fc0000 0x4000>;
|
reg = <0x73fc0000 0x4000>;
|
||||||
interrupts = <32>;
|
interrupts = <32>;
|
||||||
|
|
|
||||||
|
|
@ -29,8 +29,8 @@ soc {
|
||||||
aips@50000000 { /* AIPS1 */
|
aips@50000000 { /* AIPS1 */
|
||||||
spba@50000000 {
|
spba@50000000 {
|
||||||
esdhc@50004000 { /* ESDHC1 */
|
esdhc@50004000 { /* ESDHC1 */
|
||||||
cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */
|
cd-gpios = <&gpio1 1 0>;
|
||||||
wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */
|
wp-gpios = <&gpio1 9 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -44,7 +44,7 @@ iomuxc@53fa8000 {
|
||||||
reg = <0x53fa8000 0x4000>;
|
reg = <0x53fa8000 0x4000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0: uart@53fbc000 { /* UART1 */
|
uart1: uart@53fbc000 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -67,7 +67,7 @@ lan9220@f4000000 {
|
||||||
compatible = "smsc,lan9220", "smsc,lan9115";
|
compatible = "smsc,lan9220", "smsc,lan9115";
|
||||||
reg = <0xf4000000 0x2000000>;
|
reg = <0xf4000000 0x2000000>;
|
||||||
phy-mode = "mii";
|
phy-mode = "mii";
|
||||||
interrupt-parent = <&gpio1>;
|
interrupt-parent = <&gpio2>;
|
||||||
interrupts = <31>;
|
interrupts = <31>;
|
||||||
reg-io-width = <4>;
|
reg-io-width = <4>;
|
||||||
smsc,irq-push-pull;
|
smsc,irq-push-pull;
|
||||||
|
|
@ -79,34 +79,34 @@ gpio-keys {
|
||||||
|
|
||||||
home {
|
home {
|
||||||
label = "Home";
|
label = "Home";
|
||||||
gpios = <&gpio4 10 0>; /* GPIO5_10 */
|
gpios = <&gpio5 10 0>;
|
||||||
linux,code = <102>; /* KEY_HOME */
|
linux,code = <102>; /* KEY_HOME */
|
||||||
gpio-key,wakeup;
|
gpio-key,wakeup;
|
||||||
};
|
};
|
||||||
|
|
||||||
back {
|
back {
|
||||||
label = "Back";
|
label = "Back";
|
||||||
gpios = <&gpio4 11 0>; /* GPIO5_11 */
|
gpios = <&gpio5 11 0>;
|
||||||
linux,code = <158>; /* KEY_BACK */
|
linux,code = <158>; /* KEY_BACK */
|
||||||
gpio-key,wakeup;
|
gpio-key,wakeup;
|
||||||
};
|
};
|
||||||
|
|
||||||
program {
|
program {
|
||||||
label = "Program";
|
label = "Program";
|
||||||
gpios = <&gpio4 12 0>; /* GPIO5_12 */
|
gpios = <&gpio5 12 0>;
|
||||||
linux,code = <362>; /* KEY_PROGRAM */
|
linux,code = <362>; /* KEY_PROGRAM */
|
||||||
gpio-key,wakeup;
|
gpio-key,wakeup;
|
||||||
};
|
};
|
||||||
|
|
||||||
volume-up {
|
volume-up {
|
||||||
label = "Volume Up";
|
label = "Volume Up";
|
||||||
gpios = <&gpio4 13 0>; /* GPIO5_13 */
|
gpios = <&gpio5 13 0>;
|
||||||
linux,code = <115>; /* KEY_VOLUMEUP */
|
linux,code = <115>; /* KEY_VOLUMEUP */
|
||||||
};
|
};
|
||||||
|
|
||||||
volume-down {
|
volume-down {
|
||||||
label = "Volume Down";
|
label = "Volume Down";
|
||||||
gpios = <&gpio3 0 0>; /* GPIO4_0 */
|
gpios = <&gpio4 0 0>;
|
||||||
linux,code = <114>; /* KEY_VOLUMEDOWN */
|
linux,code = <114>; /* KEY_VOLUMEDOWN */
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -29,15 +29,14 @@ soc {
|
||||||
aips@50000000 { /* AIPS1 */
|
aips@50000000 { /* AIPS1 */
|
||||||
spba@50000000 {
|
spba@50000000 {
|
||||||
esdhc@50004000 { /* ESDHC1 */
|
esdhc@50004000 { /* ESDHC1 */
|
||||||
cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
|
cd-gpios = <&gpio3 13 0>;
|
||||||
wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */
|
wp-gpios = <&gpio3 14 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
ecspi@50010000 { /* ECSPI1 */
|
ecspi@50010000 { /* ECSPI1 */
|
||||||
fsl,spi-num-chipselects = <2>;
|
fsl,spi-num-chipselects = <2>;
|
||||||
cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
|
cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
|
||||||
<&gpio2 19 0>; /* GPIO3_19 */
|
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
flash: at45db321d@1 {
|
flash: at45db321d@1 {
|
||||||
|
|
@ -61,8 +60,8 @@ partition@40000 {
|
||||||
};
|
};
|
||||||
|
|
||||||
esdhc@50020000 { /* ESDHC3 */
|
esdhc@50020000 { /* ESDHC3 */
|
||||||
cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
|
cd-gpios = <&gpio3 11 0>;
|
||||||
wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
|
wp-gpios = <&gpio3 12 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -76,7 +75,7 @@ iomuxc@53fa8000 {
|
||||||
reg = <0x53fa8000 0x4000>;
|
reg = <0x53fa8000 0x4000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0: uart@53fbc000 { /* UART1 */
|
uart1: uart@53fbc000 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -102,7 +101,7 @@ codec: sgtl5000@0a {
|
||||||
|
|
||||||
fec@63fec000 {
|
fec@63fec000 {
|
||||||
phy-mode = "rmii";
|
phy-mode = "rmii";
|
||||||
phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
|
phy-reset-gpios = <&gpio7 6 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -113,7 +112,7 @@ leds {
|
||||||
|
|
||||||
green {
|
green {
|
||||||
label = "Heartbeat";
|
label = "Heartbeat";
|
||||||
gpios = <&gpio6 7 0>; /* GPIO7_7 */
|
gpios = <&gpio7 7 0>;
|
||||||
linux,default-trigger = "heartbeat";
|
linux,default-trigger = "heartbeat";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -29,13 +29,13 @@ soc {
|
||||||
aips@50000000 { /* AIPS1 */
|
aips@50000000 { /* AIPS1 */
|
||||||
spba@50000000 {
|
spba@50000000 {
|
||||||
esdhc@50004000 { /* ESDHC1 */
|
esdhc@50004000 { /* ESDHC1 */
|
||||||
cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
|
cd-gpios = <&gpio3 13 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
esdhc@50020000 { /* ESDHC3 */
|
esdhc@50020000 { /* ESDHC3 */
|
||||||
cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
|
cd-gpios = <&gpio3 11 0>;
|
||||||
wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
|
wp-gpios = <&gpio3 12 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -49,7 +49,7 @@ iomuxc@53fa8000 {
|
||||||
reg = <0x53fa8000 0x4000>;
|
reg = <0x53fa8000 0x4000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0: uart@53fbc000 { /* UART1 */
|
uart1: uart@53fbc000 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -84,7 +84,7 @@ pmic: dialog@48 {
|
||||||
|
|
||||||
fec@63fec000 {
|
fec@63fec000 {
|
||||||
phy-mode = "rmii";
|
phy-mode = "rmii";
|
||||||
phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
|
phy-reset-gpios = <&gpio7 6 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -95,20 +95,20 @@ gpio-keys {
|
||||||
|
|
||||||
power {
|
power {
|
||||||
label = "Power Button";
|
label = "Power Button";
|
||||||
gpios = <&gpio0 8 0>; /* GPIO1_8 */
|
gpios = <&gpio1 8 0>;
|
||||||
linux,code = <116>; /* KEY_POWER */
|
linux,code = <116>; /* KEY_POWER */
|
||||||
gpio-key,wakeup;
|
gpio-key,wakeup;
|
||||||
};
|
};
|
||||||
|
|
||||||
volume-up {
|
volume-up {
|
||||||
label = "Volume Up";
|
label = "Volume Up";
|
||||||
gpios = <&gpio1 14 0>; /* GPIO2_14 */
|
gpios = <&gpio2 14 0>;
|
||||||
linux,code = <115>; /* KEY_VOLUMEUP */
|
linux,code = <115>; /* KEY_VOLUMEUP */
|
||||||
};
|
};
|
||||||
|
|
||||||
volume-down {
|
volume-down {
|
||||||
label = "Volume Down";
|
label = "Volume Down";
|
||||||
gpios = <&gpio1 15 0>; /* GPIO2_15 */
|
gpios = <&gpio2 15 0>;
|
||||||
linux,code = <114>; /* KEY_VOLUMEDOWN */
|
linux,code = <114>; /* KEY_VOLUMEDOWN */
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -118,7 +118,7 @@ leds {
|
||||||
|
|
||||||
user {
|
user {
|
||||||
label = "Heartbeat";
|
label = "Heartbeat";
|
||||||
gpios = <&gpio6 7 0>; /* GPIO7_7 */
|
gpios = <&gpio7 7 0>;
|
||||||
linux,default-trigger = "heartbeat";
|
linux,default-trigger = "heartbeat";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -29,8 +29,8 @@ soc {
|
||||||
aips@50000000 { /* AIPS1 */
|
aips@50000000 { /* AIPS1 */
|
||||||
spba@50000000 {
|
spba@50000000 {
|
||||||
esdhc@50004000 { /* ESDHC1 */
|
esdhc@50004000 { /* ESDHC1 */
|
||||||
cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
|
cd-gpios = <&gpio3 13 0>;
|
||||||
wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */
|
wp-gpios = <&gpio4 11 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -39,15 +39,14 @@ esdhc@50008000 { /* ESDHC2 */
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart2: uart@5000c000 { /* UART3 */
|
uart3: uart@5000c000 {
|
||||||
fsl,uart-has-rtscts;
|
fsl,uart-has-rtscts;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
ecspi@50010000 { /* ECSPI1 */
|
ecspi@50010000 { /* ECSPI1 */
|
||||||
fsl,spi-num-chipselects = <2>;
|
fsl,spi-num-chipselects = <2>;
|
||||||
cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
|
cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
|
||||||
<&gpio2 19 0>; /* GPIO3_19 */
|
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
zigbee: mc1323@0 {
|
zigbee: mc1323@0 {
|
||||||
|
|
@ -91,11 +90,11 @@ iomuxc@53fa8000 {
|
||||||
reg = <0x53fa8000 0x4000>;
|
reg = <0x53fa8000 0x4000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0: uart@53fbc000 { /* UART1 */
|
uart1: uart@53fbc000 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1: uart@53fc0000 { /* UART2 */
|
uart2: uart@53fc0000 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -145,7 +144,7 @@ pmic: dialog@48 {
|
||||||
|
|
||||||
fec@63fec000 {
|
fec@63fec000 {
|
||||||
phy-mode = "rmii";
|
phy-mode = "rmii";
|
||||||
phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
|
phy-reset-gpios = <&gpio7 6 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -156,13 +155,13 @@ gpio-keys {
|
||||||
|
|
||||||
volume-up {
|
volume-up {
|
||||||
label = "Volume Up";
|
label = "Volume Up";
|
||||||
gpios = <&gpio1 14 0>; /* GPIO2_14 */
|
gpios = <&gpio2 14 0>;
|
||||||
linux,code = <115>; /* KEY_VOLUMEUP */
|
linux,code = <115>; /* KEY_VOLUMEUP */
|
||||||
};
|
};
|
||||||
|
|
||||||
volume-down {
|
volume-down {
|
||||||
label = "Volume Down";
|
label = "Volume Down";
|
||||||
gpios = <&gpio1 15 0>; /* GPIO2_15 */
|
gpios = <&gpio2 15 0>;
|
||||||
linux,code = <114>; /* KEY_VOLUMEDOWN */
|
linux,code = <114>; /* KEY_VOLUMEDOWN */
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -14,11 +14,11 @@
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
aliases {
|
aliases {
|
||||||
serial0 = &uart0;
|
serial0 = &uart1;
|
||||||
serial1 = &uart1;
|
serial1 = &uart2;
|
||||||
serial2 = &uart2;
|
serial2 = &uart3;
|
||||||
serial3 = &uart3;
|
serial3 = &uart4;
|
||||||
serial4 = &uart4;
|
serial4 = &uart5;
|
||||||
};
|
};
|
||||||
|
|
||||||
tzic: tz-interrupt-controller@0fffc000 {
|
tzic: tz-interrupt-controller@0fffc000 {
|
||||||
|
|
@ -88,7 +88,7 @@ esdhc@50008000 { /* ESDHC2 */
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart2: uart@5000c000 { /* UART3 */
|
uart3: uart@5000c000 {
|
||||||
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
||||||
reg = <0x5000c000 0x4000>;
|
reg = <0x5000c000 0x4000>;
|
||||||
interrupts = <33>;
|
interrupts = <33>;
|
||||||
|
|
@ -119,7 +119,7 @@ esdhc@50024000 { /* ESDHC4 */
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio0: gpio@53f84000 { /* GPIO1 */
|
gpio1: gpio@53f84000 {
|
||||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x53f84000 0x4000>;
|
reg = <0x53f84000 0x4000>;
|
||||||
interrupts = <50 51>;
|
interrupts = <50 51>;
|
||||||
|
|
@ -129,7 +129,7 @@ gpio0: gpio@53f84000 { /* GPIO1 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio1: gpio@53f88000 { /* GPIO2 */
|
gpio2: gpio@53f88000 {
|
||||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x53f88000 0x4000>;
|
reg = <0x53f88000 0x4000>;
|
||||||
interrupts = <52 53>;
|
interrupts = <52 53>;
|
||||||
|
|
@ -139,7 +139,7 @@ gpio1: gpio@53f88000 { /* GPIO2 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio2: gpio@53f8c000 { /* GPIO3 */
|
gpio3: gpio@53f8c000 {
|
||||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x53f8c000 0x4000>;
|
reg = <0x53f8c000 0x4000>;
|
||||||
interrupts = <54 55>;
|
interrupts = <54 55>;
|
||||||
|
|
@ -149,7 +149,7 @@ gpio2: gpio@53f8c000 { /* GPIO3 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio3: gpio@53f90000 { /* GPIO4 */
|
gpio4: gpio@53f90000 {
|
||||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x53f90000 0x4000>;
|
reg = <0x53f90000 0x4000>;
|
||||||
interrupts = <56 57>;
|
interrupts = <56 57>;
|
||||||
|
|
@ -173,21 +173,21 @@ wdog@53f9c000 { /* WDOG2 */
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0: uart@53fbc000 { /* UART1 */
|
uart1: uart@53fbc000 {
|
||||||
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
||||||
reg = <0x53fbc000 0x4000>;
|
reg = <0x53fbc000 0x4000>;
|
||||||
interrupts = <31>;
|
interrupts = <31>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1: uart@53fc0000 { /* UART2 */
|
uart2: uart@53fc0000 {
|
||||||
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
||||||
reg = <0x53fc0000 0x4000>;
|
reg = <0x53fc0000 0x4000>;
|
||||||
interrupts = <32>;
|
interrupts = <32>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio4: gpio@53fdc000 { /* GPIO5 */
|
gpio5: gpio@53fdc000 {
|
||||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x53fdc000 0x4000>;
|
reg = <0x53fdc000 0x4000>;
|
||||||
interrupts = <103 104>;
|
interrupts = <103 104>;
|
||||||
|
|
@ -197,7 +197,7 @@ gpio4: gpio@53fdc000 { /* GPIO5 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio5: gpio@53fe0000 { /* GPIO6 */
|
gpio6: gpio@53fe0000 {
|
||||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x53fe0000 0x4000>;
|
reg = <0x53fe0000 0x4000>;
|
||||||
interrupts = <105 106>;
|
interrupts = <105 106>;
|
||||||
|
|
@ -207,7 +207,7 @@ gpio5: gpio@53fe0000 { /* GPIO6 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio6: gpio@53fe4000 { /* GPIO7 */
|
gpio7: gpio@53fe4000 {
|
||||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x53fe4000 0x4000>;
|
reg = <0x53fe4000 0x4000>;
|
||||||
interrupts = <107 108>;
|
interrupts = <107 108>;
|
||||||
|
|
@ -226,7 +226,7 @@ i2c@53fec000 { /* I2C3 */
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart3: uart@53ff0000 { /* UART4 */
|
uart4: uart@53ff0000 {
|
||||||
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
||||||
reg = <0x53ff0000 0x4000>;
|
reg = <0x53ff0000 0x4000>;
|
||||||
interrupts = <13>;
|
interrupts = <13>;
|
||||||
|
|
@ -241,7 +241,7 @@ aips@60000000 { /* AIPS2 */
|
||||||
reg = <0x60000000 0x10000000>;
|
reg = <0x60000000 0x10000000>;
|
||||||
ranges;
|
ranges;
|
||||||
|
|
||||||
uart4: uart@63f90000 { /* UART5 */
|
uart5: uart@63f90000 {
|
||||||
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
||||||
reg = <0x63f90000 0x4000>;
|
reg = <0x63f90000 0x4000>;
|
||||||
interrupts = <86>;
|
interrupts = <86>;
|
||||||
|
|
|
||||||
|
|
@ -14,8 +14,8 @@
|
||||||
/include/ "imx6q.dtsi"
|
/include/ "imx6q.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "Freescale i.MX6 Quad SABRE Automotive Board";
|
model = "Freescale i.MX6 Quad Armadillo2 Board";
|
||||||
compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
|
compatible = "fsl,imx6q-arm2", "fsl,imx6q";
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";
|
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";
|
||||||
|
|
@ -34,8 +34,8 @@ enet@02188000 {
|
||||||
};
|
};
|
||||||
|
|
||||||
usdhc@02198000 { /* uSDHC3 */
|
usdhc@02198000 { /* uSDHC3 */
|
||||||
cd-gpios = <&gpio5 11 0>; /* GPIO6_11 */
|
cd-gpios = <&gpio6 11 0>;
|
||||||
wp-gpios = <&gpio5 14 0>; /* GPIO6_14 */
|
wp-gpios = <&gpio6 14 0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -44,7 +44,7 @@ usdhc@0219c000 { /* uSDHC4 */
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart3: uart@021f0000 { /* UART4 */
|
uart4: uart@021f0000 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -55,7 +55,7 @@ leds {
|
||||||
|
|
||||||
debug-led {
|
debug-led {
|
||||||
label = "Heartbeat";
|
label = "Heartbeat";
|
||||||
gpios = <&gpio2 25 0>; /* GPIO3_25 */
|
gpios = <&gpio3 25 0>;
|
||||||
linux,default-trigger = "heartbeat";
|
linux,default-trigger = "heartbeat";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
@ -0,0 +1,49 @@
|
||||||
|
/*
|
||||||
|
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||||
|
* Copyright 2011 Linaro Ltd.
|
||||||
|
*
|
||||||
|
* The code contained herein is licensed under the GNU General Public
|
||||||
|
* License. You may obtain a copy of the GNU General Public License
|
||||||
|
* Version 2 or later at the following locations:
|
||||||
|
*
|
||||||
|
* http://www.opensource.org/licenses/gpl-license.html
|
||||||
|
* http://www.gnu.org/copyleft/gpl.html
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/include/ "imx6q.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Freescale i.MX6 Quad SABRE Lite Board";
|
||||||
|
compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
|
||||||
|
|
||||||
|
memory {
|
||||||
|
reg = <0x10000000 0x40000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
soc {
|
||||||
|
aips-bus@02100000 { /* AIPS2 */
|
||||||
|
enet@02188000 {
|
||||||
|
phy-mode = "rgmii";
|
||||||
|
phy-reset-gpios = <&gpio3 23 0>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
usdhc@02198000 { /* uSDHC3 */
|
||||||
|
cd-gpios = <&gpio7 0 0>;
|
||||||
|
wp-gpios = <&gpio7 1 0>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
usdhc@0219c000 { /* uSDHC4 */
|
||||||
|
cd-gpios = <&gpio2 6 0>;
|
||||||
|
wp-gpios = <&gpio2 7 0>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
uart2: uart@021e8000 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -14,11 +14,11 @@
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
aliases {
|
aliases {
|
||||||
serial0 = &uart0;
|
serial0 = &uart1;
|
||||||
serial1 = &uart1;
|
serial1 = &uart2;
|
||||||
serial2 = &uart2;
|
serial2 = &uart3;
|
||||||
serial3 = &uart3;
|
serial3 = &uart4;
|
||||||
serial4 = &uart4;
|
serial4 = &uart5;
|
||||||
};
|
};
|
||||||
|
|
||||||
cpus {
|
cpus {
|
||||||
|
|
@ -165,7 +165,7 @@ ecspi@02018000 { /* eCSPI5 */
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0: uart@02020000 { /* UART1 */
|
uart1: uart@02020000 {
|
||||||
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
|
||||||
reg = <0x02020000 0x4000>;
|
reg = <0x02020000 0x4000>;
|
||||||
interrupts = <0 26 0x04>;
|
interrupts = <0 26 0x04>;
|
||||||
|
|
@ -247,7 +247,7 @@ gpt@02098000 {
|
||||||
interrupts = <0 55 0x04>;
|
interrupts = <0 55 0x04>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio0: gpio@0209c000 { /* GPIO1 */
|
gpio1: gpio@0209c000 {
|
||||||
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x0209c000 0x4000>;
|
reg = <0x0209c000 0x4000>;
|
||||||
interrupts = <0 66 0x04 0 67 0x04>;
|
interrupts = <0 66 0x04 0 67 0x04>;
|
||||||
|
|
@ -257,7 +257,7 @@ gpio0: gpio@0209c000 { /* GPIO1 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio1: gpio@020a0000 { /* GPIO2 */
|
gpio2: gpio@020a0000 {
|
||||||
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x020a0000 0x4000>;
|
reg = <0x020a0000 0x4000>;
|
||||||
interrupts = <0 68 0x04 0 69 0x04>;
|
interrupts = <0 68 0x04 0 69 0x04>;
|
||||||
|
|
@ -267,7 +267,7 @@ gpio1: gpio@020a0000 { /* GPIO2 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio2: gpio@020a4000 { /* GPIO3 */
|
gpio3: gpio@020a4000 {
|
||||||
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x020a4000 0x4000>;
|
reg = <0x020a4000 0x4000>;
|
||||||
interrupts = <0 70 0x04 0 71 0x04>;
|
interrupts = <0 70 0x04 0 71 0x04>;
|
||||||
|
|
@ -277,7 +277,7 @@ gpio2: gpio@020a4000 { /* GPIO3 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio3: gpio@020a8000 { /* GPIO4 */
|
gpio4: gpio@020a8000 {
|
||||||
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x020a8000 0x4000>;
|
reg = <0x020a8000 0x4000>;
|
||||||
interrupts = <0 72 0x04 0 73 0x04>;
|
interrupts = <0 72 0x04 0 73 0x04>;
|
||||||
|
|
@ -287,7 +287,7 @@ gpio3: gpio@020a8000 { /* GPIO4 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio4: gpio@020ac000 { /* GPIO5 */
|
gpio5: gpio@020ac000 {
|
||||||
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x020ac000 0x4000>;
|
reg = <0x020ac000 0x4000>;
|
||||||
interrupts = <0 74 0x04 0 75 0x04>;
|
interrupts = <0 74 0x04 0 75 0x04>;
|
||||||
|
|
@ -297,7 +297,7 @@ gpio4: gpio@020ac000 { /* GPIO5 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio5: gpio@020b0000 { /* GPIO6 */
|
gpio6: gpio@020b0000 {
|
||||||
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x020b0000 0x4000>;
|
reg = <0x020b0000 0x4000>;
|
||||||
interrupts = <0 76 0x04 0 77 0x04>;
|
interrupts = <0 76 0x04 0 77 0x04>;
|
||||||
|
|
@ -307,7 +307,7 @@ gpio5: gpio@020b0000 { /* GPIO6 */
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio6: gpio@020b4000 { /* GPIO7 */
|
gpio7: gpio@020b4000 {
|
||||||
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
|
||||||
reg = <0x020b4000 0x4000>;
|
reg = <0x020b4000 0x4000>;
|
||||||
interrupts = <0 78 0x04 0 79 0x04>;
|
interrupts = <0 78 0x04 0 79 0x04>;
|
||||||
|
|
@ -543,28 +543,28 @@ vdoa@021e4000 {
|
||||||
interrupts = <0 18 0x04>;
|
interrupts = <0 18 0x04>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1: uart@021e8000 { /* UART2 */
|
uart2: uart@021e8000 {
|
||||||
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
|
||||||
reg = <0x021e8000 0x4000>;
|
reg = <0x021e8000 0x4000>;
|
||||||
interrupts = <0 27 0x04>;
|
interrupts = <0 27 0x04>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart2: uart@021ec000 { /* UART3 */
|
uart3: uart@021ec000 {
|
||||||
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
|
||||||
reg = <0x021ec000 0x4000>;
|
reg = <0x021ec000 0x4000>;
|
||||||
interrupts = <0 28 0x04>;
|
interrupts = <0 28 0x04>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart3: uart@021f0000 { /* UART4 */
|
uart4: uart@021f0000 {
|
||||||
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
|
||||||
reg = <0x021f0000 0x4000>;
|
reg = <0x021f0000 0x4000>;
|
||||||
interrupts = <0 29 0x04>;
|
interrupts = <0 29 0x04>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart4: uart@021f4000 { /* UART5 */
|
uart5: uart@021f4000 {
|
||||||
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
|
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
|
||||||
reg = <0x021f4000 0x4000>;
|
reg = <0x021f4000 0x4000>;
|
||||||
interrupts = <0 30 0x04>;
|
interrupts = <0 30 0x04>;
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,67 @@
|
||||||
|
/*
|
||||||
|
* Device Tree Source for OMAP2 SoC
|
||||||
|
*
|
||||||
|
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
*
|
||||||
|
* This file is licensed under the terms of the GNU General Public License
|
||||||
|
* version 2. This program is licensed "as is" without any warranty of any
|
||||||
|
* kind, whether express or implied.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/include/ "skeleton.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
serial0 = &uart1;
|
||||||
|
serial1 = &uart2;
|
||||||
|
serial2 = &uart3;
|
||||||
|
};
|
||||||
|
|
||||||
|
cpus {
|
||||||
|
cpu@0 {
|
||||||
|
compatible = "arm,arm1136jf-s";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
soc {
|
||||||
|
compatible = "ti,omap-infra";
|
||||||
|
mpu {
|
||||||
|
compatible = "ti,omap2-mpu";
|
||||||
|
ti,hwmods = "mpu";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
ocp {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges;
|
||||||
|
ti,hwmods = "l3_main";
|
||||||
|
|
||||||
|
intc: interrupt-controller@1 {
|
||||||
|
compatible = "ti,omap2-intc";
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart1: serial@4806a000 {
|
||||||
|
compatible = "ti,omap2-uart";
|
||||||
|
ti,hwmods = "uart1";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart2: serial@4806c000 {
|
||||||
|
compatible = "ti,omap2-uart";
|
||||||
|
ti,hwmods = "uart2";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart3: serial@4806e000 {
|
||||||
|
compatible = "ti,omap2-uart";
|
||||||
|
ti,hwmods = "uart3";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -13,6 +13,13 @@
|
||||||
/ {
|
/ {
|
||||||
compatible = "ti,omap3430", "ti,omap3";
|
compatible = "ti,omap3430", "ti,omap3";
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
serial0 = &uart1;
|
||||||
|
serial1 = &uart2;
|
||||||
|
serial2 = &uart3;
|
||||||
|
serial3 = &uart4;
|
||||||
|
};
|
||||||
|
|
||||||
cpus {
|
cpus {
|
||||||
cpu@0 {
|
cpu@0 {
|
||||||
compatible = "arm,cortex-a8";
|
compatible = "arm,cortex-a8";
|
||||||
|
|
@ -59,5 +66,29 @@ intc: interrupt-controller@1 {
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
uart1: serial@0x4806a000 {
|
||||||
|
compatible = "ti,omap3-uart";
|
||||||
|
ti,hwmods = "uart1";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart2: serial@0x4806c000 {
|
||||||
|
compatible = "ti,omap3-uart";
|
||||||
|
ti,hwmods = "uart2";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart3: serial@0x49020000 {
|
||||||
|
compatible = "ti,omap3-uart";
|
||||||
|
ti,hwmods = "uart3";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart4: serial@0x49042000 {
|
||||||
|
compatible = "ti,omap3-uart";
|
||||||
|
ti,hwmods = "uart4";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -21,6 +21,10 @@ / {
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
|
|
||||||
aliases {
|
aliases {
|
||||||
|
serial0 = &uart1;
|
||||||
|
serial1 = &uart2;
|
||||||
|
serial2 = &uart3;
|
||||||
|
serial3 = &uart4;
|
||||||
};
|
};
|
||||||
|
|
||||||
cpus {
|
cpus {
|
||||||
|
|
@ -99,5 +103,29 @@ gic: interrupt-controller@48241000 {
|
||||||
reg = <0x48241000 0x1000>,
|
reg = <0x48241000 0x1000>,
|
||||||
<0x48240100 0x0100>;
|
<0x48240100 0x0100>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
uart1: serial@0x4806a000 {
|
||||||
|
compatible = "ti,omap4-uart";
|
||||||
|
ti,hwmods = "uart1";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart2: serial@0x4806c000 {
|
||||||
|
compatible = "ti,omap4-uart";
|
||||||
|
ti,hwmods = "uart2";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart3: serial@0x48020000 {
|
||||||
|
compatible = "ti,omap4-uart";
|
||||||
|
ti,hwmods = "uart3";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart4: serial@0x4806e000 {
|
||||||
|
compatible = "ti,omap4-uart";
|
||||||
|
ti,hwmods = "uart4";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,36 @@
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
/include/ "tegra30.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "NVIDIA Tegra30 Cardhu evaluation board";
|
||||||
|
compatible = "nvidia,cardhu", "nvidia,tegra30";
|
||||||
|
|
||||||
|
memory {
|
||||||
|
reg = < 0x80000000 0x40000000 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006000 {
|
||||||
|
clock-frequency = < 408000000 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c000 {
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c400 {
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c500 {
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c700 {
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000d000 {
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -1,16 +1,11 @@
|
||||||
/dts-v1/;
|
/dts-v1/;
|
||||||
|
|
||||||
/memreserve/ 0x1c000000 0x04000000;
|
|
||||||
/include/ "tegra20.dtsi"
|
/include/ "tegra20.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "NVIDIA Tegra2 Harmony evaluation board";
|
model = "NVIDIA Tegra2 Harmony evaluation board";
|
||||||
compatible = "nvidia,harmony", "nvidia,tegra20";
|
compatible = "nvidia,harmony", "nvidia,tegra20";
|
||||||
|
|
||||||
chosen {
|
|
||||||
bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk0p2 rw rootwait";
|
|
||||||
};
|
|
||||||
|
|
||||||
memory@0 {
|
memory@0 {
|
||||||
reg = < 0x00000000 0x40000000 >;
|
reg = < 0x00000000 0x40000000 >;
|
||||||
};
|
};
|
||||||
|
|
@ -52,16 +47,40 @@ sound {
|
||||||
ext-mic-en-gpios = <&gpio 185 0>;
|
ext-mic-en-gpios = <&gpio 185 0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
serial@70006000 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006040 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006200 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
serial@70006300 {
|
serial@70006300 {
|
||||||
clock-frequency = < 216000000 >;
|
clock-frequency = < 216000000 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
serial@70006400 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000000 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
sdhci@c8000200 {
|
sdhci@c8000200 {
|
||||||
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
||||||
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
||||||
power-gpios = <&gpio 155 0>; /* gpio PT3 */
|
power-gpios = <&gpio 155 0>; /* gpio PT3 */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
sdhci@c8000400 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
sdhci@c8000600 {
|
sdhci@c8000600 {
|
||||||
cd-gpios = <&gpio 58 0>; /* gpio PH2 */
|
cd-gpios = <&gpio 58 0>; /* gpio PH2 */
|
||||||
wp-gpios = <&gpio 59 0>; /* gpio PH3 */
|
wp-gpios = <&gpio 59 0>; /* gpio PH3 */
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,77 @@
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
/include/ "tegra20.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Toshiba AC100 / Dynabook AZ";
|
||||||
|
compatible = "compal,paz00", "nvidia,tegra20";
|
||||||
|
|
||||||
|
memory@0 {
|
||||||
|
reg = <0x00000000 0x20000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c000 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c400 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c500 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
nvec@7000c500 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
compatible = "nvidia,nvec";
|
||||||
|
reg = <0x7000C500 0x100>;
|
||||||
|
interrupts = <0 92 0x04>;
|
||||||
|
clock-frequency = <80000>;
|
||||||
|
request-gpios = <&gpio 170 0>;
|
||||||
|
slave-addr = <138>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000d000 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006000 {
|
||||||
|
clock-frequency = <216000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006040 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006200 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006300 {
|
||||||
|
clock-frequency = <216000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006400 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000000 {
|
||||||
|
cd-gpios = <&gpio 173 0>; /* gpio PV5 */
|
||||||
|
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
||||||
|
power-gpios = <&gpio 155 0>; /* gpio PT3 */
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000200 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000400 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000600 {
|
||||||
|
support-8bit;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -1,25 +1,65 @@
|
||||||
/dts-v1/;
|
/dts-v1/;
|
||||||
|
|
||||||
/memreserve/ 0x1c000000 0x04000000;
|
|
||||||
/include/ "tegra20.dtsi"
|
/include/ "tegra20.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "NVIDIA Seaboard";
|
model = "NVIDIA Seaboard";
|
||||||
compatible = "nvidia,seaboard", "nvidia,tegra20";
|
compatible = "nvidia,seaboard", "nvidia,tegra20";
|
||||||
|
|
||||||
chosen {
|
|
||||||
bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
|
|
||||||
};
|
|
||||||
|
|
||||||
memory {
|
memory {
|
||||||
device_type = "memory";
|
device_type = "memory";
|
||||||
reg = < 0x00000000 0x40000000 >;
|
reg = < 0x00000000 0x40000000 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
i2c@7000c000 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c400 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c500 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000d000 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
|
adt7461@4c {
|
||||||
|
compatible = "adt7461";
|
||||||
|
reg = <0x4c>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006000 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006040 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006200 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
serial@70006300 {
|
serial@70006300 {
|
||||||
clock-frequency = < 216000000 >;
|
clock-frequency = < 216000000 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
serial@70006400 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000000 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000200 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
sdhci@c8000400 {
|
sdhci@c8000400 {
|
||||||
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
||||||
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
||||||
|
|
@ -29,4 +69,28 @@ sdhci@c8000400 {
|
||||||
sdhci@c8000600 {
|
sdhci@c8000600 {
|
||||||
support-8bit;
|
support-8bit;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
usb@c5000000 {
|
||||||
|
nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
|
||||||
|
};
|
||||||
|
|
||||||
|
gpio-keys {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
|
||||||
|
power {
|
||||||
|
label = "Power";
|
||||||
|
gpios = <&gpio 170 1>; /* gpio PV2, active low */
|
||||||
|
linux,code = <116>; /* KEY_POWER */
|
||||||
|
gpio-key,wakeup;
|
||||||
|
};
|
||||||
|
|
||||||
|
lid {
|
||||||
|
label = "Lid";
|
||||||
|
gpios = <&gpio 23 0>; /* gpio PC7 */
|
||||||
|
linux,input-type = <5>; /* EV_SW */
|
||||||
|
linux,code = <0>; /* SW_LID */
|
||||||
|
debounce-interval = <1>;
|
||||||
|
gpio-key,wakeup;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,65 @@
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
/include/ "tegra20.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Compulab TrimSlice board";
|
||||||
|
compatible = "compulab,trimslice", "nvidia,tegra20";
|
||||||
|
|
||||||
|
memory@0 {
|
||||||
|
reg = < 0x00000000 0x40000000 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c000 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c400 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c500 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000d000 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006000 {
|
||||||
|
clock-frequency = < 216000000 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006040 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006200 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006300 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006400 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000000 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000200 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000400 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000600 {
|
||||||
|
cd-gpios = <&gpio 121 0>;
|
||||||
|
wp-gpios = <&gpio 122 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -1,24 +1,59 @@
|
||||||
/dts-v1/;
|
/dts-v1/;
|
||||||
|
|
||||||
/memreserve/ 0x1c000000 0x04000000;
|
|
||||||
/include/ "tegra20.dtsi"
|
/include/ "tegra20.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "NVIDIA Tegra2 Ventana evaluation board";
|
model = "NVIDIA Tegra2 Ventana evaluation board";
|
||||||
compatible = "nvidia,ventana", "nvidia,tegra20";
|
compatible = "nvidia,ventana", "nvidia,tegra20";
|
||||||
|
|
||||||
chosen {
|
|
||||||
bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/ram rdinit=/sbin/init";
|
|
||||||
};
|
|
||||||
|
|
||||||
memory {
|
memory {
|
||||||
reg = < 0x00000000 0x40000000 >;
|
reg = < 0x00000000 0x40000000 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
i2c@7000c000 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c400 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c500 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000d000 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006000 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006040 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006200 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
serial@70006300 {
|
serial@70006300 {
|
||||||
clock-frequency = < 216000000 >;
|
clock-frequency = < 216000000 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
serial@70006400 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000000 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@c8000200 {
|
||||||
|
status = "disable";
|
||||||
|
};
|
||||||
|
|
||||||
sdhci@c8000400 {
|
sdhci@c8000400 {
|
||||||
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
||||||
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
||||||
|
|
|
||||||
|
|
@ -5,9 +5,9 @@ / {
|
||||||
interrupt-parent = <&intc>;
|
interrupt-parent = <&intc>;
|
||||||
|
|
||||||
intc: interrupt-controller@50041000 {
|
intc: interrupt-controller@50041000 {
|
||||||
compatible = "nvidia,tegra20-gic";
|
compatible = "arm,cortex-a9-gic";
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <3>;
|
||||||
reg = < 0x50041000 0x1000 >,
|
reg = < 0x50041000 0x1000 >,
|
||||||
< 0x50040100 0x0100 >;
|
< 0x50040100 0x0100 >;
|
||||||
};
|
};
|
||||||
|
|
@ -17,7 +17,7 @@ i2c@7000c000 {
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "nvidia,tegra20-i2c";
|
compatible = "nvidia,tegra20-i2c";
|
||||||
reg = <0x7000C000 0x100>;
|
reg = <0x7000C000 0x100>;
|
||||||
interrupts = < 70 >;
|
interrupts = < 0 38 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
i2c@7000c400 {
|
i2c@7000c400 {
|
||||||
|
|
@ -25,7 +25,7 @@ i2c@7000c400 {
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "nvidia,tegra20-i2c";
|
compatible = "nvidia,tegra20-i2c";
|
||||||
reg = <0x7000C400 0x100>;
|
reg = <0x7000C400 0x100>;
|
||||||
interrupts = < 116 >;
|
interrupts = < 0 84 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
i2c@7000c500 {
|
i2c@7000c500 {
|
||||||
|
|
@ -33,38 +33,32 @@ i2c@7000c500 {
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "nvidia,tegra20-i2c";
|
compatible = "nvidia,tegra20-i2c";
|
||||||
reg = <0x7000C500 0x100>;
|
reg = <0x7000C500 0x100>;
|
||||||
interrupts = < 124 >;
|
interrupts = < 0 92 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
i2c@7000d000 {
|
i2c@7000d000 {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "nvidia,tegra20-i2c";
|
compatible = "nvidia,tegra20-i2c-dvc";
|
||||||
reg = <0x7000D000 0x200>;
|
reg = <0x7000D000 0x200>;
|
||||||
interrupts = < 85 >;
|
interrupts = < 0 53 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
i2s@70002800 {
|
i2s@70002800 {
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
compatible = "nvidia,tegra20-i2s";
|
compatible = "nvidia,tegra20-i2s";
|
||||||
reg = <0x70002800 0x200>;
|
reg = <0x70002800 0x200>;
|
||||||
interrupts = < 45 >;
|
interrupts = < 0 13 0x04 >;
|
||||||
dma-channel = < 2 >;
|
dma-channel = < 2 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
i2s@70002a00 {
|
i2s@70002a00 {
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
compatible = "nvidia,tegra20-i2s";
|
compatible = "nvidia,tegra20-i2s";
|
||||||
reg = <0x70002a00 0x200>;
|
reg = <0x70002a00 0x200>;
|
||||||
interrupts = < 35 >;
|
interrupts = < 0 3 0x04 >;
|
||||||
dma-channel = < 1 >;
|
dma-channel = < 1 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
das@70000c00 {
|
das@70000c00 {
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
compatible = "nvidia,tegra20-das";
|
compatible = "nvidia,tegra20-das";
|
||||||
reg = <0x70000c00 0x80>;
|
reg = <0x70000c00 0x80>;
|
||||||
};
|
};
|
||||||
|
|
@ -72,7 +66,13 @@ das@70000c00 {
|
||||||
gpio: gpio@6000d000 {
|
gpio: gpio@6000d000 {
|
||||||
compatible = "nvidia,tegra20-gpio";
|
compatible = "nvidia,tegra20-gpio";
|
||||||
reg = < 0x6000d000 0x1000 >;
|
reg = < 0x6000d000 0x1000 >;
|
||||||
interrupts = < 64 65 66 67 87 119 121 >;
|
interrupts = < 0 32 0x04
|
||||||
|
0 33 0x04
|
||||||
|
0 34 0x04
|
||||||
|
0 35 0x04
|
||||||
|
0 55 0x04
|
||||||
|
0 87 0x04
|
||||||
|
0 89 0x04 >;
|
||||||
#gpio-cells = <2>;
|
#gpio-cells = <2>;
|
||||||
gpio-controller;
|
gpio-controller;
|
||||||
};
|
};
|
||||||
|
|
@ -89,59 +89,80 @@ serial@70006000 {
|
||||||
compatible = "nvidia,tegra20-uart";
|
compatible = "nvidia,tegra20-uart";
|
||||||
reg = <0x70006000 0x40>;
|
reg = <0x70006000 0x40>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
interrupts = < 68 >;
|
interrupts = < 0 36 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@70006040 {
|
serial@70006040 {
|
||||||
compatible = "nvidia,tegra20-uart";
|
compatible = "nvidia,tegra20-uart";
|
||||||
reg = <0x70006040 0x40>;
|
reg = <0x70006040 0x40>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
interrupts = < 69 >;
|
interrupts = < 0 37 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@70006200 {
|
serial@70006200 {
|
||||||
compatible = "nvidia,tegra20-uart";
|
compatible = "nvidia,tegra20-uart";
|
||||||
reg = <0x70006200 0x100>;
|
reg = <0x70006200 0x100>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
interrupts = < 78 >;
|
interrupts = < 0 46 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@70006300 {
|
serial@70006300 {
|
||||||
compatible = "nvidia,tegra20-uart";
|
compatible = "nvidia,tegra20-uart";
|
||||||
reg = <0x70006300 0x100>;
|
reg = <0x70006300 0x100>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
interrupts = < 122 >;
|
interrupts = < 0 90 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@70006400 {
|
serial@70006400 {
|
||||||
compatible = "nvidia,tegra20-uart";
|
compatible = "nvidia,tegra20-uart";
|
||||||
reg = <0x70006400 0x100>;
|
reg = <0x70006400 0x100>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
interrupts = < 123 >;
|
interrupts = < 0 91 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
sdhci@c8000000 {
|
sdhci@c8000000 {
|
||||||
compatible = "nvidia,tegra20-sdhci";
|
compatible = "nvidia,tegra20-sdhci";
|
||||||
reg = <0xc8000000 0x200>;
|
reg = <0xc8000000 0x200>;
|
||||||
interrupts = < 46 >;
|
interrupts = < 0 14 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
sdhci@c8000200 {
|
sdhci@c8000200 {
|
||||||
compatible = "nvidia,tegra20-sdhci";
|
compatible = "nvidia,tegra20-sdhci";
|
||||||
reg = <0xc8000200 0x200>;
|
reg = <0xc8000200 0x200>;
|
||||||
interrupts = < 47 >;
|
interrupts = < 0 15 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
sdhci@c8000400 {
|
sdhci@c8000400 {
|
||||||
compatible = "nvidia,tegra20-sdhci";
|
compatible = "nvidia,tegra20-sdhci";
|
||||||
reg = <0xc8000400 0x200>;
|
reg = <0xc8000400 0x200>;
|
||||||
interrupts = < 51 >;
|
interrupts = < 0 19 0x04 >;
|
||||||
};
|
};
|
||||||
|
|
||||||
sdhci@c8000600 {
|
sdhci@c8000600 {
|
||||||
compatible = "nvidia,tegra20-sdhci";
|
compatible = "nvidia,tegra20-sdhci";
|
||||||
reg = <0xc8000600 0x200>;
|
reg = <0xc8000600 0x200>;
|
||||||
interrupts = < 63 >;
|
interrupts = < 0 31 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
usb@c5000000 {
|
||||||
|
compatible = "nvidia,tegra20-ehci", "usb-ehci";
|
||||||
|
reg = <0xc5000000 0x4000>;
|
||||||
|
interrupts = < 0 20 0x04 >;
|
||||||
|
phy_type = "utmi";
|
||||||
|
};
|
||||||
|
|
||||||
|
usb@c5004000 {
|
||||||
|
compatible = "nvidia,tegra20-ehci", "usb-ehci";
|
||||||
|
reg = <0xc5004000 0x4000>;
|
||||||
|
interrupts = < 0 21 0x04 >;
|
||||||
|
phy_type = "ulpi";
|
||||||
|
};
|
||||||
|
|
||||||
|
usb@c5008000 {
|
||||||
|
compatible = "nvidia,tegra20-ehci", "usb-ehci";
|
||||||
|
reg = <0xc5008000 0x4000>;
|
||||||
|
interrupts = < 0 97 0x04 >;
|
||||||
|
phy_type = "utmi";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,127 @@
|
||||||
|
/include/ "skeleton.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
compatible = "nvidia,tegra30";
|
||||||
|
interrupt-parent = <&intc>;
|
||||||
|
|
||||||
|
intc: interrupt-controller@50041000 {
|
||||||
|
compatible = "arm,cortex-a9-gic";
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <3>;
|
||||||
|
reg = < 0x50041000 0x1000 >,
|
||||||
|
< 0x50040100 0x0100 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c000 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
|
||||||
|
reg = <0x7000C000 0x100>;
|
||||||
|
interrupts = < 0 38 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c400 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
|
||||||
|
reg = <0x7000C400 0x100>;
|
||||||
|
interrupts = < 0 84 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c500 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
|
||||||
|
reg = <0x7000C500 0x100>;
|
||||||
|
interrupts = < 0 92 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000c700 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
|
||||||
|
reg = <0x7000c700 0x100>;
|
||||||
|
interrupts = < 0 120 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c@7000d000 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
|
||||||
|
reg = <0x7000D000 0x100>;
|
||||||
|
interrupts = < 0 53 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpio: gpio@6000d000 {
|
||||||
|
compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
|
||||||
|
reg = < 0x6000d000 0x1000 >;
|
||||||
|
interrupts = < 0 32 0x04 0 33 0x04 0 34 0x04 0 35 0x04 0 55 0x04 0 87 0x04 0 89 0x04 >;
|
||||||
|
#gpio-cells = <2>;
|
||||||
|
gpio-controller;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006000 {
|
||||||
|
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
|
||||||
|
reg = <0x70006000 0x40>;
|
||||||
|
reg-shift = <2>;
|
||||||
|
interrupts = < 0 36 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006040 {
|
||||||
|
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
|
||||||
|
reg = <0x70006040 0x40>;
|
||||||
|
reg-shift = <2>;
|
||||||
|
interrupts = < 0 37 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006200 {
|
||||||
|
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
|
||||||
|
reg = <0x70006200 0x100>;
|
||||||
|
reg-shift = <2>;
|
||||||
|
interrupts = < 0 46 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006300 {
|
||||||
|
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
|
||||||
|
reg = <0x70006300 0x100>;
|
||||||
|
reg-shift = <2>;
|
||||||
|
interrupts = < 0 90 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
serial@70006400 {
|
||||||
|
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
|
||||||
|
reg = <0x70006400 0x100>;
|
||||||
|
reg-shift = <2>;
|
||||||
|
interrupts = < 0 91 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@78000000 {
|
||||||
|
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
|
||||||
|
reg = <0x78000000 0x200>;
|
||||||
|
interrupts = < 0 14 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@78000200 {
|
||||||
|
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
|
||||||
|
reg = <0x78000200 0x200>;
|
||||||
|
interrupts = < 0 15 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@78000400 {
|
||||||
|
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
|
||||||
|
reg = <0x78000400 0x200>;
|
||||||
|
interrupts = < 0 19 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
sdhci@78000600 {
|
||||||
|
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
|
||||||
|
reg = <0x78000600 0x200>;
|
||||||
|
interrupts = < 0 31 0x04 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
pinmux: pinmux@70000000 {
|
||||||
|
compatible = "nvidia,tegra30-pinmux";
|
||||||
|
reg = < 0x70000868 0xd0 /* Pad control registers */
|
||||||
|
0x70003000 0x3e0 >; /* Mux registers */
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -25,6 +25,11 @@ apb {
|
||||||
dbgu: serial@fffff200 {
|
dbgu: serial@fffff200 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
macb0: ethernet@fffc4000 {
|
||||||
|
phy-mode = "rmii";
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -68,7 +68,6 @@ CONFIG_MTD_CFI=y
|
||||||
CONFIG_MTD_CFI_ADV_OPTIONS=y
|
CONFIG_MTD_CFI_ADV_OPTIONS=y
|
||||||
CONFIG_MTD_CFI_GEOMETRY=y
|
CONFIG_MTD_CFI_GEOMETRY=y
|
||||||
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
|
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
|
||||||
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
|
|
||||||
# CONFIG_MTD_CFI_I2 is not set
|
# CONFIG_MTD_CFI_I2 is not set
|
||||||
CONFIG_MTD_CFI_INTELEXT=y
|
CONFIG_MTD_CFI_INTELEXT=y
|
||||||
CONFIG_MTD_PHYSMAP=y
|
CONFIG_MTD_PHYSMAP=y
|
||||||
|
|
|
||||||
|
|
@ -48,7 +48,6 @@ CONFIG_MACH_SX1=y
|
||||||
CONFIG_MACH_NOKIA770=y
|
CONFIG_MACH_NOKIA770=y
|
||||||
CONFIG_MACH_AMS_DELTA=y
|
CONFIG_MACH_AMS_DELTA=y
|
||||||
CONFIG_MACH_OMAP_GENERIC=y
|
CONFIG_MACH_OMAP_GENERIC=y
|
||||||
CONFIG_OMAP_ARM_182MHZ=y
|
|
||||||
# CONFIG_ARM_THUMB is not set
|
# CONFIG_ARM_THUMB is not set
|
||||||
CONFIG_PCCARD=y
|
CONFIG_PCCARD=y
|
||||||
CONFIG_OMAP_CF=y
|
CONFIG_OMAP_CF=y
|
||||||
|
|
|
||||||
|
|
@ -1,175 +0,0 @@
|
||||||
CONFIG_EXPERIMENTAL=y
|
|
||||||
CONFIG_CROSS_COMPILE="/opt/arm-2010q1/bin/arm-none-linux-gnueabi-"
|
|
||||||
# CONFIG_LOCALVERSION_AUTO is not set
|
|
||||||
# CONFIG_SWAP is not set
|
|
||||||
CONFIG_SYSVIPC=y
|
|
||||||
CONFIG_POSIX_MQUEUE=y
|
|
||||||
CONFIG_TREE_PREEMPT_RCU=y
|
|
||||||
CONFIG_IKCONFIG=y
|
|
||||||
CONFIG_IKCONFIG_PROC=y
|
|
||||||
CONFIG_LOG_BUF_SHIFT=14
|
|
||||||
CONFIG_NAMESPACES=y
|
|
||||||
CONFIG_BLK_DEV_INITRD=y
|
|
||||||
CONFIG_EXPERT=y
|
|
||||||
# CONFIG_SYSCTL_SYSCALL is not set
|
|
||||||
# CONFIG_KALLSYMS is not set
|
|
||||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
|
||||||
# CONFIG_COMPAT_BRK is not set
|
|
||||||
CONFIG_SLAB=y
|
|
||||||
CONFIG_MODULES=y
|
|
||||||
CONFIG_MODULE_UNLOAD=y
|
|
||||||
# CONFIG_LBDAF is not set
|
|
||||||
# CONFIG_BLK_DEV_BSG is not set
|
|
||||||
CONFIG_DEFAULT_DEADLINE=y
|
|
||||||
CONFIG_ARCH_AT91=y
|
|
||||||
CONFIG_ARCH_AT91SAM9G20=y
|
|
||||||
CONFIG_MACH_PCONTROL_G20=y
|
|
||||||
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
|
|
||||||
CONFIG_NO_HZ=y
|
|
||||||
CONFIG_HIGH_RES_TIMERS=y
|
|
||||||
CONFIG_PREEMPT=y
|
|
||||||
CONFIG_AEABI=y
|
|
||||||
# CONFIG_OABI_COMPAT is not set
|
|
||||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
|
||||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
|
||||||
CONFIG_CMDLINE="console=ttyS0,115200 mem=128M mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) root=/dev/mmcblk0p1 rootwait rw"
|
|
||||||
CONFIG_VFP=y
|
|
||||||
CONFIG_BINFMT_MISC=y
|
|
||||||
CONFIG_NET=y
|
|
||||||
CONFIG_PACKET=y
|
|
||||||
CONFIG_UNIX=y
|
|
||||||
CONFIG_INET=y
|
|
||||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
|
||||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
|
||||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
|
||||||
# CONFIG_INET_LRO is not set
|
|
||||||
# CONFIG_IPV6 is not set
|
|
||||||
CONFIG_VLAN_8021Q=y
|
|
||||||
# CONFIG_WIRELESS is not set
|
|
||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
|
||||||
# CONFIG_FW_LOADER is not set
|
|
||||||
CONFIG_MTD=y
|
|
||||||
CONFIG_MTD_PARTITIONS=y
|
|
||||||
CONFIG_MTD_CMDLINE_PARTS=y
|
|
||||||
CONFIG_MTD_CHAR=y
|
|
||||||
CONFIG_MTD_BLOCK=y
|
|
||||||
CONFIG_MTD_COMPLEX_MAPPINGS=y
|
|
||||||
CONFIG_MTD_PHRAM=m
|
|
||||||
CONFIG_MTD_NAND=y
|
|
||||||
CONFIG_MTD_NAND_ATMEL=y
|
|
||||||
CONFIG_BLK_DEV_LOOP=y
|
|
||||||
CONFIG_BLK_DEV_RAM=y
|
|
||||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
|
||||||
CONFIG_ATMEL_TCLIB=y
|
|
||||||
CONFIG_EEPROM_AT24=m
|
|
||||||
CONFIG_SCSI=m
|
|
||||||
# CONFIG_SCSI_PROC_FS is not set
|
|
||||||
CONFIG_BLK_DEV_SD=m
|
|
||||||
CONFIG_SCSI_MULTI_LUN=y
|
|
||||||
# CONFIG_SCSI_LOWLEVEL is not set
|
|
||||||
CONFIG_NETDEVICES=y
|
|
||||||
CONFIG_MACVLAN=m
|
|
||||||
CONFIG_TUN=m
|
|
||||||
CONFIG_SMSC_PHY=m
|
|
||||||
CONFIG_BROADCOM_PHY=m
|
|
||||||
CONFIG_NET_ETHERNET=y
|
|
||||||
CONFIG_MII=y
|
|
||||||
CONFIG_MACB=y
|
|
||||||
CONFIG_SMSC911X=m
|
|
||||||
# CONFIG_NETDEV_1000 is not set
|
|
||||||
# CONFIG_NETDEV_10000 is not set
|
|
||||||
# CONFIG_WLAN is not set
|
|
||||||
CONFIG_PPP=m
|
|
||||||
CONFIG_PPP_ASYNC=m
|
|
||||||
CONFIG_PPP_DEFLATE=m
|
|
||||||
CONFIG_PPP_MPPE=m
|
|
||||||
CONFIG_INPUT_POLLDEV=y
|
|
||||||
CONFIG_INPUT_SPARSEKMAP=y
|
|
||||||
# CONFIG_INPUT_MOUSEDEV is not set
|
|
||||||
CONFIG_INPUT_EVDEV=m
|
|
||||||
CONFIG_INPUT_EVBUG=m
|
|
||||||
# CONFIG_KEYBOARD_ATKBD is not set
|
|
||||||
CONFIG_KEYBOARD_GPIO=m
|
|
||||||
CONFIG_KEYBOARD_MATRIX=m
|
|
||||||
# CONFIG_INPUT_MOUSE is not set
|
|
||||||
CONFIG_INPUT_TOUCHSCREEN=y
|
|
||||||
CONFIG_INPUT_MISC=y
|
|
||||||
CONFIG_INPUT_UINPUT=m
|
|
||||||
CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
|
|
||||||
# CONFIG_SERIO is not set
|
|
||||||
# CONFIG_DEVKMEM is not set
|
|
||||||
CONFIG_SERIAL_ATMEL=y
|
|
||||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
|
||||||
CONFIG_SERIAL_MAX3100=m
|
|
||||||
# CONFIG_LEGACY_PTYS is not set
|
|
||||||
# CONFIG_HW_RANDOM is not set
|
|
||||||
CONFIG_R3964=m
|
|
||||||
CONFIG_I2C=m
|
|
||||||
CONFIG_I2C_CHARDEV=m
|
|
||||||
# CONFIG_I2C_HELPER_AUTO is not set
|
|
||||||
CONFIG_I2C_GPIO=m
|
|
||||||
CONFIG_SPI=y
|
|
||||||
CONFIG_SPI_ATMEL=m
|
|
||||||
CONFIG_SPI_SPIDEV=m
|
|
||||||
CONFIG_GPIO_SYSFS=y
|
|
||||||
CONFIG_W1=m
|
|
||||||
CONFIG_W1_MASTER_GPIO=m
|
|
||||||
CONFIG_W1_SLAVE_DS2431=m
|
|
||||||
# CONFIG_HWMON is not set
|
|
||||||
CONFIG_WATCHDOG=y
|
|
||||||
CONFIG_AT91SAM9X_WATCHDOG=y
|
|
||||||
# CONFIG_MFD_SUPPORT is not set
|
|
||||||
# CONFIG_HID_SUPPORT is not set
|
|
||||||
CONFIG_USB=y
|
|
||||||
# CONFIG_USB_DEVICE_CLASS is not set
|
|
||||||
CONFIG_USB_OHCI_HCD=y
|
|
||||||
CONFIG_USB_STORAGE=m
|
|
||||||
CONFIG_USB_LIBUSUAL=y
|
|
||||||
CONFIG_USB_SERIAL=m
|
|
||||||
CONFIG_USB_SERIAL_GENERIC=y
|
|
||||||
CONFIG_USB_SERIAL_FTDI_SIO=m
|
|
||||||
CONFIG_USB_SERIAL_PL2303=m
|
|
||||||
CONFIG_USB_GADGET=y
|
|
||||||
CONFIG_USB_ZERO=m
|
|
||||||
CONFIG_USB_ETH=m
|
|
||||||
CONFIG_USB_FILE_STORAGE=m
|
|
||||||
CONFIG_USB_G_SERIAL=m
|
|
||||||
CONFIG_USB_G_HID=m
|
|
||||||
CONFIG_MMC=y
|
|
||||||
CONFIG_MMC_UNSAFE_RESUME=y
|
|
||||||
CONFIG_MMC_ATMELMCI=y
|
|
||||||
CONFIG_NEW_LEDS=y
|
|
||||||
CONFIG_LEDS_CLASS=y
|
|
||||||
CONFIG_LEDS_GPIO=y
|
|
||||||
CONFIG_LEDS_TRIGGERS=y
|
|
||||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
|
||||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
|
||||||
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
|
||||||
CONFIG_RTC_CLASS=y
|
|
||||||
CONFIG_RTC_DRV_AT91SAM9=y
|
|
||||||
CONFIG_AUXDISPLAY=y
|
|
||||||
CONFIG_UIO=y
|
|
||||||
CONFIG_UIO_PDRV=y
|
|
||||||
CONFIG_STAGING=y
|
|
||||||
# CONFIG_STAGING_EXCLUDE_BUILD is not set
|
|
||||||
CONFIG_IIO=y
|
|
||||||
CONFIG_EXT2_FS=y
|
|
||||||
CONFIG_EXT3_FS=y
|
|
||||||
# CONFIG_EXT3_FS_XATTR is not set
|
|
||||||
CONFIG_VFAT_FS=y
|
|
||||||
CONFIG_TMPFS=y
|
|
||||||
CONFIG_JFFS2_FS=y
|
|
||||||
CONFIG_NFS_FS=y
|
|
||||||
CONFIG_NFS_V3=y
|
|
||||||
CONFIG_NFS_V4=y
|
|
||||||
CONFIG_PARTITION_ADVANCED=y
|
|
||||||
CONFIG_NLS_CODEPAGE_437=y
|
|
||||||
CONFIG_NLS_CODEPAGE_850=y
|
|
||||||
CONFIG_NLS_ISO8859_1=y
|
|
||||||
CONFIG_NLS_ISO8859_15=y
|
|
||||||
CONFIG_NLS_UTF8=y
|
|
||||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
|
||||||
CONFIG_CRYPTO=y
|
|
||||||
CONFIG_CRYPTO_ANSI_CPRNG=y
|
|
||||||
# CONFIG_CRYPTO_HW is not set
|
|
||||||
CONFIG_CRC_CCITT=y
|
|
||||||
|
|
@ -9,9 +9,8 @@ CONFIG_RESOURCE_COUNTERS=y
|
||||||
CONFIG_CGROUP_SCHED=y
|
CONFIG_CGROUP_SCHED=y
|
||||||
CONFIG_RT_GROUP_SCHED=y
|
CONFIG_RT_GROUP_SCHED=y
|
||||||
CONFIG_BLK_DEV_INITRD=y
|
CONFIG_BLK_DEV_INITRD=y
|
||||||
CONFIG_EMBEDDED=y
|
|
||||||
# CONFIG_SYSCTL_SYSCALL is not set
|
|
||||||
# CONFIG_ELF_CORE is not set
|
# CONFIG_ELF_CORE is not set
|
||||||
|
CONFIG_EMBEDDED=y
|
||||||
CONFIG_SLAB=y
|
CONFIG_SLAB=y
|
||||||
CONFIG_MODULES=y
|
CONFIG_MODULES=y
|
||||||
CONFIG_MODULE_UNLOAD=y
|
CONFIG_MODULE_UNLOAD=y
|
||||||
|
|
@ -20,6 +19,8 @@ CONFIG_MODULE_FORCE_UNLOAD=y
|
||||||
# CONFIG_IOSCHED_DEADLINE is not set
|
# CONFIG_IOSCHED_DEADLINE is not set
|
||||||
# CONFIG_IOSCHED_CFQ is not set
|
# CONFIG_IOSCHED_CFQ is not set
|
||||||
CONFIG_ARCH_TEGRA=y
|
CONFIG_ARCH_TEGRA=y
|
||||||
|
CONFIG_ARCH_TEGRA_2x_SOC=y
|
||||||
|
CONFIG_ARCH_TEGRA_3x_SOC=y
|
||||||
CONFIG_MACH_HARMONY=y
|
CONFIG_MACH_HARMONY=y
|
||||||
CONFIG_MACH_KAEN=y
|
CONFIG_MACH_KAEN=y
|
||||||
CONFIG_MACH_PAZ00=y
|
CONFIG_MACH_PAZ00=y
|
||||||
|
|
@ -78,14 +79,12 @@ CONFIG_BLK_DEV_SD=y
|
||||||
# CONFIG_SCSI_LOWLEVEL is not set
|
# CONFIG_SCSI_LOWLEVEL is not set
|
||||||
CONFIG_NETDEVICES=y
|
CONFIG_NETDEVICES=y
|
||||||
CONFIG_DUMMY=y
|
CONFIG_DUMMY=y
|
||||||
CONFIG_NET_ETHERNET=y
|
|
||||||
CONFIG_R8169=y
|
CONFIG_R8169=y
|
||||||
# CONFIG_NETDEV_10000 is not set
|
|
||||||
# CONFIG_WLAN is not set
|
|
||||||
CONFIG_USB_PEGASUS=y
|
CONFIG_USB_PEGASUS=y
|
||||||
CONFIG_USB_USBNET=y
|
CONFIG_USB_USBNET=y
|
||||||
CONFIG_USB_NET_SMSC75XX=y
|
CONFIG_USB_NET_SMSC75XX=y
|
||||||
CONFIG_USB_NET_SMSC95XX=y
|
CONFIG_USB_NET_SMSC95XX=y
|
||||||
|
# CONFIG_WLAN is not set
|
||||||
# CONFIG_INPUT is not set
|
# CONFIG_INPUT is not set
|
||||||
# CONFIG_SERIO is not set
|
# CONFIG_SERIO is not set
|
||||||
# CONFIG_VT is not set
|
# CONFIG_VT is not set
|
||||||
|
|
|
||||||
|
|
@ -27,6 +27,7 @@
|
||||||
#include <asm/byteorder.h>
|
#include <asm/byteorder.h>
|
||||||
#include <asm/memory.h>
|
#include <asm/memory.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
|
#include <asm-generic/pci_iomap.h>
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ISA I/O bus memory addresses are 1:1 with the physical address.
|
* ISA I/O bus memory addresses are 1:1 with the physical address.
|
||||||
|
|
@ -306,7 +307,6 @@ extern void ioport_unmap(void __iomem *addr);
|
||||||
|
|
||||||
struct pci_dev;
|
struct pci_dev;
|
||||||
|
|
||||||
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen);
|
|
||||||
extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
|
extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
||||||
|
|
@ -3,6 +3,12 @@ if ARCH_AT91
|
||||||
config HAVE_AT91_DATAFLASH_CARD
|
config HAVE_AT91_DATAFLASH_CARD
|
||||||
bool
|
bool
|
||||||
|
|
||||||
|
config HAVE_AT91_DBGU0
|
||||||
|
bool
|
||||||
|
|
||||||
|
config HAVE_AT91_DBGU1
|
||||||
|
bool
|
||||||
|
|
||||||
config HAVE_AT91_USART3
|
config HAVE_AT91_USART3
|
||||||
bool
|
bool
|
||||||
|
|
||||||
|
|
@ -21,12 +27,14 @@ config ARCH_AT91RM9200
|
||||||
bool "AT91RM9200"
|
bool "AT91RM9200"
|
||||||
select CPU_ARM920T
|
select CPU_ARM920T
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
|
select HAVE_AT91_DBGU0
|
||||||
select HAVE_AT91_USART3
|
select HAVE_AT91_USART3
|
||||||
|
|
||||||
config ARCH_AT91SAM9260
|
config ARCH_AT91SAM9260
|
||||||
bool "AT91SAM9260 or AT91SAM9XE"
|
bool "AT91SAM9260 or AT91SAM9XE"
|
||||||
select CPU_ARM926T
|
select CPU_ARM926T
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
|
select HAVE_AT91_DBGU0
|
||||||
select HAVE_AT91_USART3
|
select HAVE_AT91_USART3
|
||||||
select HAVE_AT91_USART4
|
select HAVE_AT91_USART4
|
||||||
select HAVE_AT91_USART5
|
select HAVE_AT91_USART5
|
||||||
|
|
@ -37,11 +45,13 @@ config ARCH_AT91SAM9261
|
||||||
select CPU_ARM926T
|
select CPU_ARM926T
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
select HAVE_FB_ATMEL
|
select HAVE_FB_ATMEL
|
||||||
|
select HAVE_AT91_DBGU0
|
||||||
|
|
||||||
config ARCH_AT91SAM9G10
|
config ARCH_AT91SAM9G10
|
||||||
bool "AT91SAM9G10"
|
bool "AT91SAM9G10"
|
||||||
select CPU_ARM926T
|
select CPU_ARM926T
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
|
select HAVE_AT91_DBGU0
|
||||||
select HAVE_FB_ATMEL
|
select HAVE_FB_ATMEL
|
||||||
|
|
||||||
config ARCH_AT91SAM9263
|
config ARCH_AT91SAM9263
|
||||||
|
|
@ -50,6 +60,7 @@ config ARCH_AT91SAM9263
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
select HAVE_FB_ATMEL
|
select HAVE_FB_ATMEL
|
||||||
select HAVE_NET_MACB
|
select HAVE_NET_MACB
|
||||||
|
select HAVE_AT91_DBGU1
|
||||||
|
|
||||||
config ARCH_AT91SAM9RL
|
config ARCH_AT91SAM9RL
|
||||||
bool "AT91SAM9RL"
|
bool "AT91SAM9RL"
|
||||||
|
|
@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
select HAVE_AT91_USART3
|
select HAVE_AT91_USART3
|
||||||
select HAVE_FB_ATMEL
|
select HAVE_FB_ATMEL
|
||||||
|
select HAVE_AT91_DBGU0
|
||||||
|
|
||||||
config ARCH_AT91SAM9G20
|
config ARCH_AT91SAM9G20
|
||||||
bool "AT91SAM9G20"
|
bool "AT91SAM9G20"
|
||||||
select CPU_ARM926T
|
select CPU_ARM926T
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
|
select HAVE_AT91_DBGU0
|
||||||
select HAVE_AT91_USART3
|
select HAVE_AT91_USART3
|
||||||
select HAVE_AT91_USART4
|
select HAVE_AT91_USART4
|
||||||
select HAVE_AT91_USART5
|
select HAVE_AT91_USART5
|
||||||
|
|
@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45
|
||||||
select HAVE_AT91_USART3
|
select HAVE_AT91_USART3
|
||||||
select HAVE_FB_ATMEL
|
select HAVE_FB_ATMEL
|
||||||
select HAVE_NET_MACB
|
select HAVE_NET_MACB
|
||||||
|
select HAVE_AT91_DBGU1
|
||||||
|
|
||||||
config ARCH_AT91CAP9
|
config ARCH_AT91CAP9
|
||||||
bool "AT91CAP9"
|
bool "AT91CAP9"
|
||||||
|
|
@ -81,6 +95,7 @@ config ARCH_AT91CAP9
|
||||||
select GENERIC_CLOCKEVENTS
|
select GENERIC_CLOCKEVENTS
|
||||||
select HAVE_FB_ATMEL
|
select HAVE_FB_ATMEL
|
||||||
select HAVE_NET_MACB
|
select HAVE_NET_MACB
|
||||||
|
select HAVE_AT91_DBGU1
|
||||||
|
|
||||||
config ARCH_AT91X40
|
config ARCH_AT91X40
|
||||||
bool "AT91x40"
|
bool "AT91x40"
|
||||||
|
|
@ -510,8 +525,13 @@ config AT91_TIMER_HZ
|
||||||
choice
|
choice
|
||||||
prompt "Select a UART for early kernel messages"
|
prompt "Select a UART for early kernel messages"
|
||||||
|
|
||||||
config AT91_EARLY_DBGU
|
config AT91_EARLY_DBGU0
|
||||||
bool "DBGU"
|
bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"
|
||||||
|
depends on HAVE_AT91_DBGU0
|
||||||
|
|
||||||
|
config AT91_EARLY_DBGU1
|
||||||
|
bool "DBGU on 9263, 9g45 and cap9"
|
||||||
|
depends on HAVE_AT91_DBGU1
|
||||||
|
|
||||||
config AT91_EARLY_USART0
|
config AT91_EARLY_USART0
|
||||||
bool "USART0"
|
bool "USART0"
|
||||||
|
|
|
||||||
|
|
@ -13,7 +13,6 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <linux/module.h>
|
#include <linux/module.h>
|
||||||
#include <linux/pm.h>
|
|
||||||
|
|
||||||
#include <asm/irq.h>
|
#include <asm/irq.h>
|
||||||
#include <asm/mach/arch.h>
|
#include <asm/mach/arch.h>
|
||||||
|
|
@ -23,11 +22,11 @@
|
||||||
#include <mach/at91cap9.h>
|
#include <mach/at91cap9.h>
|
||||||
#include <mach/at91_pmc.h>
|
#include <mach/at91_pmc.h>
|
||||||
#include <mach/at91_rstc.h>
|
#include <mach/at91_rstc.h>
|
||||||
#include <mach/at91_shdwc.h>
|
|
||||||
|
|
||||||
#include "soc.h"
|
#include "soc.h"
|
||||||
#include "generic.h"
|
#include "generic.h"
|
||||||
#include "clock.h"
|
#include "clock.h"
|
||||||
|
#include "sam9_smc.h"
|
||||||
|
|
||||||
/* --------------------------------------------------------------------
|
/* --------------------------------------------------------------------
|
||||||
* Clocks
|
* Clocks
|
||||||
|
|
@ -137,7 +136,7 @@ static struct clk pwm_clk = {
|
||||||
.type = CLK_TYPE_PERIPHERAL,
|
.type = CLK_TYPE_PERIPHERAL,
|
||||||
};
|
};
|
||||||
static struct clk macb_clk = {
|
static struct clk macb_clk = {
|
||||||
.name = "macb_clk",
|
.name = "pclk",
|
||||||
.pmc_mask = 1 << AT91CAP9_ID_EMAC,
|
.pmc_mask = 1 << AT91CAP9_ID_EMAC,
|
||||||
.type = CLK_TYPE_PERIPHERAL,
|
.type = CLK_TYPE_PERIPHERAL,
|
||||||
};
|
};
|
||||||
|
|
@ -210,6 +209,8 @@ static struct clk *periph_clocks[] __initdata = {
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clk_lookup periph_clocks_lookups[] = {
|
static struct clk_lookup periph_clocks_lookups[] = {
|
||||||
|
/* One additional fake clock for macb_hclk */
|
||||||
|
CLKDEV_CON_ID("hclk", &macb_clk),
|
||||||
CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
|
CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
|
||||||
CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
|
CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
|
||||||
CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
|
CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
|
||||||
|
|
@ -221,6 +222,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||||
CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
|
CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
|
||||||
/* fake hclk clock */
|
/* fake hclk clock */
|
||||||
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
|
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
|
||||||
|
CLKDEV_CON_ID("pioA", &pioABCD_clk),
|
||||||
|
CLKDEV_CON_ID("pioB", &pioABCD_clk),
|
||||||
|
CLKDEV_CON_ID("pioC", &pioABCD_clk),
|
||||||
|
CLKDEV_CON_ID("pioD", &pioABCD_clk),
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clk_lookup usart_clocks_lookups[] = {
|
static struct clk_lookup usart_clocks_lookups[] = {
|
||||||
|
|
@ -293,23 +298,19 @@ void __init at91cap9_set_console_clock(int id)
|
||||||
* GPIO
|
* GPIO
|
||||||
* -------------------------------------------------------------------- */
|
* -------------------------------------------------------------------- */
|
||||||
|
|
||||||
static struct at91_gpio_bank at91cap9_gpio[] = {
|
static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
|
||||||
{
|
{
|
||||||
.id = AT91CAP9_ID_PIOABCD,
|
.id = AT91CAP9_ID_PIOABCD,
|
||||||
.offset = AT91_PIOA,
|
.regbase = AT91CAP9_BASE_PIOA,
|
||||||
.clock = &pioABCD_clk,
|
|
||||||
}, {
|
}, {
|
||||||
.id = AT91CAP9_ID_PIOABCD,
|
.id = AT91CAP9_ID_PIOABCD,
|
||||||
.offset = AT91_PIOB,
|
.regbase = AT91CAP9_BASE_PIOB,
|
||||||
.clock = &pioABCD_clk,
|
|
||||||
}, {
|
}, {
|
||||||
.id = AT91CAP9_ID_PIOABCD,
|
.id = AT91CAP9_ID_PIOABCD,
|
||||||
.offset = AT91_PIOC,
|
.regbase = AT91CAP9_BASE_PIOC,
|
||||||
.clock = &pioABCD_clk,
|
|
||||||
}, {
|
}, {
|
||||||
.id = AT91CAP9_ID_PIOABCD,
|
.id = AT91CAP9_ID_PIOABCD,
|
||||||
.offset = AT91_PIOD,
|
.regbase = AT91CAP9_BASE_PIOD,
|
||||||
.clock = &pioABCD_clk,
|
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -318,12 +319,6 @@ static void at91cap9_restart(char mode, const char *cmd)
|
||||||
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
|
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void at91cap9_poweroff(void)
|
|
||||||
{
|
|
||||||
at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* --------------------------------------------------------------------
|
/* --------------------------------------------------------------------
|
||||||
* AT91CAP9 processor initialization
|
* AT91CAP9 processor initialization
|
||||||
* -------------------------------------------------------------------- */
|
* -------------------------------------------------------------------- */
|
||||||
|
|
@ -333,10 +328,16 @@ static void __init at91cap9_map_io(void)
|
||||||
at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
|
at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void __init at91cap9_ioremap_registers(void)
|
||||||
|
{
|
||||||
|
at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
|
||||||
|
at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
|
||||||
|
at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
|
||||||
|
}
|
||||||
|
|
||||||
static void __init at91cap9_initialize(void)
|
static void __init at91cap9_initialize(void)
|
||||||
{
|
{
|
||||||
arm_pm_restart = at91cap9_restart;
|
arm_pm_restart = at91cap9_restart;
|
||||||
pm_power_off = at91cap9_poweroff;
|
|
||||||
at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
|
at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
|
||||||
|
|
||||||
/* Register GPIO subsystem */
|
/* Register GPIO subsystem */
|
||||||
|
|
@ -394,6 +395,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
|
||||||
struct at91_init_soc __initdata at91cap9_soc = {
|
struct at91_init_soc __initdata at91cap9_soc = {
|
||||||
.map_io = at91cap9_map_io,
|
.map_io = at91cap9_map_io,
|
||||||
.default_irq_priority = at91cap9_default_irq_priority,
|
.default_irq_priority = at91cap9_default_irq_priority,
|
||||||
|
.ioremap_registers = at91cap9_ioremap_registers,
|
||||||
.register_clocks = at91cap9_register_clocks,
|
.register_clocks = at91cap9_register_clocks,
|
||||||
.init = at91cap9_initialize,
|
.init = at91cap9_initialize,
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -76,7 +76,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
|
||||||
|
|
||||||
/* Enable VBus control for UHP ports */
|
/* Enable VBus control for UHP ports */
|
||||||
for (i = 0; i < data->ports; i++) {
|
for (i = 0; i < data->ports; i++) {
|
||||||
if (data->vbus_pin[i])
|
if (gpio_is_valid(data->vbus_pin[i]))
|
||||||
at91_set_gpio_output(data->vbus_pin[i], 0);
|
at91_set_gpio_output(data->vbus_pin[i], 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -179,7 +179,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
|
||||||
usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
|
usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
|
||||||
memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
|
memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
|
||||||
|
|
||||||
if (data && data->vbus_pin > 0) {
|
if (data && gpio_is_valid(data->vbus_pin)) {
|
||||||
at91_set_gpio_input(data->vbus_pin, 0);
|
at91_set_gpio_input(data->vbus_pin, 0);
|
||||||
at91_set_deglitch(data->vbus_pin, 1);
|
at91_set_deglitch(data->vbus_pin, 1);
|
||||||
usba_udc_data.pdata.vbus_pin = data->vbus_pin;
|
usba_udc_data.pdata.vbus_pin = data->vbus_pin;
|
||||||
|
|
@ -200,7 +200,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {}
|
||||||
|
|
||||||
#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
|
#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
|
||||||
static u64 eth_dmamask = DMA_BIT_MASK(32);
|
static u64 eth_dmamask = DMA_BIT_MASK(32);
|
||||||
static struct at91_eth_data eth_data;
|
static struct macb_platform_data eth_data;
|
||||||
|
|
||||||
static struct resource eth_resources[] = {
|
static struct resource eth_resources[] = {
|
||||||
[0] = {
|
[0] = {
|
||||||
|
|
@ -227,12 +227,12 @@ static struct platform_device at91cap9_eth_device = {
|
||||||
.num_resources = ARRAY_SIZE(eth_resources),
|
.num_resources = ARRAY_SIZE(eth_resources),
|
||||||
};
|
};
|
||||||
|
|
||||||
void __init at91_add_device_eth(struct at91_eth_data *data)
|
void __init at91_add_device_eth(struct macb_platform_data *data)
|
||||||
{
|
{
|
||||||
if (!data)
|
if (!data)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
if (data->phy_irq_pin) {
|
if (gpio_is_valid(data->phy_irq_pin)) {
|
||||||
at91_set_gpio_input(data->phy_irq_pin, 0);
|
at91_set_gpio_input(data->phy_irq_pin, 0);
|
||||||
at91_set_deglitch(data->phy_irq_pin, 1);
|
at91_set_deglitch(data->phy_irq_pin, 1);
|
||||||
}
|
}
|
||||||
|
|
@ -264,7 +264,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
|
||||||
platform_device_register(&at91cap9_eth_device);
|
platform_device_register(&at91cap9_eth_device);
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
void __init at91_add_device_eth(struct at91_eth_data *data) {}
|
void __init at91_add_device_eth(struct macb_platform_data *data) {}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -332,13 +332,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
/* input/irq */
|
/* input/irq */
|
||||||
if (data->det_pin) {
|
if (gpio_is_valid(data->det_pin)) {
|
||||||
at91_set_gpio_input(data->det_pin, 1);
|
at91_set_gpio_input(data->det_pin, 1);
|
||||||
at91_set_deglitch(data->det_pin, 1);
|
at91_set_deglitch(data->det_pin, 1);
|
||||||
}
|
}
|
||||||
if (data->wp_pin)
|
if (gpio_is_valid(data->wp_pin))
|
||||||
at91_set_gpio_input(data->wp_pin, 1);
|
at91_set_gpio_input(data->wp_pin, 1);
|
||||||
if (data->vcc_pin)
|
if (gpio_is_valid(data->vcc_pin))
|
||||||
at91_set_gpio_output(data->vcc_pin, 0);
|
at91_set_gpio_output(data->vcc_pin, 0);
|
||||||
|
|
||||||
if (mmc_id == 0) { /* MCI0 */
|
if (mmc_id == 0) { /* MCI0 */
|
||||||
|
|
@ -398,8 +398,8 @@ static struct resource nand_resources[] = {
|
||||||
.flags = IORESOURCE_MEM,
|
.flags = IORESOURCE_MEM,
|
||||||
},
|
},
|
||||||
[1] = {
|
[1] = {
|
||||||
.start = AT91_BASE_SYS + AT91_ECC,
|
.start = AT91CAP9_BASE_ECC,
|
||||||
.end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
|
.end = AT91CAP9_BASE_ECC + SZ_512 - 1,
|
||||||
.flags = IORESOURCE_MEM,
|
.flags = IORESOURCE_MEM,
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
@ -425,15 +425,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
|
||||||
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
|
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
|
||||||
|
|
||||||
/* enable pin */
|
/* enable pin */
|
||||||
if (data->enable_pin)
|
if (gpio_is_valid(data->enable_pin))
|
||||||
at91_set_gpio_output(data->enable_pin, 1);
|
at91_set_gpio_output(data->enable_pin, 1);
|
||||||
|
|
||||||
/* ready/busy pin */
|
/* ready/busy pin */
|
||||||
if (data->rdy_pin)
|
if (gpio_is_valid(data->rdy_pin))
|
||||||
at91_set_gpio_input(data->rdy_pin, 1);
|
at91_set_gpio_input(data->rdy_pin, 1);
|
||||||
|
|
||||||
/* card detect pin */
|
/* card detect pin */
|
||||||
if (data->det_pin)
|
if (gpio_is_valid(data->det_pin))
|
||||||
at91_set_gpio_input(data->det_pin, 1);
|
at91_set_gpio_input(data->det_pin, 1);
|
||||||
|
|
||||||
nand_data = *data;
|
nand_data = *data;
|
||||||
|
|
@ -670,8 +670,8 @@ static void __init at91_add_device_tc(void) { }
|
||||||
|
|
||||||
static struct resource rtt_resources[] = {
|
static struct resource rtt_resources[] = {
|
||||||
{
|
{
|
||||||
.start = AT91_BASE_SYS + AT91_RTT,
|
.start = AT91CAP9_BASE_RTT,
|
||||||
.end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
|
.end = AT91CAP9_BASE_RTT + SZ_16 - 1,
|
||||||
.flags = IORESOURCE_MEM,
|
.flags = IORESOURCE_MEM,
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
@ -694,10 +694,19 @@ static void __init at91_add_device_rtt(void)
|
||||||
* -------------------------------------------------------------------- */
|
* -------------------------------------------------------------------- */
|
||||||
|
|
||||||
#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
|
#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
|
||||||
|
static struct resource wdt_resources[] = {
|
||||||
|
{
|
||||||
|
.start = AT91CAP9_BASE_WDT,
|
||||||
|
.end = AT91CAP9_BASE_WDT + SZ_16 - 1,
|
||||||
|
.flags = IORESOURCE_MEM,
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device at91cap9_wdt_device = {
|
static struct platform_device at91cap9_wdt_device = {
|
||||||
.name = "at91_wdt",
|
.name = "at91_wdt",
|
||||||
.id = -1,
|
.id = -1,
|
||||||
.num_resources = 0,
|
.resource = wdt_resources,
|
||||||
|
.num_resources = ARRAY_SIZE(wdt_resources),
|
||||||
};
|
};
|
||||||
|
|
||||||
static void __init at91_add_device_watchdog(void)
|
static void __init at91_add_device_watchdog(void)
|
||||||
|
|
@ -807,7 +816,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
|
||||||
at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */
|
at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */
|
||||||
|
|
||||||
/* reset */
|
/* reset */
|
||||||
if (data->reset_pin)
|
if (gpio_is_valid(data->reset_pin))
|
||||||
at91_set_gpio_output(data->reset_pin, 0);
|
at91_set_gpio_output(data->reset_pin, 0);
|
||||||
|
|
||||||
ac97_data = *data;
|
ac97_data = *data;
|
||||||
|
|
@ -1021,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
|
||||||
#if defined(CONFIG_SERIAL_ATMEL)
|
#if defined(CONFIG_SERIAL_ATMEL)
|
||||||
static struct resource dbgu_resources[] = {
|
static struct resource dbgu_resources[] = {
|
||||||
[0] = {
|
[0] = {
|
||||||
.start = AT91_BASE_SYS + AT91_DBGU,
|
.start = AT91CAP9_BASE_DBGU,
|
||||||
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
.end = AT91CAP9_BASE_DBGU + SZ_512 - 1,
|
||||||
.flags = IORESOURCE_MEM,
|
.flags = IORESOURCE_MEM,
|
||||||
},
|
},
|
||||||
[1] = {
|
[1] = {
|
||||||
|
|
|
||||||
|
|
@ -23,6 +23,7 @@
|
||||||
#include "soc.h"
|
#include "soc.h"
|
||||||
#include "generic.h"
|
#include "generic.h"
|
||||||
#include "clock.h"
|
#include "clock.h"
|
||||||
|
#include "sam9_smc.h"
|
||||||
|
|
||||||
static struct map_desc at91rm9200_io_desc[] __initdata = {
|
static struct map_desc at91rm9200_io_desc[] __initdata = {
|
||||||
{
|
{
|
||||||
|
|
@ -195,6 +196,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||||
CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
|
CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
|
||||||
/* fake hclk clock */
|
/* fake hclk clock */
|
||||||
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
|
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
|
||||||
|
CLKDEV_CON_ID("pioA", &pioA_clk),
|
||||||
|
CLKDEV_CON_ID("pioB", &pioB_clk),
|
||||||
|
CLKDEV_CON_ID("pioC", &pioC_clk),
|
||||||
|
CLKDEV_CON_ID("pioD", &pioD_clk),
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clk_lookup usart_clocks_lookups[] = {
|
static struct clk_lookup usart_clocks_lookups[] = {
|
||||||
|
|
@ -268,23 +273,19 @@ void __init at91rm9200_set_console_clock(int id)
|
||||||
* GPIO
|
* GPIO
|
||||||
* -------------------------------------------------------------------- */
|
* -------------------------------------------------------------------- */
|
||||||
|
|
||||||
static struct at91_gpio_bank at91rm9200_gpio[] = {
|
static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
|
||||||
{
|
{
|
||||||
.id = AT91RM9200_ID_PIOA,
|
.id = AT91RM9200_ID_PIOA,
|
||||||
.offset = AT91_PIOA,
|
.regbase = AT91RM9200_BASE_PIOA,
|
||||||
.clock = &pioA_clk,
|
|
||||||
}, {
|
}, {
|
||||||
.id = AT91RM9200_ID_PIOB,
|
.id = AT91RM9200_ID_PIOB,
|
||||||
.offset = AT91_PIOB,
|
.regbase = AT91RM9200_BASE_PIOB,
|
||||||
.clock = &pioB_clk,
|
|
||||||
}, {
|
}, {
|
||||||
.id = AT91RM9200_ID_PIOC,
|
.id = AT91RM9200_ID_PIOC,
|
||||||
.offset = AT91_PIOC,
|
.regbase = AT91RM9200_BASE_PIOC,
|
||||||
.clock = &pioC_clk,
|
|
||||||
}, {
|
}, {
|
||||||
.id = AT91RM9200_ID_PIOD,
|
.id = AT91RM9200_ID_PIOD,
|
||||||
.offset = AT91_PIOD,
|
.regbase = AT91RM9200_BASE_PIOD,
|
||||||
.clock = &pioD_clk,
|
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -307,6 +308,10 @@ static void __init at91rm9200_map_io(void)
|
||||||
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
|
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void __init at91rm9200_ioremap_registers(void)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
static void __init at91rm9200_initialize(void)
|
static void __init at91rm9200_initialize(void)
|
||||||
{
|
{
|
||||||
arm_pm_restart = at91rm9200_restart;
|
arm_pm_restart = at91rm9200_restart;
|
||||||
|
|
@ -366,6 +371,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
|
||||||
struct at91_init_soc __initdata at91rm9200_soc = {
|
struct at91_init_soc __initdata at91rm9200_soc = {
|
||||||
.map_io = at91rm9200_map_io,
|
.map_io = at91rm9200_map_io,
|
||||||
.default_irq_priority = at91rm9200_default_irq_priority,
|
.default_irq_priority = at91rm9200_default_irq_priority,
|
||||||
|
.ioremap_registers = at91rm9200_ioremap_registers,
|
||||||
.register_clocks = at91rm9200_register_clocks,
|
.register_clocks = at91rm9200_register_clocks,
|
||||||
.init = at91rm9200_initialize,
|
.init = at91rm9200_initialize,
|
||||||
};
|
};
|
||||||
|
|
|
||||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue