mirror of https://gitee.com/openkylin/linux.git
habanalabs: rename goya_non_fatal_events array to all events
The goya_non_fatal_events array actually contains all the possible events the driver can receive from the F/W. Therefore, use a proper name for the array. The patch also adds missing event Ids to the goya_async_event_id enum. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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@ -176,9 +176,7 @@ static u64 goya_mmu_regs[GOYA_MMU_REGS_NUM] = {
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mmMME_WBC_CONTROL_DATA
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};
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#define GOYA_ASYC_EVENT_GROUP_NON_FATAL_SIZE 121
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static u32 goya_non_fatal_events[GOYA_ASYC_EVENT_GROUP_NON_FATAL_SIZE] = {
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static u32 goya_all_events[] = {
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GOYA_ASYNC_EVENT_ID_PCIE_IF,
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GOYA_ASYNC_EVENT_ID_TPC0_ECC,
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GOYA_ASYNC_EVENT_ID_TPC1_ECC,
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@ -4627,8 +4625,8 @@ static int goya_soft_reset_late_init(struct hl_device *hdev)
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* Unmask all IRQs since some could have been received
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* during the soft reset
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*/
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return goya_unmask_irq_arr(hdev, goya_non_fatal_events,
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sizeof(goya_non_fatal_events));
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return goya_unmask_irq_arr(hdev, goya_all_events,
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sizeof(goya_all_events));
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}
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static int goya_unmask_irq(struct hl_device *hdev, u16 event_type)
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@ -9,7 +9,9 @@
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#define __GOYA_ASYNC_EVENTS_H_
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enum goya_async_event_id {
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GOYA_ASYNC_EVENT_ID_PCIE_CORE = 32,
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GOYA_ASYNC_EVENT_ID_PCIE_IF = 33,
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GOYA_ASYNC_EVENT_ID_PCIE_PHY = 34,
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GOYA_ASYNC_EVENT_ID_TPC0_ECC = 36,
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GOYA_ASYNC_EVENT_ID_TPC1_ECC = 39,
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GOYA_ASYNC_EVENT_ID_TPC2_ECC = 42,
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@ -23,6 +25,8 @@ enum goya_async_event_id {
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GOYA_ASYNC_EVENT_ID_MMU_ECC = 63,
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GOYA_ASYNC_EVENT_ID_DMA_MACRO = 64,
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GOYA_ASYNC_EVENT_ID_DMA_ECC = 66,
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GOYA_ASYNC_EVENT_ID_DDR0_PARITY = 69,
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GOYA_ASYNC_EVENT_ID_DDR1_PARITY = 72,
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GOYA_ASYNC_EVENT_ID_CPU_IF_ECC = 75,
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GOYA_ASYNC_EVENT_ID_PSOC_MEM = 78,
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GOYA_ASYNC_EVENT_ID_PSOC_CORESIGHT = 79,
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@ -72,6 +76,7 @@ enum goya_async_event_id {
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GOYA_ASYNC_EVENT_ID_MME_WACSD = 142,
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GOYA_ASYNC_EVENT_ID_PLL0 = 143,
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GOYA_ASYNC_EVENT_ID_PLL1 = 144,
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GOYA_ASYNC_EVENT_ID_PLL2 = 145,
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GOYA_ASYNC_EVENT_ID_PLL3 = 146,
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GOYA_ASYNC_EVENT_ID_PLL4 = 147,
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GOYA_ASYNC_EVENT_ID_PLL5 = 148,
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@ -81,6 +86,7 @@ enum goya_async_event_id {
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GOYA_ASYNC_EVENT_ID_PSOC = 160,
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GOYA_ASYNC_EVENT_ID_PCIE_FLR = 171,
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GOYA_ASYNC_EVENT_ID_PCIE_HOT_RESET = 172,
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GOYA_ASYNC_EVENT_ID_PCIE_PERST = 173,
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GOYA_ASYNC_EVENT_ID_PCIE_QID0_ENG0 = 174,
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GOYA_ASYNC_EVENT_ID_PCIE_QID0_ENG1 = 175,
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GOYA_ASYNC_EVENT_ID_PCIE_QID0_ENG2 = 176,
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@ -144,8 +150,11 @@ enum goya_async_event_id {
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GOYA_ASYNC_EVENT_ID_PSOC_GPIO_U16_0 = 330,
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GOYA_ASYNC_EVENT_ID_PSOC_GPIO_U16_1 = 331,
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GOYA_ASYNC_EVENT_ID_PSOC_GPIO_U16_2 = 332,
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GOYA_ASYNC_EVENT_ID_PSOC_GPIO_U16_3 = 333,
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GOYA_ASYNC_EVENT_ID_PSOC_GPIO_U16_4 = 334,
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GOYA_ASYNC_EVENT_ID_PSOC_GPIO_05_SW_RESET = 356,
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GOYA_ASYNC_EVENT_ID_PSOC_GPIO_10_VRHOT_ICRIT = 361,
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GOYA_ASYNC_EVENT_ID_FAN = 425,
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GOYA_ASYNC_EVENT_ID_TPC0_CMDQ = 430,
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GOYA_ASYNC_EVENT_ID_TPC1_CMDQ = 431,
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GOYA_ASYNC_EVENT_ID_TPC2_CMDQ = 432,
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