mirror of https://gitee.com/openkylin/linux.git
staging: comedi: s526: don't dereference insn->data pointer
The comedi_insn 'data' pointer is a __user pointer that is passed into the kernel using an ioctl. The comedi core copies this data to kernel space in do_insnlist_ioctl() and then passes that kernel data to the drivers as a separate parameter. The drivers never need to access the data through the insn->data pointer. This fixes a number of sparse warnings about: warning: dereference of noderef expression Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -256,14 +256,13 @@ static int s526_gpct_insn_config(struct comedi_device *dev,
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subdev_channel); */
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for (i = 0; i < MAX_GPCT_CONFIG_DATA; i++) {
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devpriv->s526_gpct_config[subdev_channel].data[i] =
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insn->data[i];
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/* printk("data[%d]=%x\n", i, insn->data[i]); */
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devpriv->s526_gpct_config[subdev_channel].data[i] = data[i];
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/* printk("data[%d]=%x\n", i, data[i]); */
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}
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/* Check what type of Counter the user requested, data[0] contains */
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/* the Application type */
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switch (insn->data[0]) {
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switch (data[0]) {
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case INSN_CONFIG_GPCT_QUADRATURE_ENCODER:
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/*
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data[0]: Application Type
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@ -307,7 +306,7 @@ static int s526_gpct_insn_config(struct comedi_device *dev,
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#if 1
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/* Set Counter Mode Register */
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cmReg.value = insn->data[1] & 0xFFFF;
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cmReg.value = data[1] & 0xFFFF;
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/* printk("s526: Counter Mode register=%x\n", cmReg.value); */
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outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));
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@ -325,39 +324,39 @@ static int s526_gpct_insn_config(struct comedi_device *dev,
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cmReg.reg.countDirCtrl = 0;
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/* data[1] contains GPCT_X1, GPCT_X2 or GPCT_X4 */
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if (insn->data[1] == GPCT_X2)
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if (data[1] == GPCT_X2)
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cmReg.reg.clockSource = 1;
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else if (insn->data[1] == GPCT_X4)
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else if (data[1] == GPCT_X4)
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cmReg.reg.clockSource = 2;
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else
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cmReg.reg.clockSource = 0;
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/* When to take into account the indexpulse: */
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/*if (insn->data[2] == GPCT_IndexPhaseLowLow) {
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} else if (insn->data[2] == GPCT_IndexPhaseLowHigh) {
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} else if (insn->data[2] == GPCT_IndexPhaseHighLow) {
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} else if (insn->data[2] == GPCT_IndexPhaseHighHigh) {
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/*if (data[2] == GPCT_IndexPhaseLowLow) {
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} else if (data[2] == GPCT_IndexPhaseLowHigh) {
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} else if (data[2] == GPCT_IndexPhaseHighLow) {
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} else if (data[2] == GPCT_IndexPhaseHighHigh) {
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}*/
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/* Take into account the index pulse? */
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if (insn->data[3] == GPCT_RESET_COUNTER_ON_INDEX)
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if (data[3] == GPCT_RESET_COUNTER_ON_INDEX)
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/* Auto load with INDEX^ */
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cmReg.reg.autoLoadResetRcap = 4;
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/* Set Counter Mode Register */
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cmReg.value = (short)(insn->data[1] & 0xFFFF);
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cmReg.value = (short)(data[1] & 0xFFFF);
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outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));
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/* Load the pre-load register high word */
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value = (short)((insn->data[2] >> 16) & 0xFFFF);
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value = (short)((data[2] >> 16) & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0H, subdev_channel));
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/* Load the pre-load register low word */
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value = (short)(insn->data[2] & 0xFFFF);
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value = (short)(data[2] & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0L, subdev_channel));
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/* Write the Counter Control Register */
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if (insn->data[3] != 0) {
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value = (short)(insn->data[3] & 0xFFFF);
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if (data[3] != 0) {
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value = (short)(data[3] & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0C, subdev_channel));
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}
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/* Reset the counter if it is software preload */
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@ -383,34 +382,34 @@ static int s526_gpct_insn_config(struct comedi_device *dev,
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SinglePulseGeneration;
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/* Set Counter Mode Register */
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cmReg.value = (short)(insn->data[1] & 0xFFFF);
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cmReg.value = (short)(data[1] & 0xFFFF);
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cmReg.reg.preloadRegSel = 0; /* PR0 */
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outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));
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/* Load the pre-load register 0 high word */
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value = (short)((insn->data[2] >> 16) & 0xFFFF);
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value = (short)((data[2] >> 16) & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0H, subdev_channel));
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/* Load the pre-load register 0 low word */
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value = (short)(insn->data[2] & 0xFFFF);
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value = (short)(data[2] & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0L, subdev_channel));
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/* Set Counter Mode Register */
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cmReg.value = (short)(insn->data[1] & 0xFFFF);
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cmReg.value = (short)(data[1] & 0xFFFF);
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cmReg.reg.preloadRegSel = 1; /* PR1 */
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outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));
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/* Load the pre-load register 1 high word */
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value = (short)((insn->data[3] >> 16) & 0xFFFF);
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value = (short)((data[3] >> 16) & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0H, subdev_channel));
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/* Load the pre-load register 1 low word */
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value = (short)(insn->data[3] & 0xFFFF);
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value = (short)(data[3] & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0L, subdev_channel));
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/* Write the Counter Control Register */
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if (insn->data[4] != 0) {
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value = (short)(insn->data[4] & 0xFFFF);
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if (data[4] != 0) {
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value = (short)(data[4] & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0C, subdev_channel));
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}
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break;
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@ -428,34 +427,34 @@ static int s526_gpct_insn_config(struct comedi_device *dev,
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PulseTrainGeneration;
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/* Set Counter Mode Register */
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cmReg.value = (short)(insn->data[1] & 0xFFFF);
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cmReg.value = (short)(data[1] & 0xFFFF);
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cmReg.reg.preloadRegSel = 0; /* PR0 */
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outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));
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/* Load the pre-load register 0 high word */
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value = (short)((insn->data[2] >> 16) & 0xFFFF);
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value = (short)((data[2] >> 16) & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0H, subdev_channel));
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/* Load the pre-load register 0 low word */
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value = (short)(insn->data[2] & 0xFFFF);
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value = (short)(data[2] & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0L, subdev_channel));
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/* Set Counter Mode Register */
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cmReg.value = (short)(insn->data[1] & 0xFFFF);
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cmReg.value = (short)(data[1] & 0xFFFF);
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cmReg.reg.preloadRegSel = 1; /* PR1 */
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outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));
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/* Load the pre-load register 1 high word */
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value = (short)((insn->data[3] >> 16) & 0xFFFF);
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value = (short)((data[3] >> 16) & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0H, subdev_channel));
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/* Load the pre-load register 1 low word */
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value = (short)(insn->data[3] & 0xFFFF);
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value = (short)(data[3] & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0L, subdev_channel));
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/* Write the Counter Control Register */
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if (insn->data[4] != 0) {
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value = (short)(insn->data[4] & 0xFFFF);
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if (data[4] != 0) {
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value = (short)(data[4] & 0xFFFF);
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outw(value, ADDR_CHAN_REG(REG_C0C, subdev_channel));
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}
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break;
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@ -505,14 +504,14 @@ static int s526_gpct_winsn(struct comedi_device *dev,
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pulse frequency on the selected source
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*/
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printk(KERN_INFO "S526: INSN_WRITE: PTG\n");
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if ((insn->data[1] > insn->data[0]) && (insn->data[0] > 0)) {
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if ((data[1] > data[0]) && (data[0] > 0)) {
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(devpriv->s526_gpct_config[subdev_channel]).data[0] =
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insn->data[0];
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data[0];
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(devpriv->s526_gpct_config[subdev_channel]).data[1] =
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insn->data[1];
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data[1];
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} else {
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printk(KERN_ERR "s526: INSN_WRITE: PTG: Problem with Pulse params -> %d %d\n",
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insn->data[0], insn->data[1]);
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data[0], data[1]);
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return -EINVAL;
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}
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