mirror of https://gitee.com/openkylin/linux.git
mtd: remove bcmring NAND driver
This driver is being removed as part of the cleanup of the bcmring SoC from mainline as it is no longer maintained. Signed-off-by: Christian Daudt <csd@broadcom.com> Reviewed-by: Jiandong Zheng <jdzheng@broadcom.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Christian Daudt
David Woodhouse
parent
5ca7f41528
commit
b2bc415b6b
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@ -665,15 +665,6 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: arch/arm/mach-bcmring
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ARM/BCMRING MTD NAND DRIVER
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M: Jiandong Zheng <jdzheng@broadcom.com>
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M: Scott Branden <sbranden@broadcom.com>
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L: linux-mtd@lists.infradead.org
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S: Maintained
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F: drivers/mtd/nand/bcm_umi_nand.c
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F: drivers/mtd/nand/bcm_umi_bch.c
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F: drivers/mtd/nand/nand_bcm_umi.h
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ARM/CALXEDA HIGHBANK ARCHITECTURE
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M: Rob Herring <rob.herring@calxeda.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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@ -258,22 +258,6 @@ config MTD_NAND_S3C2410_CLKSTOP
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when the is NAND chip selected or released, but will save
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approximately 5mA of power when there is nothing happening.
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config MTD_NAND_BCM_UMI
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tristate "NAND Flash support for BCM Reference Boards"
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depends on ARCH_BCMRING
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help
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This enables the NAND flash controller on the BCM UMI block.
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No board specific support is done by this driver, each board
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must advertise a platform_device for the driver to attach.
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config MTD_NAND_BCM_UMI_HWCS
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bool "BCM UMI NAND Hardware CS"
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depends on MTD_NAND_BCM_UMI
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help
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Enable the use of the BCM UMI block's internal CS using NAND.
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This should only be used if you know the external NAND CS can toggle.
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config MTD_NAND_DISKONCHIP
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tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation) (EXPERIMENTAL)"
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depends on EXPERIMENTAL
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@ -48,7 +48,6 @@ obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o
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obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o
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obj-$(CONFIG_MTD_NAND_NUC900) += nuc900_nand.o
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obj-$(CONFIG_MTD_NAND_NOMADIK) += nomadik_nand.o
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obj-$(CONFIG_MTD_NAND_BCM_UMI) += bcm_umi_nand.o nand_bcm_umi.o
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obj-$(CONFIG_MTD_NAND_MPC5121_NFC) += mpc5121_nfc.o
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obj-$(CONFIG_MTD_NAND_RICOH) += r852.o
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obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
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@ -1,210 +0,0 @@
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/*****************************************************************************
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* Copyright 2004 - 2009 Broadcom Corporation. All rights reserved.
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2, available at
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* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Broadcom software provided under a
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* license other than the GPL, without Broadcom's express prior written
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* consent.
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*****************************************************************************/
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/* ---- Include Files ---------------------------------------------------- */
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#include "nand_bcm_umi.h"
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/* ---- External Variable Declarations ----------------------------------- */
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/* ---- External Function Prototypes ------------------------------------- */
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/* ---- Public Variables ------------------------------------------------- */
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/* ---- Private Constants and Types -------------------------------------- */
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/* ---- Private Function Prototypes -------------------------------------- */
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static int bcm_umi_bch_read_page_hwecc(struct mtd_info *mtd,
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struct nand_chip *chip, uint8_t *buf, int oob_required, int page);
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static int bcm_umi_bch_write_page_hwecc(struct mtd_info *mtd,
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struct nand_chip *chip, const uint8_t *buf, int oob_required);
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/* ---- Private Variables ------------------------------------------------ */
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/*
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** nand_hw_eccoob
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** New oob placement block for use with hardware ecc generation.
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*/
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static struct nand_ecclayout nand_hw_eccoob_512 = {
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/* Reserve 5 for BI indicator */
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.oobfree = {
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#if (NAND_ECC_NUM_BYTES > 3)
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{.offset = 0, .length = 2}
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#else
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{.offset = 0, .length = 5},
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{.offset = 6, .length = 7}
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#endif
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}
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};
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/*
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** We treat the OOB for a 2K page as if it were 4 512 byte oobs,
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** except the BI is at byte 0.
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*/
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static struct nand_ecclayout nand_hw_eccoob_2048 = {
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/* Reserve 0 as BI indicator */
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.oobfree = {
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#if (NAND_ECC_NUM_BYTES > 10)
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{.offset = 1, .length = 2},
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#elif (NAND_ECC_NUM_BYTES > 7)
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{.offset = 1, .length = 5},
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{.offset = 16, .length = 6},
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{.offset = 32, .length = 6},
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{.offset = 48, .length = 6}
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#else
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{.offset = 1, .length = 8},
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{.offset = 16, .length = 9},
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{.offset = 32, .length = 9},
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{.offset = 48, .length = 9}
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#endif
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}
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};
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/* We treat the OOB for a 4K page as if it were 8 512 byte oobs,
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* except the BI is at byte 0. */
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static struct nand_ecclayout nand_hw_eccoob_4096 = {
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/* Reserve 0 as BI indicator */
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.oobfree = {
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#if (NAND_ECC_NUM_BYTES > 10)
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{.offset = 1, .length = 2},
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{.offset = 16, .length = 3},
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{.offset = 32, .length = 3},
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{.offset = 48, .length = 3},
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{.offset = 64, .length = 3},
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{.offset = 80, .length = 3},
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{.offset = 96, .length = 3},
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{.offset = 112, .length = 3}
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#else
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{.offset = 1, .length = 5},
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{.offset = 16, .length = 6},
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{.offset = 32, .length = 6},
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{.offset = 48, .length = 6},
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{.offset = 64, .length = 6},
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{.offset = 80, .length = 6},
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{.offset = 96, .length = 6},
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{.offset = 112, .length = 6}
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#endif
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}
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};
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/* ---- Private Functions ------------------------------------------------ */
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/* ==== Public Functions ================================================= */
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/****************************************************************************
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*
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* bcm_umi_bch_read_page_hwecc - hardware ecc based page read function
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* @mtd: mtd info structure
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* @chip: nand chip info structure
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* @buf: buffer to store read data
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* @oob_required: caller expects OOB data read to chip->oob_poi
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*
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***************************************************************************/
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static int bcm_umi_bch_read_page_hwecc(struct mtd_info *mtd,
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struct nand_chip *chip, uint8_t * buf,
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int oob_required, int page)
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{
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int sectorIdx = 0;
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int eccsize = chip->ecc.size;
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int eccsteps = chip->ecc.steps;
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uint8_t *datap = buf;
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uint8_t eccCalc[NAND_ECC_NUM_BYTES];
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int sectorOobSize = mtd->oobsize / eccsteps;
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int stat;
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unsigned int max_bitflips = 0;
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for (sectorIdx = 0; sectorIdx < eccsteps;
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sectorIdx++, datap += eccsize) {
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if (sectorIdx > 0) {
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/* Seek to page location within sector */
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chip->cmdfunc(mtd, NAND_CMD_RNDOUT, sectorIdx * eccsize,
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-1);
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}
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/* Enable hardware ECC before reading the buf */
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nand_bcm_umi_bch_enable_read_hwecc();
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/* Read in data */
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bcm_umi_nand_read_buf(mtd, datap, eccsize);
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/* Pause hardware ECC after reading the buf */
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nand_bcm_umi_bch_pause_read_ecc_calc();
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/* Read the OOB ECC */
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chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
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mtd->writesize + sectorIdx * sectorOobSize, -1);
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nand_bcm_umi_bch_read_oobEcc(mtd->writesize, eccCalc,
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NAND_ECC_NUM_BYTES,
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chip->oob_poi +
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sectorIdx * sectorOobSize);
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/* Correct any ECC detected errors */
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stat =
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nand_bcm_umi_bch_correct_page(datap, eccCalc,
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NAND_ECC_NUM_BYTES);
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/* Update Stats */
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if (stat < 0) {
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#if defined(NAND_BCM_UMI_DEBUG)
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printk(KERN_WARNING "%s uncorr_err sectorIdx=%d\n",
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__func__, sectorIdx);
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printk(KERN_WARNING "%s data %*ph\n",
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__func__, 8, datap);
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printk(KERN_WARNING "%s ecc %*ph\n",
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__func__, 13, eccCalc);
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BUG();
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#endif
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mtd->ecc_stats.failed++;
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} else {
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#if defined(NAND_BCM_UMI_DEBUG)
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if (stat > 0) {
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printk(KERN_INFO
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"%s %d correctable_errors detected\n",
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__func__, stat);
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}
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#endif
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mtd->ecc_stats.corrected += stat;
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max_bitflips = max_t(unsigned int, max_bitflips, stat);
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}
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}
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return max_bitflips;
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}
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/****************************************************************************
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*
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* bcm_umi_bch_write_page_hwecc - hardware ecc based page write function
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* @mtd: mtd info structure
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* @chip: nand chip info structure
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* @buf: data buffer
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* @oob_required: must write chip->oob_poi to OOB
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*
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***************************************************************************/
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static int bcm_umi_bch_write_page_hwecc(struct mtd_info *mtd,
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struct nand_chip *chip, const uint8_t *buf, int oob_required)
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{
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int sectorIdx = 0;
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int eccsize = chip->ecc.size;
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int eccsteps = chip->ecc.steps;
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const uint8_t *datap = buf;
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uint8_t *oobp = chip->oob_poi;
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int sectorOobSize = mtd->oobsize / eccsteps;
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for (sectorIdx = 0; sectorIdx < eccsteps;
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sectorIdx++, datap += eccsize, oobp += sectorOobSize) {
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/* Enable hardware ECC before writing the buf */
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nand_bcm_umi_bch_enable_write_hwecc();
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bcm_umi_nand_write_buf(mtd, datap, eccsize);
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nand_bcm_umi_bch_write_oobEcc(mtd->writesize, oobp,
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NAND_ECC_NUM_BYTES);
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}
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bcm_umi_nand_write_buf(mtd, chip->oob_poi, mtd->oobsize);
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return 0;
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}
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@ -1,533 +0,0 @@
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/*****************************************************************************
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* Copyright 2004 - 2009 Broadcom Corporation. All rights reserved.
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2, available at
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* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Broadcom software provided under a
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* license other than the GPL, without Broadcom's express prior written
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* consent.
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*****************************************************************************/
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/* ---- Include Files ---------------------------------------------------- */
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/ioport.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/partitions.h>
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#include <asm/mach-types.h>
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#include <mach/reg_nand.h>
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#include <mach/reg_umi.h>
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#include "nand_bcm_umi.h"
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#include <mach/memory_settings.h>
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#define USE_DMA 1
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#include <mach/dma.h>
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#include <linux/dma-mapping.h>
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#include <linux/completion.h>
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/* ---- External Variable Declarations ----------------------------------- */
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/* ---- External Function Prototypes ------------------------------------- */
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/* ---- Public Variables ------------------------------------------------- */
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/* ---- Private Constants and Types -------------------------------------- */
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static const __devinitconst char gBanner[] = KERN_INFO \
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"BCM UMI MTD NAND Driver: 1.00\n";
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#if NAND_ECC_BCH
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static uint8_t scan_ff_pattern[] = { 0xff };
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static struct nand_bbt_descr largepage_bbt = {
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.options = 0,
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.offs = 0,
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.len = 1,
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.pattern = scan_ff_pattern
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};
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#endif
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/*
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** Preallocate a buffer to avoid having to do this every dma operation.
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** This is the size of the preallocated coherent DMA buffer.
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*/
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#if USE_DMA
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#define DMA_MIN_BUFLEN 512
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#define DMA_MAX_BUFLEN PAGE_SIZE
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#define USE_DIRECT_IO(len) (((len) < DMA_MIN_BUFLEN) || \
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((len) > DMA_MAX_BUFLEN))
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/*
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* The current NAND data space goes from 0x80001900 to 0x80001FFF,
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* which is only 0x700 = 1792 bytes long. This is too small for 2K, 4K page
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* size NAND flash. Need to break the DMA down to multiple 1Ks.
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*
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* Need to make sure REG_NAND_DATA_PADDR + DMA_MAX_LEN < 0x80002000
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*/
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#define DMA_MAX_LEN 1024
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#else /* !USE_DMA */
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#define DMA_MIN_BUFLEN 0
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#define DMA_MAX_BUFLEN 0
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#define USE_DIRECT_IO(len) 1
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#endif
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/* ---- Private Function Prototypes -------------------------------------- */
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static void bcm_umi_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len);
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static void bcm_umi_nand_write_buf(struct mtd_info *mtd, const u_char * buf,
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int len);
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/* ---- Private Variables ------------------------------------------------ */
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static struct mtd_info *board_mtd;
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static void __iomem *bcm_umi_io_base;
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static void *virtPtr;
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static dma_addr_t physPtr;
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static struct completion nand_comp;
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/* ---- Private Functions ------------------------------------------------ */
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#if NAND_ECC_BCH
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#include "bcm_umi_bch.c"
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#else
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#include "bcm_umi_hamming.c"
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#endif
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#if USE_DMA
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/* Handler called when the DMA finishes. */
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static void nand_dma_handler(DMA_Device_t dev, int reason, void *userData)
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{
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complete(&nand_comp);
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}
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static int nand_dma_init(void)
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{
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int rc;
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rc = dma_set_device_handler(DMA_DEVICE_NAND_MEM_TO_MEM,
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nand_dma_handler, NULL);
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if (rc != 0) {
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printk(KERN_ERR "dma_set_device_handler failed: %d\n", rc);
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return rc;
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}
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virtPtr =
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dma_alloc_coherent(NULL, DMA_MAX_BUFLEN, &physPtr, GFP_KERNEL);
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if (virtPtr == NULL) {
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printk(KERN_ERR "NAND - Failed to allocate memory for DMA buffer\n");
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return -ENOMEM;
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}
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return 0;
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}
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static void nand_dma_term(void)
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{
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if (virtPtr != NULL)
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dma_free_coherent(NULL, DMA_MAX_BUFLEN, virtPtr, physPtr);
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}
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static void nand_dma_read(void *buf, int len)
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{
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int offset = 0;
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int tmp_len = 0;
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int len_left = len;
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DMA_Handle_t hndl;
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if (virtPtr == NULL)
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panic("nand_dma_read: virtPtr == NULL\n");
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if ((void *)physPtr == NULL)
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panic("nand_dma_read: physPtr == NULL\n");
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hndl = dma_request_channel(DMA_DEVICE_NAND_MEM_TO_MEM);
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if (hndl < 0) {
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printk(KERN_ERR
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"nand_dma_read: unable to allocate dma channel: %d\n",
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(int)hndl);
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panic("\n");
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}
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while (len_left > 0) {
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if (len_left > DMA_MAX_LEN) {
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tmp_len = DMA_MAX_LEN;
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len_left -= DMA_MAX_LEN;
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} else {
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tmp_len = len_left;
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len_left = 0;
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}
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init_completion(&nand_comp);
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dma_transfer_mem_to_mem(hndl, REG_NAND_DATA_PADDR,
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physPtr + offset, tmp_len);
|
||||
wait_for_completion(&nand_comp);
|
||||
|
||||
offset += tmp_len;
|
||||
}
|
||||
|
||||
dma_free_channel(hndl);
|
||||
|
||||
if (buf != NULL)
|
||||
memcpy(buf, virtPtr, len);
|
||||
}
|
||||
|
||||
static void nand_dma_write(const void *buf, int len)
|
||||
{
|
||||
int offset = 0;
|
||||
int tmp_len = 0;
|
||||
int len_left = len;
|
||||
DMA_Handle_t hndl;
|
||||
|
||||
if (buf == NULL)
|
||||
panic("nand_dma_write: buf == NULL\n");
|
||||
|
||||
if (virtPtr == NULL)
|
||||
panic("nand_dma_write: virtPtr == NULL\n");
|
||||
|
||||
if ((void *)physPtr == NULL)
|
||||
panic("nand_dma_write: physPtr == NULL\n");
|
||||
|
||||
memcpy(virtPtr, buf, len);
|
||||
|
||||
|
||||
hndl = dma_request_channel(DMA_DEVICE_NAND_MEM_TO_MEM);
|
||||
if (hndl < 0) {
|
||||
printk(KERN_ERR
|
||||
"nand_dma_write: unable to allocate dma channel: %d\n",
|
||||
(int)hndl);
|
||||
panic("\n");
|
||||
}
|
||||
|
||||
while (len_left > 0) {
|
||||
if (len_left > DMA_MAX_LEN) {
|
||||
tmp_len = DMA_MAX_LEN;
|
||||
len_left -= DMA_MAX_LEN;
|
||||
} else {
|
||||
tmp_len = len_left;
|
||||
len_left = 0;
|
||||
}
|
||||
|
||||
init_completion(&nand_comp);
|
||||
dma_transfer_mem_to_mem(hndl, physPtr + offset,
|
||||
REG_NAND_DATA_PADDR, tmp_len);
|
||||
wait_for_completion(&nand_comp);
|
||||
|
||||
offset += tmp_len;
|
||||
}
|
||||
|
||||
dma_free_channel(hndl);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
static int nand_dev_ready(struct mtd_info *mtd)
|
||||
{
|
||||
return nand_bcm_umi_dev_ready();
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
*
|
||||
* bcm_umi_nand_inithw
|
||||
*
|
||||
* This routine does the necessary hardware (board-specific)
|
||||
* initializations. This includes setting up the timings, etc.
|
||||
*
|
||||
***************************************************************************/
|
||||
int bcm_umi_nand_inithw(void)
|
||||
{
|
||||
/* Configure nand timing parameters */
|
||||
REG_UMI_NAND_TCR &= ~0x7ffff;
|
||||
REG_UMI_NAND_TCR |= HW_CFG_NAND_TCR;
|
||||
|
||||
#if !defined(CONFIG_MTD_NAND_BCM_UMI_HWCS)
|
||||
/* enable software control of CS */
|
||||
REG_UMI_NAND_TCR |= REG_UMI_NAND_TCR_CS_SWCTRL;
|
||||
#endif
|
||||
|
||||
/* keep NAND chip select asserted */
|
||||
REG_UMI_NAND_RCSR |= REG_UMI_NAND_RCSR_CS_ASSERTED;
|
||||
|
||||
REG_UMI_NAND_TCR &= ~REG_UMI_NAND_TCR_WORD16;
|
||||
/* enable writes to flash */
|
||||
REG_UMI_MMD_ICR |= REG_UMI_MMD_ICR_FLASH_WP;
|
||||
|
||||
writel(NAND_CMD_RESET, bcm_umi_io_base + REG_NAND_CMD_OFFSET);
|
||||
nand_bcm_umi_wait_till_ready();
|
||||
|
||||
#if NAND_ECC_BCH
|
||||
nand_bcm_umi_bch_config_ecc(NAND_ECC_NUM_BYTES);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Used to turn latch the proper register for access. */
|
||||
static void bcm_umi_nand_hwcontrol(struct mtd_info *mtd, int cmd,
|
||||
unsigned int ctrl)
|
||||
{
|
||||
/* send command to hardware */
|
||||
struct nand_chip *chip = mtd->priv;
|
||||
if (ctrl & NAND_CTRL_CHANGE) {
|
||||
if (ctrl & NAND_CLE) {
|
||||
chip->IO_ADDR_W = bcm_umi_io_base + REG_NAND_CMD_OFFSET;
|
||||
goto CMD;
|
||||
}
|
||||
if (ctrl & NAND_ALE) {
|
||||
chip->IO_ADDR_W =
|
||||
bcm_umi_io_base + REG_NAND_ADDR_OFFSET;
|
||||
goto CMD;
|
||||
}
|
||||
chip->IO_ADDR_W = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
|
||||
}
|
||||
|
||||
CMD:
|
||||
/* Send command to chip directly */
|
||||
if (cmd != NAND_CMD_NONE)
|
||||
writeb(cmd, chip->IO_ADDR_W);
|
||||
}
|
||||
|
||||
static void bcm_umi_nand_write_buf(struct mtd_info *mtd, const u_char * buf,
|
||||
int len)
|
||||
{
|
||||
if (USE_DIRECT_IO(len)) {
|
||||
/* Do it the old way if the buffer is small or too large.
|
||||
* Probably quicker than starting and checking dma. */
|
||||
int i;
|
||||
struct nand_chip *this = mtd->priv;
|
||||
|
||||
for (i = 0; i < len; i++)
|
||||
writeb(buf[i], this->IO_ADDR_W);
|
||||
}
|
||||
#if USE_DMA
|
||||
else
|
||||
nand_dma_write(buf, len);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void bcm_umi_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len)
|
||||
{
|
||||
if (USE_DIRECT_IO(len)) {
|
||||
int i;
|
||||
struct nand_chip *this = mtd->priv;
|
||||
|
||||
for (i = 0; i < len; i++)
|
||||
buf[i] = readb(this->IO_ADDR_R);
|
||||
}
|
||||
#if USE_DMA
|
||||
else
|
||||
nand_dma_read(buf, len);
|
||||
#endif
|
||||
}
|
||||
|
||||
static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct nand_chip *this;
|
||||
struct resource *r;
|
||||
int err = 0;
|
||||
|
||||
printk(gBanner);
|
||||
|
||||
/* Allocate memory for MTD device structure and private data */
|
||||
board_mtd =
|
||||
kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip),
|
||||
GFP_KERNEL);
|
||||
if (!board_mtd) {
|
||||
printk(KERN_WARNING
|
||||
"Unable to allocate NAND MTD device structure.\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
|
||||
if (!r) {
|
||||
err = -ENXIO;
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
/* map physical address */
|
||||
bcm_umi_io_base = ioremap(r->start, resource_size(r));
|
||||
|
||||
if (!bcm_umi_io_base) {
|
||||
printk(KERN_ERR "ioremap to access BCM UMI NAND chip failed\n");
|
||||
err = -EIO;
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
/* Get pointer to private data */
|
||||
this = (struct nand_chip *)(&board_mtd[1]);
|
||||
|
||||
/* Initialize structures */
|
||||
memset((char *)board_mtd, 0, sizeof(struct mtd_info));
|
||||
memset((char *)this, 0, sizeof(struct nand_chip));
|
||||
|
||||
/* Link the private data with the MTD structure */
|
||||
board_mtd->priv = this;
|
||||
|
||||
/* Initialize the NAND hardware. */
|
||||
if (bcm_umi_nand_inithw() < 0) {
|
||||
printk(KERN_ERR "BCM UMI NAND chip could not be initialized\n");
|
||||
err = -EIO;
|
||||
goto out_unmap;
|
||||
}
|
||||
|
||||
/* Set address of NAND IO lines */
|
||||
this->IO_ADDR_W = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
|
||||
this->IO_ADDR_R = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
|
||||
|
||||
/* Set command delay time, see datasheet for correct value */
|
||||
this->chip_delay = 0;
|
||||
/* Assign the device ready function, if available */
|
||||
this->dev_ready = nand_dev_ready;
|
||||
this->options = 0;
|
||||
|
||||
this->write_buf = bcm_umi_nand_write_buf;
|
||||
this->read_buf = bcm_umi_nand_read_buf;
|
||||
|
||||
this->cmd_ctrl = bcm_umi_nand_hwcontrol;
|
||||
this->ecc.mode = NAND_ECC_HW;
|
||||
this->ecc.size = 512;
|
||||
this->ecc.bytes = NAND_ECC_NUM_BYTES;
|
||||
#if NAND_ECC_BCH
|
||||
this->ecc.read_page = bcm_umi_bch_read_page_hwecc;
|
||||
this->ecc.write_page = bcm_umi_bch_write_page_hwecc;
|
||||
#else
|
||||
this->ecc.correct = nand_correct_data512;
|
||||
this->ecc.calculate = bcm_umi_hamming_get_hw_ecc;
|
||||
this->ecc.hwctl = bcm_umi_hamming_enable_hwecc;
|
||||
#endif
|
||||
|
||||
#if USE_DMA
|
||||
err = nand_dma_init();
|
||||
if (err != 0)
|
||||
goto out_unmap;
|
||||
#endif
|
||||
|
||||
/* Figure out the size of the device that we have.
|
||||
* We need to do this to figure out which ECC
|
||||
* layout we'll be using.
|
||||
*/
|
||||
|
||||
err = nand_scan_ident(board_mtd, 1, NULL);
|
||||
if (err) {
|
||||
printk(KERN_ERR "nand_scan failed: %d\n", err);
|
||||
goto out_unmap;
|
||||
}
|
||||
|
||||
/* Now that we know the nand size, we can setup the ECC layout */
|
||||
|
||||
switch (board_mtd->writesize) { /* writesize is the pagesize */
|
||||
case 4096:
|
||||
this->ecc.layout = &nand_hw_eccoob_4096;
|
||||
break;
|
||||
case 2048:
|
||||
this->ecc.layout = &nand_hw_eccoob_2048;
|
||||
break;
|
||||
case 512:
|
||||
this->ecc.layout = &nand_hw_eccoob_512;
|
||||
break;
|
||||
default:
|
||||
{
|
||||
printk(KERN_ERR "NAND - Unrecognized pagesize: %d\n",
|
||||
board_mtd->writesize);
|
||||
err = -EINVAL;
|
||||
goto out_unmap;
|
||||
}
|
||||
}
|
||||
|
||||
#if NAND_ECC_BCH
|
||||
if (board_mtd->writesize > 512) {
|
||||
if (this->bbt_options & NAND_BBT_USE_FLASH)
|
||||
largepage_bbt.options = NAND_BBT_SCAN2NDPAGE;
|
||||
this->badblock_pattern = &largepage_bbt;
|
||||
}
|
||||
|
||||
this->ecc.strength = 8;
|
||||
|
||||
#endif
|
||||
|
||||
/* Now finish off the scan, now that ecc.layout has been initialized. */
|
||||
|
||||
err = nand_scan_tail(board_mtd);
|
||||
if (err) {
|
||||
printk(KERN_ERR "nand_scan failed: %d\n", err);
|
||||
goto out_unmap;
|
||||
}
|
||||
|
||||
/* Register the partitions */
|
||||
board_mtd->name = "bcm_umi-nand";
|
||||
mtd_device_parse_register(board_mtd, NULL, NULL, NULL, 0);
|
||||
|
||||
/* Return happy */
|
||||
return 0;
|
||||
out_unmap:
|
||||
iounmap(bcm_umi_io_base);
|
||||
out_free:
|
||||
kfree(board_mtd);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int bcm_umi_nand_remove(struct platform_device *pdev)
|
||||
{
|
||||
#if USE_DMA
|
||||
nand_dma_term();
|
||||
#endif
|
||||
|
||||
/* Release resources, unregister device */
|
||||
nand_release(board_mtd);
|
||||
|
||||
/* unmap physical address */
|
||||
iounmap(bcm_umi_io_base);
|
||||
|
||||
/* Free the MTD device structure */
|
||||
kfree(board_mtd);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int bcm_umi_nand_suspend(struct platform_device *pdev,
|
||||
pm_message_t state)
|
||||
{
|
||||
printk(KERN_ERR "MTD NAND suspend is being called\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm_umi_nand_resume(struct platform_device *pdev)
|
||||
{
|
||||
printk(KERN_ERR "MTD NAND resume is being called\n");
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
#define bcm_umi_nand_suspend NULL
|
||||
#define bcm_umi_nand_resume NULL
|
||||
#endif
|
||||
|
||||
static struct platform_driver nand_driver = {
|
||||
.driver = {
|
||||
.name = "bcm-nand",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.probe = bcm_umi_nand_probe,
|
||||
.remove = bcm_umi_nand_remove,
|
||||
.suspend = bcm_umi_nand_suspend,
|
||||
.resume = bcm_umi_nand_resume,
|
||||
};
|
||||
|
||||
module_platform_driver(nand_driver);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Broadcom");
|
||||
MODULE_DESCRIPTION("BCM UMI MTD NAND driver");
|
||||
|
|
@ -1,149 +0,0 @@
|
|||
/*****************************************************************************
|
||||
* Copyright 2004 - 2009 Broadcom Corporation. All rights reserved.
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2, available at
|
||||
* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
|
||||
*
|
||||
* Notwithstanding the above, under no circumstances may you combine this
|
||||
* software in any way with any other Broadcom software provided under a
|
||||
* license other than the GPL, without Broadcom's express prior written
|
||||
* consent.
|
||||
*****************************************************************************/
|
||||
|
||||
/* ---- Include Files ---------------------------------------------------- */
|
||||
#include <mach/reg_umi.h>
|
||||
#include "nand_bcm_umi.h"
|
||||
#ifdef BOOT0_BUILD
|
||||
#include <uart.h>
|
||||
#endif
|
||||
|
||||
/* ---- External Variable Declarations ----------------------------------- */
|
||||
/* ---- External Function Prototypes ------------------------------------- */
|
||||
/* ---- Public Variables ------------------------------------------------- */
|
||||
/* ---- Private Constants and Types -------------------------------------- */
|
||||
/* ---- Private Function Prototypes -------------------------------------- */
|
||||
/* ---- Private Variables ------------------------------------------------ */
|
||||
/* ---- Private Functions ------------------------------------------------ */
|
||||
|
||||
#if NAND_ECC_BCH
|
||||
/****************************************************************************
|
||||
* nand_bch_ecc_flip_bit - Routine to flip an errored bit
|
||||
*
|
||||
* PURPOSE:
|
||||
* This is a helper routine that flips the bit (0 -> 1 or 1 -> 0) of the
|
||||
* errored bit specified
|
||||
*
|
||||
* PARAMETERS:
|
||||
* datap - Container that holds the 512 byte data
|
||||
* errorLocation - Location of the bit that needs to be flipped
|
||||
*
|
||||
* RETURNS:
|
||||
* None
|
||||
****************************************************************************/
|
||||
static void nand_bcm_umi_bch_ecc_flip_bit(uint8_t *datap, int errorLocation)
|
||||
{
|
||||
int locWithinAByte = (errorLocation & REG_UMI_BCH_ERR_LOC_BYTE) >> 0;
|
||||
int locWithinAWord = (errorLocation & REG_UMI_BCH_ERR_LOC_WORD) >> 3;
|
||||
int locWithinAPage = (errorLocation & REG_UMI_BCH_ERR_LOC_PAGE) >> 5;
|
||||
|
||||
uint8_t errorByte = 0;
|
||||
uint8_t byteMask = 1 << locWithinAByte;
|
||||
|
||||
/* BCH uses big endian, need to change the location
|
||||
* bits to little endian */
|
||||
locWithinAWord = 3 - locWithinAWord;
|
||||
|
||||
errorByte = datap[locWithinAPage * sizeof(uint32_t) + locWithinAWord];
|
||||
|
||||
#ifdef BOOT0_BUILD
|
||||
puthexs("\nECC Correct Offset: ",
|
||||
locWithinAPage * sizeof(uint32_t) + locWithinAWord);
|
||||
puthexs(" errorByte:", errorByte);
|
||||
puthex8(" Bit: ", locWithinAByte);
|
||||
#endif
|
||||
|
||||
if (errorByte & byteMask) {
|
||||
/* bit needs to be cleared */
|
||||
errorByte &= ~byteMask;
|
||||
} else {
|
||||
/* bit needs to be set */
|
||||
errorByte |= byteMask;
|
||||
}
|
||||
|
||||
/* write back the value with the fixed bit */
|
||||
datap[locWithinAPage * sizeof(uint32_t) + locWithinAWord] = errorByte;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* nand_correct_page_bch - Routine to correct bit errors when reading NAND
|
||||
*
|
||||
* PURPOSE:
|
||||
* This routine reads the BCH registers to determine if there are any bit
|
||||
* errors during the read of the last 512 bytes of data + ECC bytes. If
|
||||
* errors exists, the routine fixes it.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* datap - Container that holds the 512 byte data
|
||||
*
|
||||
* RETURNS:
|
||||
* 0 or greater = Number of errors corrected
|
||||
* (No errors are found or errors have been fixed)
|
||||
* -1 = Error(s) cannot be fixed
|
||||
****************************************************************************/
|
||||
int nand_bcm_umi_bch_correct_page(uint8_t *datap, uint8_t *readEccData,
|
||||
int numEccBytes)
|
||||
{
|
||||
int numErrors;
|
||||
int errorLocation;
|
||||
int idx;
|
||||
uint32_t regValue;
|
||||
|
||||
/* wait for read ECC to be valid */
|
||||
regValue = nand_bcm_umi_bch_poll_read_ecc_calc();
|
||||
|
||||
/*
|
||||
* read the control status register to determine if there
|
||||
* are error'ed bits
|
||||
* see if errors are correctible
|
||||
*/
|
||||
if ((regValue & REG_UMI_BCH_CTRL_STATUS_UNCORR_ERR) > 0) {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < numEccBytes; i++) {
|
||||
if (readEccData[i] != 0xff) {
|
||||
/* errors cannot be fixed, return -1 */
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
/* If ECC is unprogrammed then we can't correct,
|
||||
* assume everything OK */
|
||||
return 0;
|
||||
}
|
||||
|
||||
if ((regValue & REG_UMI_BCH_CTRL_STATUS_CORR_ERR) == 0) {
|
||||
/* no errors */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Fix errored bits by doing the following:
|
||||
* 1. Read the number of errors in the control and status register
|
||||
* 2. Read the error location registers that corresponds to the number
|
||||
* of errors reported
|
||||
* 3. Invert the bit in the data
|
||||
*/
|
||||
numErrors = (regValue & REG_UMI_BCH_CTRL_STATUS_NB_CORR_ERROR) >> 20;
|
||||
|
||||
for (idx = 0; idx < numErrors; idx++) {
|
||||
errorLocation =
|
||||
REG_UMI_BCH_ERR_LOC_ADDR(idx) & REG_UMI_BCH_ERR_LOC_MASK;
|
||||
|
||||
/* Flip bit */
|
||||
nand_bcm_umi_bch_ecc_flip_bit(datap, errorLocation);
|
||||
}
|
||||
/* Errors corrected */
|
||||
return numErrors;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -1,337 +0,0 @@
|
|||
/*****************************************************************************
|
||||
* Copyright 2003 - 2009 Broadcom Corporation. All rights reserved.
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2, available at
|
||||
* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
|
||||
*
|
||||
* Notwithstanding the above, under no circumstances may you combine this
|
||||
* software in any way with any other Broadcom software provided under a
|
||||
* license other than the GPL, without Broadcom's express prior written
|
||||
* consent.
|
||||
*****************************************************************************/
|
||||
#ifndef NAND_BCM_UMI_H
|
||||
#define NAND_BCM_UMI_H
|
||||
|
||||
/* ---- Include Files ---------------------------------------------------- */
|
||||
#include <mach/reg_umi.h>
|
||||
#include <mach/reg_nand.h>
|
||||
#include <cfg_global.h>
|
||||
|
||||
/* ---- Constants and Types ---------------------------------------------- */
|
||||
#if (CFG_GLOBAL_CHIP_FAMILY == CFG_GLOBAL_CHIP_FAMILY_BCMRING)
|
||||
#define NAND_ECC_BCH (CFG_GLOBAL_CHIP_REV > 0xA0)
|
||||
#else
|
||||
#define NAND_ECC_BCH 0
|
||||
#endif
|
||||
|
||||
#define CFG_GLOBAL_NAND_ECC_BCH_NUM_BYTES 13
|
||||
|
||||
#if NAND_ECC_BCH
|
||||
#ifdef BOOT0_BUILD
|
||||
#define NAND_ECC_NUM_BYTES 13
|
||||
#else
|
||||
#define NAND_ECC_NUM_BYTES CFG_GLOBAL_NAND_ECC_BCH_NUM_BYTES
|
||||
#endif
|
||||
#else
|
||||
#define NAND_ECC_NUM_BYTES 3
|
||||
#endif
|
||||
|
||||
#define NAND_DATA_ACCESS_SIZE 512
|
||||
|
||||
/* ---- Variable Externs ------------------------------------------ */
|
||||
/* ---- Function Prototypes --------------------------------------- */
|
||||
int nand_bcm_umi_bch_correct_page(uint8_t *datap, uint8_t *readEccData,
|
||||
int numEccBytes);
|
||||
|
||||
/* Check in device is ready */
|
||||
static inline int nand_bcm_umi_dev_ready(void)
|
||||
{
|
||||
return REG_UMI_NAND_RCSR & REG_UMI_NAND_RCSR_RDY;
|
||||
}
|
||||
|
||||
/* Wait until device is ready */
|
||||
static inline void nand_bcm_umi_wait_till_ready(void)
|
||||
{
|
||||
while (nand_bcm_umi_dev_ready() == 0)
|
||||
;
|
||||
}
|
||||
|
||||
/* Enable Hamming ECC */
|
||||
static inline void nand_bcm_umi_hamming_enable_hwecc(void)
|
||||
{
|
||||
/* disable and reset ECC, 512 byte page */
|
||||
REG_UMI_NAND_ECC_CSR &= ~(REG_UMI_NAND_ECC_CSR_ECC_ENABLE |
|
||||
REG_UMI_NAND_ECC_CSR_256BYTE);
|
||||
/* enable ECC */
|
||||
REG_UMI_NAND_ECC_CSR |= REG_UMI_NAND_ECC_CSR_ECC_ENABLE;
|
||||
}
|
||||
|
||||
#if NAND_ECC_BCH
|
||||
/* BCH ECC specifics */
|
||||
#define ECC_BITS_PER_CORRECTABLE_BIT 13
|
||||
|
||||
/* Enable BCH Read ECC */
|
||||
static inline void nand_bcm_umi_bch_enable_read_hwecc(void)
|
||||
{
|
||||
/* disable and reset ECC */
|
||||
REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID;
|
||||
/* Turn on ECC */
|
||||
REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN;
|
||||
}
|
||||
|
||||
/* Enable BCH Write ECC */
|
||||
static inline void nand_bcm_umi_bch_enable_write_hwecc(void)
|
||||
{
|
||||
/* disable and reset ECC */
|
||||
REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID;
|
||||
/* Turn on ECC */
|
||||
REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_ECC_WR_EN;
|
||||
}
|
||||
|
||||
/* Config number of BCH ECC bytes */
|
||||
static inline void nand_bcm_umi_bch_config_ecc(uint8_t numEccBytes)
|
||||
{
|
||||
uint32_t nValue;
|
||||
uint32_t tValue;
|
||||
uint32_t kValue;
|
||||
uint32_t numBits = numEccBytes * 8;
|
||||
|
||||
/* disable and reset ECC */
|
||||
REG_UMI_BCH_CTRL_STATUS =
|
||||
REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID |
|
||||
REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID;
|
||||
|
||||
/* Every correctible bit requires 13 ECC bits */
|
||||
tValue = (uint32_t) (numBits / ECC_BITS_PER_CORRECTABLE_BIT);
|
||||
|
||||
/* Total data in number of bits for generating and computing BCH ECC */
|
||||
nValue = (NAND_DATA_ACCESS_SIZE + numEccBytes) * 8;
|
||||
|
||||
/* K parameter is used internally. K = N - (T * 13) */
|
||||
kValue = nValue - (tValue * ECC_BITS_PER_CORRECTABLE_BIT);
|
||||
|
||||
/* Write the settings */
|
||||
REG_UMI_BCH_N = nValue;
|
||||
REG_UMI_BCH_T = tValue;
|
||||
REG_UMI_BCH_K = kValue;
|
||||
}
|
||||
|
||||
/* Pause during ECC read calculation to skip bytes in OOB */
|
||||
static inline void nand_bcm_umi_bch_pause_read_ecc_calc(void)
|
||||
{
|
||||
REG_UMI_BCH_CTRL_STATUS =
|
||||
REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN |
|
||||
REG_UMI_BCH_CTRL_STATUS_PAUSE_ECC_DEC;
|
||||
}
|
||||
|
||||
/* Resume during ECC read calculation after skipping bytes in OOB */
|
||||
static inline void nand_bcm_umi_bch_resume_read_ecc_calc(void)
|
||||
{
|
||||
REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN;
|
||||
}
|
||||
|
||||
/* Poll read ECC calc to check when hardware completes */
|
||||
static inline uint32_t nand_bcm_umi_bch_poll_read_ecc_calc(void)
|
||||
{
|
||||
uint32_t regVal;
|
||||
|
||||
do {
|
||||
/* wait for ECC to be valid */
|
||||
regVal = REG_UMI_BCH_CTRL_STATUS;
|
||||
} while ((regVal & REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID) == 0);
|
||||
|
||||
return regVal;
|
||||
}
|
||||
|
||||
/* Poll write ECC calc to check when hardware completes */
|
||||
static inline void nand_bcm_umi_bch_poll_write_ecc_calc(void)
|
||||
{
|
||||
/* wait for ECC to be valid */
|
||||
while ((REG_UMI_BCH_CTRL_STATUS & REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID)
|
||||
== 0)
|
||||
;
|
||||
}
|
||||
|
||||
/* Read the OOB and ECC, for kernel write OOB to a buffer */
|
||||
#if defined(__KERNEL__) && !defined(STANDALONE)
|
||||
static inline void nand_bcm_umi_bch_read_oobEcc(uint32_t pageSize,
|
||||
uint8_t *eccCalc, int numEccBytes, uint8_t *oobp)
|
||||
#else
|
||||
static inline void nand_bcm_umi_bch_read_oobEcc(uint32_t pageSize,
|
||||
uint8_t *eccCalc, int numEccBytes)
|
||||
#endif
|
||||
{
|
||||
int eccPos = 0;
|
||||
int numToRead = 16; /* There are 16 bytes per sector in the OOB */
|
||||
|
||||
/* ECC is already paused when this function is called */
|
||||
if (pageSize != NAND_DATA_ACCESS_SIZE) {
|
||||
/* skip BI */
|
||||
#if defined(__KERNEL__) && !defined(STANDALONE)
|
||||
*oobp++ = REG_NAND_DATA8;
|
||||
#else
|
||||
REG_NAND_DATA8;
|
||||
#endif
|
||||
numToRead--;
|
||||
}
|
||||
|
||||
while (numToRead > numEccBytes) {
|
||||
/* skip free oob region */
|
||||
#if defined(__KERNEL__) && !defined(STANDALONE)
|
||||
*oobp++ = REG_NAND_DATA8;
|
||||
#else
|
||||
REG_NAND_DATA8;
|
||||
#endif
|
||||
numToRead--;
|
||||
}
|
||||
|
||||
if (pageSize == NAND_DATA_ACCESS_SIZE) {
|
||||
/* read ECC bytes before BI */
|
||||
nand_bcm_umi_bch_resume_read_ecc_calc();
|
||||
|
||||
while (numToRead > 11) {
|
||||
#if defined(__KERNEL__) && !defined(STANDALONE)
|
||||
*oobp = REG_NAND_DATA8;
|
||||
eccCalc[eccPos++] = *oobp;
|
||||
oobp++;
|
||||
#else
|
||||
eccCalc[eccPos++] = REG_NAND_DATA8;
|
||||
#endif
|
||||
numToRead--;
|
||||
}
|
||||
|
||||
nand_bcm_umi_bch_pause_read_ecc_calc();
|
||||
|
||||
if (numToRead == 11) {
|
||||
/* read BI */
|
||||
#if defined(__KERNEL__) && !defined(STANDALONE)
|
||||
*oobp++ = REG_NAND_DATA8;
|
||||
#else
|
||||
REG_NAND_DATA8;
|
||||
#endif
|
||||
numToRead--;
|
||||
}
|
||||
|
||||
}
|
||||
/* read ECC bytes */
|
||||
nand_bcm_umi_bch_resume_read_ecc_calc();
|
||||
while (numToRead) {
|
||||
#if defined(__KERNEL__) && !defined(STANDALONE)
|
||||
*oobp = REG_NAND_DATA8;
|
||||
eccCalc[eccPos++] = *oobp;
|
||||
oobp++;
|
||||
#else
|
||||
eccCalc[eccPos++] = REG_NAND_DATA8;
|
||||
#endif
|
||||
numToRead--;
|
||||
}
|
||||
}
|
||||
|
||||
/* Helper function to write ECC */
|
||||
static inline void NAND_BCM_UMI_ECC_WRITE(int numEccBytes, int eccBytePos,
|
||||
uint8_t *oobp, uint8_t eccVal)
|
||||
{
|
||||
if (eccBytePos <= numEccBytes)
|
||||
*oobp = eccVal;
|
||||
}
|
||||
|
||||
/* Write OOB with ECC */
|
||||
static inline void nand_bcm_umi_bch_write_oobEcc(uint32_t pageSize,
|
||||
uint8_t *oobp, int numEccBytes)
|
||||
{
|
||||
uint32_t eccVal = 0xffffffff;
|
||||
|
||||
/* wait for write ECC to be valid */
|
||||
nand_bcm_umi_bch_poll_write_ecc_calc();
|
||||
|
||||
/*
|
||||
** Get the hardware ecc from the 32-bit result registers.
|
||||
** Read after 512 byte accesses. Format B3B2B1B0
|
||||
** where B3 = ecc3, etc.
|
||||
*/
|
||||
|
||||
if (pageSize == NAND_DATA_ACCESS_SIZE) {
|
||||
/* Now fill in the ECC bytes */
|
||||
if (numEccBytes >= 13)
|
||||
eccVal = REG_UMI_BCH_WR_ECC_3;
|
||||
|
||||
/* Usually we skip CM in oob[0,1] */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 15, &oobp[0],
|
||||
(eccVal >> 16) & 0xff);
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 14, &oobp[1],
|
||||
(eccVal >> 8) & 0xff);
|
||||
|
||||
/* Write ECC in oob[2,3,4] */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 13, &oobp[2],
|
||||
eccVal & 0xff); /* ECC 12 */
|
||||
|
||||
if (numEccBytes >= 9)
|
||||
eccVal = REG_UMI_BCH_WR_ECC_2;
|
||||
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 12, &oobp[3],
|
||||
(eccVal >> 24) & 0xff); /* ECC11 */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 11, &oobp[4],
|
||||
(eccVal >> 16) & 0xff); /* ECC10 */
|
||||
|
||||
/* Always Skip BI in oob[5] */
|
||||
} else {
|
||||
/* Always Skip BI in oob[0] */
|
||||
|
||||
/* Now fill in the ECC bytes */
|
||||
if (numEccBytes >= 13)
|
||||
eccVal = REG_UMI_BCH_WR_ECC_3;
|
||||
|
||||
/* Usually skip CM in oob[1,2] */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 15, &oobp[1],
|
||||
(eccVal >> 16) & 0xff);
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 14, &oobp[2],
|
||||
(eccVal >> 8) & 0xff);
|
||||
|
||||
/* Write ECC in oob[3-15] */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 13, &oobp[3],
|
||||
eccVal & 0xff); /* ECC12 */
|
||||
|
||||
if (numEccBytes >= 9)
|
||||
eccVal = REG_UMI_BCH_WR_ECC_2;
|
||||
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 12, &oobp[4],
|
||||
(eccVal >> 24) & 0xff); /* ECC11 */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 11, &oobp[5],
|
||||
(eccVal >> 16) & 0xff); /* ECC10 */
|
||||
}
|
||||
|
||||
/* Fill in the remainder of ECC locations */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 10, &oobp[6],
|
||||
(eccVal >> 8) & 0xff); /* ECC9 */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 9, &oobp[7],
|
||||
eccVal & 0xff); /* ECC8 */
|
||||
|
||||
if (numEccBytes >= 5)
|
||||
eccVal = REG_UMI_BCH_WR_ECC_1;
|
||||
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 8, &oobp[8],
|
||||
(eccVal >> 24) & 0xff); /* ECC7 */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 7, &oobp[9],
|
||||
(eccVal >> 16) & 0xff); /* ECC6 */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 6, &oobp[10],
|
||||
(eccVal >> 8) & 0xff); /* ECC5 */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 5, &oobp[11],
|
||||
eccVal & 0xff); /* ECC4 */
|
||||
|
||||
if (numEccBytes >= 1)
|
||||
eccVal = REG_UMI_BCH_WR_ECC_0;
|
||||
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 4, &oobp[12],
|
||||
(eccVal >> 24) & 0xff); /* ECC3 */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 3, &oobp[13],
|
||||
(eccVal >> 16) & 0xff); /* ECC2 */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 2, &oobp[14],
|
||||
(eccVal >> 8) & 0xff); /* ECC1 */
|
||||
NAND_BCM_UMI_ECC_WRITE(numEccBytes, 1, &oobp[15],
|
||||
eccVal & 0xff); /* ECC0 */
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* NAND_BCM_UMI_H */
|
||||
Loading…
Reference in New Issue