mirror of https://gitee.com/openkylin/linux.git
usb: xhci-mtk: add an optional xhci_ck clock
Some SoCs may have an optional clock xhci_ck (125M or 200M), it usually uses the same PLL as sys_ck, so support it. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/1566542425-20082-2-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -216,6 +216,10 @@ static int xhci_mtk_clks_get(struct xhci_hcd_mtk *mtk)
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return PTR_ERR(mtk->sys_clk);
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}
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mtk->xhci_clk = devm_clk_get_optional(dev, "xhci_ck");
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if (IS_ERR(mtk->xhci_clk))
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return PTR_ERR(mtk->xhci_clk);
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mtk->ref_clk = devm_clk_get_optional(dev, "ref_ck");
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if (IS_ERR(mtk->ref_clk))
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return PTR_ERR(mtk->ref_clk);
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@ -244,6 +248,12 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
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goto sys_clk_err;
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}
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ret = clk_prepare_enable(mtk->xhci_clk);
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if (ret) {
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dev_err(mtk->dev, "failed to enable xhci_clk\n");
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goto xhci_clk_err;
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}
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ret = clk_prepare_enable(mtk->mcu_clk);
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if (ret) {
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dev_err(mtk->dev, "failed to enable mcu_clk\n");
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@ -261,6 +271,8 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
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dma_clk_err:
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clk_disable_unprepare(mtk->mcu_clk);
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mcu_clk_err:
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clk_disable_unprepare(mtk->xhci_clk);
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xhci_clk_err:
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clk_disable_unprepare(mtk->sys_clk);
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sys_clk_err:
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clk_disable_unprepare(mtk->ref_clk);
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@ -272,6 +284,7 @@ static void xhci_mtk_clks_disable(struct xhci_hcd_mtk *mtk)
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{
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clk_disable_unprepare(mtk->dma_clk);
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clk_disable_unprepare(mtk->mcu_clk);
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clk_disable_unprepare(mtk->xhci_clk);
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clk_disable_unprepare(mtk->sys_clk);
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clk_disable_unprepare(mtk->ref_clk);
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}
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@ -139,6 +139,7 @@ struct xhci_hcd_mtk {
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struct regulator *vusb33;
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struct regulator *vbus;
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struct clk *sys_clk; /* sys and mac clock */
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struct clk *xhci_clk;
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struct clk *ref_clk;
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struct clk *mcu_clk;
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struct clk *dma_clk;
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