mirror of https://gitee.com/openkylin/linux.git
staging:iio:adc: Add SPEAr ADC driver
This patch implements the basic single data conversion support for the SPEAr600 SoC ADC. The register layout of SPEAr600 differs a bit from other SPEAr SoC variants (e.g. SPEAr3xx). These differences are handled via DT compatible testing. Resulting in a multi-arch binary. This driver is currently tested only on SPEAr600. Future patches may add support for other SoC variants (SPEAr3xx) and features like software buffer or DMA. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Jonathan Cameron <jic23@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Stefan Roese
Greg Kroah-Hartman
parent
6d59ba2f96
commit
b3201b563d
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@ -0,0 +1,26 @@
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* ST SPEAr ADC device driver
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Required properties:
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- compatible: Should be "st,spear600-adc"
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- reg: Address and length of the register set for the device
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- interrupt-parent: Should be the phandle for the interrupt controller
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that services interrupts for this device
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- interrupts: Should contain the ADC interrupt
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- sampling-frequency: Default sampling frequency
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Optional properties:
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- vref-external: External voltage reference in milli-volts. If omitted
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the internal voltage reference will be used.
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- average-samples: Number of samples to generate an average value. If
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omitted, single data conversion will be used.
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Examples:
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adc: adc@d8200000 {
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compatible = "st,spear600-adc";
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reg = <0xd8200000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <6>;
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sampling-frequency = <5000000>;
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vref-external = <2500>; /* 2.5V VRef */
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};
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@ -202,4 +202,11 @@ config LPC32XX_ADC
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touchscreen driver, so you can only select one of the two drivers
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(lpc32xx_adc or lpc32xx_ts). Provides direct access via sysfs.
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config SPEAR_ADC
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tristate "ST SPEAr ADC"
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depends on PLAT_SPEAR
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help
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Say yes here to build support for the integrated ADC inside the
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ST SPEAr SoC. Provides direct access via sysfs.
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endmenu
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@ -38,3 +38,4 @@ obj-$(CONFIG_ADT7310) += adt7310.o
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obj-$(CONFIG_ADT7410) += adt7410.o
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obj-$(CONFIG_AD7280) += ad7280a.o
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obj-$(CONFIG_LPC32XX_ADC) += lpc32xx_adc.o
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obj-$(CONFIG_SPEAR_ADC) += spear_adc.o
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@ -0,0 +1,447 @@
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/*
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* ST SPEAr ADC driver
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*
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* Copyright 2012 Stefan Roese <sr@denx.de>
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/completion.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include "../iio.h"
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#include "../sysfs.h"
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/*
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* SPEAR registers definitions
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*/
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#define SCAN_RATE_LO(x) ((x) & 0xFFFF)
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#define SCAN_RATE_HI(x) (((x) >> 0x10) & 0xFFFF)
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#define CLK_LOW(x) (((x) & 0xf) << 0)
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#define CLK_HIGH(x) (((x) & 0xf) << 4)
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/* Bit definitions for SPEAR_ADC_STATUS */
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#define START_CONVERSION (1 << 0)
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#define CHANNEL_NUM(x) ((x) << 1)
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#define ADC_ENABLE (1 << 4)
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#define AVG_SAMPLE(x) ((x) << 5)
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#define VREF_INTERNAL (1 << 9)
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#define DATA_MASK 0x03ff
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#define DATA_BITS 10
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#define MOD_NAME "spear-adc"
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#define ADC_CHANNEL_NUM 8
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#define CLK_MIN 2500000
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#define CLK_MAX 20000000
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struct adc_regs_spear3xx {
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u32 status;
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u32 average;
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u32 scan_rate;
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u32 clk; /* Not avail for 1340 & 1310 */
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u32 ch_ctrl[ADC_CHANNEL_NUM];
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u32 ch_data[ADC_CHANNEL_NUM];
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};
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struct chan_data {
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u32 lsb;
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u32 msb;
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};
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struct adc_regs_spear6xx {
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u32 status;
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u32 pad[2];
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u32 clk;
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u32 ch_ctrl[ADC_CHANNEL_NUM];
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struct chan_data ch_data[ADC_CHANNEL_NUM];
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u32 scan_rate_lo;
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u32 scan_rate_hi;
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struct chan_data average;
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};
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struct spear_adc_info {
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struct device_node *np;
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struct adc_regs_spear3xx __iomem *adc_base_spear3xx;
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struct adc_regs_spear6xx __iomem *adc_base_spear6xx;
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struct clk *clk;
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struct completion completion;
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u32 current_clk;
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u32 sampling_freq;
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u32 avg_samples;
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u32 vref_external;
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u32 value;
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};
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/*
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* Functions to access some SPEAr ADC register. Abstracted into
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* static inline functions, because of different register offsets
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* on different SoC variants (SPEAr300 vs SPEAr600 etc).
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*/
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static void spear_adc_set_status(struct spear_adc_info *info, u32 val)
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{
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__raw_writel(val, &info->adc_base_spear6xx->status);
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}
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static void spear_adc_set_clk(struct spear_adc_info *info, u32 val)
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{
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u32 clk_high, clk_low, count;
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u32 apb_clk = clk_get_rate(info->clk);
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count = (apb_clk + val - 1) / val;
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clk_low = count / 2;
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clk_high = count - clk_low;
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info->current_clk = apb_clk / count;
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__raw_writel(CLK_LOW(clk_low) | CLK_HIGH(clk_high),
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&info->adc_base_spear6xx->clk);
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}
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static void spear_adc_set_ctrl(struct spear_adc_info *info, int n,
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u32 val)
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{
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__raw_writel(val, &info->adc_base_spear6xx->ch_ctrl[n]);
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}
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static u32 spear_adc_get_average(struct spear_adc_info *info)
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{
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if (of_device_is_compatible(info->np, "st,spear600-adc")) {
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return __raw_readl(&info->adc_base_spear6xx->average.msb) &
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DATA_MASK;
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} else {
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return __raw_readl(&info->adc_base_spear3xx->average) &
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DATA_MASK;
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}
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}
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static void spear_adc_set_scanrate(struct spear_adc_info *info, u32 rate)
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{
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if (of_device_is_compatible(info->np, "st,spear600-adc")) {
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__raw_writel(SCAN_RATE_LO(rate),
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&info->adc_base_spear6xx->scan_rate_lo);
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__raw_writel(SCAN_RATE_HI(rate),
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&info->adc_base_spear6xx->scan_rate_hi);
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} else {
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__raw_writel(rate, &info->adc_base_spear3xx->scan_rate);
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}
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}
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static int spear_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long mask)
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{
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struct spear_adc_info *info = iio_priv(indio_dev);
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u32 scale_mv;
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u32 status;
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switch (mask) {
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case 0:
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mutex_lock(&indio_dev->mlock);
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status = CHANNEL_NUM(chan->channel) |
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AVG_SAMPLE(info->avg_samples) |
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START_CONVERSION | ADC_ENABLE;
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if (info->vref_external == 0)
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status |= VREF_INTERNAL;
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spear_adc_set_status(info, status);
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wait_for_completion(&info->completion); /* set by ISR */
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*val = info->value;
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mutex_unlock(&indio_dev->mlock);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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scale_mv = (info->vref_external * 1000) >> DATA_BITS;
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*val = scale_mv / 1000;
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*val2 = (scale_mv % 1000) * 1000;
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return IIO_VAL_INT_PLUS_MICRO;
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}
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return -EINVAL;
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}
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#define SPEAR_ADC_CHAN(idx) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, \
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.channel = idx, \
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.scan_type = { \
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.sign = 'u', \
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.storagebits = 16, \
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}, \
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}
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static struct iio_chan_spec spear_adc_iio_channels[] = {
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SPEAR_ADC_CHAN(0),
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SPEAR_ADC_CHAN(1),
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SPEAR_ADC_CHAN(2),
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SPEAR_ADC_CHAN(3),
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SPEAR_ADC_CHAN(4),
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SPEAR_ADC_CHAN(5),
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SPEAR_ADC_CHAN(6),
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SPEAR_ADC_CHAN(7),
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};
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static irqreturn_t spear_adc_isr(int irq, void *dev_id)
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{
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struct spear_adc_info *info = (struct spear_adc_info *)dev_id;
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/* Read value to clear IRQ */
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info->value = spear_adc_get_average(info);
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complete(&info->completion);
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return IRQ_HANDLED;
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}
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static int spear_adc_configure(struct spear_adc_info *info)
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{
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int i;
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/* Reset ADC core */
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spear_adc_set_status(info, 0);
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__raw_writel(0, &info->adc_base_spear6xx->clk);
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for (i = 0; i < 8; i++)
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spear_adc_set_ctrl(info, i, 0);
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spear_adc_set_scanrate(info, 0);
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spear_adc_set_clk(info, info->sampling_freq);
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return 0;
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}
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static ssize_t spear_adc_read_frequency(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct spear_adc_info *info = iio_priv(indio_dev);
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return sprintf(buf, "%d\n", info->current_clk);
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}
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static ssize_t spear_adc_write_frequency(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct spear_adc_info *info = iio_priv(indio_dev);
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u32 clk_high, clk_low, count;
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u32 apb_clk = clk_get_rate(info->clk);
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unsigned long lval;
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int ret;
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ret = kstrtoul(buf, 10, &lval);
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if (ret)
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return ret;
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mutex_lock(&indio_dev->mlock);
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if ((lval < CLK_MIN) || (lval > CLK_MAX)) {
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ret = -EINVAL;
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goto out;
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}
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count = (apb_clk + lval - 1) / lval;
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clk_low = count / 2;
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clk_high = count - clk_low;
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info->current_clk = apb_clk / count;
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spear_adc_set_clk(info, lval);
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out:
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mutex_unlock(&indio_dev->mlock);
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return ret ? ret : len;
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}
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static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
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spear_adc_read_frequency,
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spear_adc_write_frequency);
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static struct attribute *spear_attributes[] = {
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&iio_dev_attr_sampling_frequency.dev_attr.attr,
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NULL
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};
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static const struct attribute_group spear_attribute_group = {
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.attrs = spear_attributes,
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};
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static const struct iio_info spear_adc_iio_info = {
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.read_raw = &spear_read_raw,
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.attrs = &spear_attribute_group,
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.driver_module = THIS_MODULE,
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};
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static int __devinit spear_adc_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct device *dev = &pdev->dev;
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struct spear_adc_info *info;
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struct iio_dev *iodev = NULL;
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int ret = -ENODEV;
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int irq;
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iodev = iio_allocate_device(sizeof(struct spear_adc_info));
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if (!iodev) {
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dev_err(dev, "failed allocating iio device\n");
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ret = -ENOMEM;
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goto errout1;
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}
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info = iio_priv(iodev);
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info->np = np;
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/*
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* SPEAr600 has a different register layout than other SPEAr SoC's
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* (e.g. SPEAr3xx). Let's provide two register base addresses
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* to support multi-arch kernels.
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*/
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info->adc_base_spear6xx = of_iomap(np, 0);
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if (!info->adc_base_spear6xx) {
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dev_err(dev, "failed mapping memory\n");
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ret = -ENOMEM;
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goto errout2;
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}
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info->adc_base_spear3xx =
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(struct adc_regs_spear3xx *)info->adc_base_spear6xx;
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info->clk = clk_get(dev, NULL);
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if (IS_ERR(info->clk)) {
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dev_err(dev, "failed getting clock\n");
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goto errout3;
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}
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ret = clk_prepare(info->clk);
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if (ret) {
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dev_err(dev, "failed preparing clock\n");
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goto errout4;
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}
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ret = clk_enable(info->clk);
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if (ret) {
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dev_err(dev, "failed enabling clock\n");
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goto errout5;
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}
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irq = platform_get_irq(pdev, 0);
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if ((irq < 0) || (irq >= NR_IRQS)) {
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dev_err(dev, "failed getting interrupt resource\n");
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ret = -EINVAL;
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goto errout6;
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}
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ret = devm_request_irq(dev, irq, spear_adc_isr, 0, MOD_NAME, info);
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if (ret < 0) {
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dev_err(dev, "failed requesting interrupt\n");
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goto errout6;
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}
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if (of_property_read_u32(np, "sampling-frequency",
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&info->sampling_freq)) {
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dev_err(dev, "sampling-frequency missing in DT\n");
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ret = -EINVAL;
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goto errout6;
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}
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/*
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* Optional avg_samples defaults to 0, resulting in single data
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* conversion
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*/
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of_property_read_u32(np, "average-samples", &info->avg_samples);
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/*
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* Optional vref_external defaults to 0, resulting in internal vref
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* selection
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*/
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of_property_read_u32(np, "vref-external", &info->vref_external);
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spear_adc_configure(info);
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platform_set_drvdata(pdev, iodev);
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init_completion(&info->completion);
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iodev->name = MOD_NAME;
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iodev->dev.parent = dev;
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iodev->info = &spear_adc_iio_info;
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iodev->modes = INDIO_DIRECT_MODE;
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iodev->channels = spear_adc_iio_channels;
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iodev->num_channels = ARRAY_SIZE(spear_adc_iio_channels);
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ret = iio_device_register(iodev);
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if (ret)
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goto errout6;
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dev_info(dev, "SPEAR ADC driver loaded, IRQ %d\n", irq);
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return 0;
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errout6:
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clk_disable(info->clk);
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errout5:
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clk_unprepare(info->clk);
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errout4:
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clk_put(info->clk);
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errout3:
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iounmap(info->adc_base_spear6xx);
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errout2:
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iio_free_device(iodev);
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errout1:
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return ret;
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}
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static int __devexit spear_adc_remove(struct platform_device *pdev)
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{
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struct iio_dev *iodev = platform_get_drvdata(pdev);
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struct spear_adc_info *info = iio_priv(iodev);
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iio_device_unregister(iodev);
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platform_set_drvdata(pdev, NULL);
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clk_disable(info->clk);
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clk_unprepare(info->clk);
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clk_put(info->clk);
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iounmap(info->adc_base_spear6xx);
|
||||
iio_free_device(iodev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id spear_adc_dt_ids[] = {
|
||||
{ .compatible = "st,spear600-adc", },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, spear_adc_dt_ids);
|
||||
|
||||
static struct platform_driver spear_adc_driver = {
|
||||
.probe = spear_adc_probe,
|
||||
.remove = __devexit_p(spear_adc_remove),
|
||||
.driver = {
|
||||
.name = MOD_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = of_match_ptr(spear_adc_dt_ids),
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(spear_adc_driver);
|
||||
|
||||
MODULE_AUTHOR("Stefan Roese <sr@denx.de>");
|
||||
MODULE_DESCRIPTION("SPEAr ADC driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue