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Merge branches 'thermal-core', 'thermal-soc', 'thermal-intel' and 'const-thermal-zone-structure' into next

This commit is contained in:
Zhang Rui 2017-09-08 11:20:04 +08:00
parent 9d9ca1f9f0 7a348799d5 9ef08d7a44 28e6c992eb
commit b32b5e14b4
21 changed files with 702 additions and 90 deletions
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1
Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
View File

@ -11,6 +11,7 @@ Required properties:
- compatible:
- "mediatek,mt8173-thermal" : For MT8173 family of SoCs
- "mediatek,mt2701-thermal" : For MT2701 family of SoCs
- "mediatek,mt2712-thermal" : For MT2712 family of SoCs
- reg: Address range of the thermal controller
- interrupts: IRQ for the thermal controller
- clocks, clock-names: Clocks needed for the thermal controller. required

1
Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
View File

@ -4,6 +4,7 @@ Required properties:
- compatible : should be "rockchip,<name>-tsadc"
"rockchip,rk3228-tsadc": found on RK3228 SoCs
"rockchip,rk3288-tsadc": found on RK3288 SoCs
"rockchip,rk3328-tsadc": found on RK3328 SoCs
"rockchip,rk3368-tsadc": found on RK3368 SoCs
"rockchip,rk3399-tsadc": found on RK3399 SoCs
- reg : physical base address of the controller and length of memory mapped

64
Documentation/devicetree/bindings/thermal/uniphier-thermal.txt Normal file
View File

@ -0,0 +1,64 @@
* UniPhier Thermal bindings
This describes the devicetree bindings for thermal monitor supported by
PVT(Process, Voltage and Temperature) monitoring unit implemented on Socionext
UniPhier SoCs.
Required properties:
- compatible :
- "socionext,uniphier-pxs2-thermal" : For UniPhier PXs2 SoC
- "socionext,uniphier-ld20-thermal" : For UniPhier LD20 SoC
- interrupts : IRQ for the temperature alarm
- #thermal-sensor-cells : Should be 0. See ./thermal.txt for details.
Optional properties:
- socionext,tmod-calibration: A pair of calibrated values referred from PVT,
in case that the values aren't set on SoC,
like a reference board.
Example:
sysctrl@61840000 {
compatible = "socionext,uniphier-ld20-sysctrl",
"simple-mfd", "syscon";
reg = <0x61840000 0x10000>;
...
pvtctl: pvtctl {
compatible = "socionext,uniphier-ld20-thermal";
interrupts = <0 3 1>;
#thermal-sensor-cells = <0>;
};
...
};
thermal-zones {
cpu_thermal {
polling-delay-passive = <250>; /* 250ms */
polling-delay = <1000>; /* 1000ms */
thermal-sensors = <&pvtctl>;
trips {
cpu_crit: cpu_crit {
temperature = <110000>; /* 110C */
hysteresis = <2000>;
type = "critical";
};
cpu_alert: cpu_alert {
temperature = <100000>; /* 100C */
hysteresis = <2000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device = <&cpu0 (-1) (-1)>;
};
map1 {
trip = <&cpu_alert>;
cooling-device = <&cpu2 (-1) (-1)>;
};
};
};
};

12
drivers/thermal/Kconfig
View File

@ -342,7 +342,7 @@ config X86_PKG_TEMP_THERMAL
config INTEL_SOC_DTS_IOSF_CORE
tristate
depends on X86
depends on X86 && PCI
select IOSF_MBI
help
This is becoming a common feature for Intel SoCs to expose the additional
@ -352,7 +352,7 @@ config INTEL_SOC_DTS_IOSF_CORE
config INTEL_SOC_DTS_THERMAL
tristate "Intel SoCs DTS thermal driver"
depends on X86
depends on X86 && PCI
select INTEL_SOC_DTS_IOSF_CORE
select THERMAL_WRITABLE_TRIPS
help
@ -473,4 +473,12 @@ config ZX2967_THERMAL
the primitive temperature sensor embedded in zx2967 SoCs.
This sensor generates the real time die temperature.
config UNIPHIER_THERMAL
tristate "Socionext UniPhier thermal driver"
depends on ARCH_UNIPHIER || COMPILE_TEST
depends on THERMAL_OF && MFD_SYSCON
help
Enable this to plug in UniPhier on-chip PVT thermal driver into the
thermal framework. The driver supports CPU thermal zone temperature
reporting and a couple of trip points.
endif

1
drivers/thermal/Makefile
View File

@ -59,3 +59,4 @@ obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
obj-$(CONFIG_GENERIC_ADC_THERMAL) += thermal-generic-adc.o
obj-$(CONFIG_ZX2967_THERMAL) += zx2967_thermal.o
obj-$(CONFIG_UNIPHIER_THERMAL) += uniphier_thermal.o

2
drivers/thermal/broadcom/bcm2835_thermal.c
View File

@ -145,7 +145,7 @@ static void bcm2835_thermal_debugfs(struct platform_device *pdev)
debugfs_create_regset32("regset", 0444, data->debugfsdir, regset);
}
static struct thermal_zone_of_device_ops bcm2835_thermal_ops = {
static const struct thermal_zone_of_device_ops bcm2835_thermal_ops = {
.get_temp = bcm2835_thermal_get_temp,
};

2
drivers/thermal/hisi_thermal.c
View File

@ -206,7 +206,7 @@ static int hisi_thermal_get_temp(void *_sensor, int *temp)
return 0;
}
static struct thermal_zone_of_device_ops hisi_of_thermal_ops = {
static const struct thermal_zone_of_device_ops hisi_of_thermal_ops = {
.get_temp = hisi_thermal_get_temp,
};

2
drivers/thermal/int340x_thermal/acpi_thermal_rel.c
View File

@ -228,7 +228,7 @@ static void get_single_name(acpi_handle handle, char *name)
struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER};
if (ACPI_FAILURE(acpi_get_name(handle, ACPI_SINGLE_NAME, &buffer)))
pr_warn("Failed get name from handle\n");
pr_warn("Failed to get device name from acpi handle\n");
else {
memcpy(name, buffer.pointer, ACPI_NAME_SIZE);
kfree(buffer.pointer);

8
drivers/thermal/int340x_thermal/acpi_thermal_rel.h
View File

@ -34,10 +34,10 @@ struct trt {
acpi_handle target;
u64 influence;
u64 sample_period;
u64 reverved1;
u64 reverved2;
u64 reverved3;
u64 reverved4;
u64 reserved1;
u64 reserved2;
u64 reserved3;
u64 reserved4;
} __packed;
#define ACPI_NR_ART_ELEMENTS 13

43
drivers/thermal/int340x_thermal/int3400_thermal.c
View File

@ -16,6 +16,8 @@
#include <linux/thermal.h>
#include "acpi_thermal_rel.h"
#define INT3400_THERMAL_TABLE_CHANGED 0x83
enum int3400_thermal_uuid {
INT3400_THERMAL_PASSIVE_1,
INT3400_THERMAL_ACTIVE,
@ -104,7 +106,7 @@ static struct attribute *uuid_attrs[] = {
NULL
};
static struct attribute_group uuid_attribute_group = {
static const struct attribute_group uuid_attribute_group = {
.attrs = uuid_attrs,
.name = "uuids"
};
@ -185,6 +187,35 @@ static int int3400_thermal_run_osc(acpi_handle handle,
return result;
}
static void int3400_notify(acpi_handle handle,
u32 event,
void *data)
{
struct int3400_thermal_priv *priv = data;
char *thermal_prop[5];
if (!priv)
return;
switch (event) {
case INT3400_THERMAL_TABLE_CHANGED:
thermal_prop[0] = kasprintf(GFP_KERNEL, "NAME=%s",
priv->thermal->type);
thermal_prop[1] = kasprintf(GFP_KERNEL, "TEMP=%d",
priv->thermal->temperature);
thermal_prop[2] = kasprintf(GFP_KERNEL, "TRIP=");
thermal_prop[3] = kasprintf(GFP_KERNEL, "EVENT=%d",
THERMAL_TABLE_CHANGED);
thermal_prop[4] = NULL;
kobject_uevent_env(&priv->thermal->device.kobj, KOBJ_CHANGE,
thermal_prop);
break;
default:
dev_err(&priv->adev->dev, "Unsupported event [0x%x]\n", event);
break;
}
}
static int int3400_thermal_get_temp(struct thermal_zone_device *thermal,
int *temp)
{
@ -290,6 +321,12 @@ static int int3400_thermal_probe(struct platform_device *pdev)
if (result)
goto free_zone;
result = acpi_install_notify_handler(
priv->adev->handle, ACPI_DEVICE_NOTIFY, int3400_notify,
(void *)priv);
if (result)
goto free_zone;
return 0;
free_zone:
@ -306,6 +343,10 @@ static int int3400_thermal_remove(struct platform_device *pdev)
{
struct int3400_thermal_priv *priv = platform_get_drvdata(pdev);
acpi_remove_notify_handler(
priv->adev->handle, ACPI_DEVICE_NOTIFY,
int3400_notify);
if (!priv->rel_misc_dev_res)
acpi_thermal_rel_misc_device_remove(priv->adev->handle);

96
drivers/thermal/int340x_thermal/int3406_thermal.c
View File

@ -21,39 +21,33 @@
struct int3406_thermal_data {
int upper_limit;
int upper_limit_index;
int lower_limit;
int lower_limit_index;
acpi_handle handle;
struct acpi_video_device_brightness *br;
struct backlight_device *raw_bd;
struct thermal_cooling_device *cooling_dev;
};
static int int3406_thermal_to_raw(int level, struct int3406_thermal_data *d)
{
int max_level = d->br->levels[d->br->count - 1];
int raw_max = d->raw_bd->props.max_brightness;
return level * raw_max / max_level;
}
static int int3406_thermal_to_acpi(int level, struct int3406_thermal_data *d)
{
int raw_max = d->raw_bd->props.max_brightness;
int max_level = d->br->levels[d->br->count - 1];
return level * max_level / raw_max;
}
/*
* According to the ACPI spec,
* "Each brightness level is represented by a number between 0 and 100,
* and can be thought of as a percentage. For example, 50 can be 50%
* power consumption or 50% brightness, as defined by the OEM."
*
* As int3406 device uses this value to communicate with the native
* graphics driver, we make the assumption that it represents
* the percentage of brightness only
*/
#define ACPI_TO_RAW(v, d) (d->raw_bd->props.max_brightness * v / 100)
#define RAW_TO_ACPI(v, d) (v * 100 / d->raw_bd->props.max_brightness)
static int
int3406_thermal_get_max_state(struct thermal_cooling_device *cooling_dev,
unsigned long *state)
{
struct int3406_thermal_data *d = cooling_dev->devdata;
int index = d->lower_limit_index ? d->lower_limit_index : 2;
*state = d->br->count - 1 - index;
*state = d->upper_limit - d->lower_limit;
return 0;
}
@ -62,19 +56,15 @@ int3406_thermal_set_cur_state(struct thermal_cooling_device *cooling_dev,
unsigned long state)
{
struct int3406_thermal_data *d = cooling_dev->devdata;
int level, raw_level;
int acpi_level, raw_level;
if (state > d->br->count - 3)
if (state > d->upper_limit - d->lower_limit)
return -EINVAL;
state = d->br->count - 1 - state;
level = d->br->levels[state];
acpi_level = d->br->levels[d->upper_limit - state];
if ((d->upper_limit && level > d->upper_limit) ||
(d->lower_limit && level < d->lower_limit))
return -EINVAL;
raw_level = ACPI_TO_RAW(acpi_level, d);
raw_level = int3406_thermal_to_raw(level, d);
return backlight_device_set_brightness(d->raw_bd, raw_level);
}
@ -83,27 +73,22 @@ int3406_thermal_get_cur_state(struct thermal_cooling_device *cooling_dev,
unsigned long *state)
{
struct int3406_thermal_data *d = cooling_dev->devdata;
int raw_level, level, i;
int *levels = d->br->levels;
int acpi_level;
int index;
raw_level = d->raw_bd->props.brightness;
level = int3406_thermal_to_acpi(raw_level, d);
acpi_level = RAW_TO_ACPI(d->raw_bd->props.brightness, d);
/*
* There is no 1:1 mapping between the firmware interface level with the
* raw interface level, we will have to find one that is close enough.
* There is no 1:1 mapping between the firmware interface level
* with the raw interface level, we will have to find one that is
* right above it.
*/
for (i = 2; i < d->br->count; i++) {
if (level < levels[i]) {
if (i == 2)
break;
if ((level - levels[i - 1]) < (levels[i] - level))
i--;
for (index = d->lower_limit; index < d->upper_limit; index++) {
if (acpi_level <= d->br->levels[index])
break;
}
}
*state = d->br->count - 1 - i;
*state = d->upper_limit - index;
return 0;
}
@ -117,7 +102,7 @@ static int int3406_thermal_get_index(int *array, int nr, int value)
{
int i;
for (i = 0; i < nr; i++) {
for (i = 2; i < nr; i++) {
if (array[i] == value)
break;
}
@ -128,27 +113,20 @@ static void int3406_thermal_get_limit(struct int3406_thermal_data *d)
{
acpi_status status;
unsigned long long lower_limit, upper_limit;
int index;
status = acpi_evaluate_integer(d->handle, "DDDL", NULL, &lower_limit);
if (ACPI_SUCCESS(status)) {
index = int3406_thermal_get_index(d->br->levels, d->br->count,
lower_limit);
if (index > 0) {
d->lower_limit = (int)lower_limit;
d->lower_limit_index = index;
}
}
if (ACPI_SUCCESS(status))
d->lower_limit = int3406_thermal_get_index(d->br->levels,
d->br->count, lower_limit);
status = acpi_evaluate_integer(d->handle, "DDPC", NULL, &upper_limit);
if (ACPI_SUCCESS(status)) {
index = int3406_thermal_get_index(d->br->levels, d->br->count,
upper_limit);
if (index > 0) {
d->upper_limit = (int)upper_limit;
d->upper_limit_index = index;
}
}
if (ACPI_SUCCESS(status))
d->upper_limit = int3406_thermal_get_index(d->br->levels,
d->br->count, upper_limit);
/* lower_limit and upper_limit should be always set */
d->lower_limit = d->lower_limit > 0 ? d->lower_limit : 2;
d->upper_limit = d->upper_limit > 0 ? d->upper_limit : d->br->count - 1;
}
static void int3406_notify(acpi_handle handle, u32 event, void *data)

2
drivers/thermal/int340x_thermal/processor_thermal_device.c
View File

@ -127,7 +127,7 @@ static struct attribute *power_limit_attrs[] = {
NULL
};
static struct attribute_group power_limit_attribute_group = {
static const struct attribute_group power_limit_attribute_group = {
.attrs = power_limit_attrs,
.name = "power_limits"
};

12
drivers/thermal/intel_pch_thermal.c
View File

@ -49,7 +49,7 @@
#define WPT_TSGPEN 0x84 /* General Purpose Event Enables */
/* Wildcat Point-LP PCH Thermal Register bit definitions */
#define WPT_TEMP_TSR 0x00ff /* Temp TS Reading */
#define WPT_TEMP_TSR 0x01ff /* Temp TS Reading */
#define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */
#define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */
#define WPT_TSS_GPES 0x08 /* GPE status */
@ -125,7 +125,7 @@ static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips)
*nr_trips = 0;
/* Check if BIOS has already enabled thermal sensor */
if (WPT_TSS_TSDSS & readb(ptd->hw_base + WPT_TSS)) {
if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) {
ptd->bios_enabled = true;
goto read_trips;
}
@ -141,7 +141,7 @@ static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips)
}
writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
if (!(WPT_TSS_TSDSS & readb(ptd->hw_base + WPT_TSS))) {
if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) {
dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
return -ENODEV;
}
@ -174,9 +174,9 @@ static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips)
static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp)
{
u8 wpt_temp;
u16 wpt_temp;
wpt_temp = WPT_TEMP_TSR & readl(ptd->hw_base + WPT_TEMP);
wpt_temp = WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP);
/* Resolution of 1/2 degree C and an offset of -50C */
*temp = (wpt_temp * 1000 / 2 - 50000);
@ -387,7 +387,7 @@ static int intel_pch_thermal_resume(struct device *device)
return ptd->ops->resume(ptd);
}
static struct pci_device_id intel_pch_thermal_id[] = {
static const struct pci_device_id intel_pch_thermal_id[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1),
.driver_data = board_hsw, },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2),

88
drivers/thermal/mtk_thermal.c
View File

@ -3,6 +3,7 @@
* Author: Hanyi Wu <hanyi.wu@mediatek.com>
* Sascha Hauer <s.hauer@pengutronix.de>
* Dawei Chien <dawei.chien@mediatek.com>
* Louis Yu <louis.yu@mediatek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@ -111,9 +112,10 @@
/*
* Layout of the fuses providing the calibration data
* These macros could be used for both MT8173 and MT2701.
* MT8173 has five sensors and need five VTS calibration data,
* and MT2701 has three sensors and need three VTS calibration data.
* These macros could be used for MT8173, MT2701, and MT2712.
* MT8173 has 5 sensors and needs 5 VTS calibration data.
* MT2701 has 3 sensors and needs 3 VTS calibration data.
* MT2712 has 4 sensors and needs 4 VTS calibration data.
*/
#define MT8173_CALIB_BUF0_VALID BIT(0)
#define MT8173_CALIB_BUF1_ADC_GE(x) (((x) >> 22) & 0x3ff)
@ -124,6 +126,8 @@
#define MT8173_CALIB_BUF2_VTS_TSABB(x) (((x) >> 14) & 0x1ff)
#define MT8173_CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f)
#define MT8173_CALIB_BUF0_O_SLOPE(x) (((x) >> 26) & 0x3f)
#define MT8173_CALIB_BUF0_O_SLOPE_SIGN(x) (((x) >> 7) & 0x1)
#define MT8173_CALIB_BUF1_ID(x) (((x) >> 9) & 0x1)
/* MT2701 thermal sensors */
#define MT2701_TS1 0
@ -136,11 +140,26 @@
/* The total number of temperature sensors in the MT2701 */
#define MT2701_NUM_SENSORS 3
#define THERMAL_NAME "mtk-thermal"
/* The number of sensing points per bank */
#define MT2701_NUM_SENSORS_PER_ZONE 3
/* MT2712 thermal sensors */
#define MT2712_TS1 0
#define MT2712_TS2 1
#define MT2712_TS3 2
#define MT2712_TS4 3
/* AUXADC channel 11 is used for the temperature sensors */
#define MT2712_TEMP_AUXADC_CHANNEL 11
/* The total number of temperature sensors in the MT2712 */
#define MT2712_NUM_SENSORS 4
/* The number of sensing points per bank */
#define MT2712_NUM_SENSORS_PER_ZONE 4
#define THERMAL_NAME "mtk-thermal"
struct mtk_thermal;
struct thermal_bank_cfg {
@ -215,6 +234,21 @@ static const int mt2701_adcpnp[MT2701_NUM_SENSORS_PER_ZONE] = {
static const int mt2701_mux_values[MT2701_NUM_SENSORS] = { 0, 1, 16 };
/* MT2712 thermal sensor data */
static const int mt2712_bank_data[MT2712_NUM_SENSORS] = {
MT2712_TS1, MT2712_TS2, MT2712_TS3, MT2712_TS4
};
static const int mt2712_msr[MT2712_NUM_SENSORS_PER_ZONE] = {
TEMP_MSR0, TEMP_MSR1, TEMP_MSR2, TEMP_MSR3
};
static const int mt2712_adcpnp[MT2712_NUM_SENSORS_PER_ZONE] = {
TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2, TEMP_ADCPNP3
};
static const int mt2712_mux_values[MT2712_NUM_SENSORS] = { 0, 1, 2, 3 };
/**
* The MT8173 thermal controller has four banks. Each bank can read up to
* four temperature sensors simultaneously. The MT8173 has a total of 5
@ -277,6 +311,31 @@ static const struct mtk_thermal_data mt2701_thermal_data = {
.sensor_mux_values = mt2701_mux_values,
};
/**
* The MT2712 thermal controller has one bank, which can read up to
* four temperature sensors simultaneously. The MT2712 has a total of 4
* temperature sensors.
*
* The thermal core only gets the maximum temperature of this one bank,
* so the bank concept wouldn't be necessary here. However, the SVS (Smart
* Voltage Scaling) unit makes its decisions based on the same bank
* data.
*/
static const struct mtk_thermal_data mt2712_thermal_data = {
.auxadc_channel = MT2712_TEMP_AUXADC_CHANNEL,
.num_banks = 1,
.num_sensors = MT2712_NUM_SENSORS,
.bank_data = {
{
.num_sensors = 4,
.sensors = mt2712_bank_data,
},
},
.msr = mt2712_msr,
.adcpnp = mt2712_adcpnp,
.sensor_mux_values = mt2712_mux_values,
};
/**
* raw_to_mcelsius - convert a raw ADC value to mcelsius
* @mt: The thermal controller
@ -552,7 +611,11 @@ static int mtk_thermal_get_calibration_data(struct device *dev,
mt->vts[MT8173_TS4] = MT8173_CALIB_BUF2_VTS_TS4(buf[2]);
mt->vts[MT8173_TSABB] = MT8173_CALIB_BUF2_VTS_TSABB(buf[2]);
mt->degc_cali = MT8173_CALIB_BUF0_DEGC_CALI(buf[0]);
mt->o_slope = MT8173_CALIB_BUF0_O_SLOPE(buf[0]);
if (MT8173_CALIB_BUF1_ID(buf[1]) &
MT8173_CALIB_BUF0_O_SLOPE_SIGN(buf[0]))
mt->o_slope = -MT8173_CALIB_BUF0_O_SLOPE(buf[0]);
else
mt->o_slope = MT8173_CALIB_BUF0_O_SLOPE(buf[0]);
} else {
dev_info(dev, "Device not calibrated, using default calibration values\n");
}
@ -571,6 +634,10 @@ static const struct of_device_id mtk_thermal_of_match[] = {
{
.compatible = "mediatek,mt2701-thermal",
.data = (void *)&mt2701_thermal_data,
},
{
.compatible = "mediatek,mt2712-thermal",
.data = (void *)&mt2712_thermal_data,
}, {
},
};
@ -645,16 +712,16 @@ static int mtk_thermal_probe(struct platform_device *pdev)
return -EINVAL;
}
ret = device_reset(&pdev->dev);
if (ret)
return ret;
ret = clk_prepare_enable(mt->clk_auxadc);
if (ret) {
dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret);
return ret;
}
ret = device_reset(&pdev->dev);
if (ret)
goto err_disable_clk_auxadc;
ret = clk_prepare_enable(mt->clk_peri_therm);
if (ret) {
dev_err(&pdev->dev, "Can't enable peri clk: %d\n", ret);
@ -705,6 +772,7 @@ static struct platform_driver mtk_thermal_driver = {
module_platform_driver(mtk_thermal_driver);
MODULE_AUTHOR("Louis Yu <louis.yu@mediatek.com>");
MODULE_AUTHOR("Dawei Chien <dawei.chien@mediatek.com>");
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
MODULE_AUTHOR("Hanyi Wu <hanyi.wu@mediatek.com>");

2
drivers/thermal/qoriq_thermal.c
View File

@ -188,7 +188,7 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
tmu_write(data, TMR_DISABLE, &data->regs->tmr);
}
static struct thermal_zone_of_device_ops tmu_tz_ops = {
static const struct thermal_zone_of_device_ops tmu_tz_ops = {
.get_temp = tmu_get_temp,
};

2
drivers/thermal/rcar_gen3_thermal.c
View File

@ -225,7 +225,7 @@ static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
return 0;
}
static struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
.get_temp = rcar_gen3_thermal_get_temp,
.set_trips = rcar_gen3_thermal_set_trips,
};

65
drivers/thermal/rockchip_thermal.c
View File

@ -320,6 +320,44 @@ static const struct tsadc_table rk3288_code_table[] = {
{0, 125000},
};
static const struct tsadc_table rk3328_code_table[] = {
{0, -40000},
{296, -40000},
{304, -35000},
{313, -30000},
{331, -20000},
{340, -15000},
{349, -10000},
{359, -5000},
{368, 0},
{378, 5000},
{388, 10000},
{398, 15000},
{408, 20000},
{418, 25000},
{429, 30000},
{440, 35000},
{451, 40000},
{462, 45000},
{473, 50000},
{485, 55000},
{496, 60000},
{508, 65000},
{521, 70000},
{533, 75000},
{546, 80000},
{559, 85000},
{572, 90000},
{586, 95000},
{600, 100000},
{614, 105000},
{629, 110000},
{644, 115000},
{659, 120000},
{675, 125000},
{TSADCV2_DATA_MASK, 125000},
};
static const struct tsadc_table rk3368_code_table[] = {
{0, -40000},
{106, -40000},
@ -790,6 +828,29 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
},
};
static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
.chn_num = 1, /* one channels for tsadc */
.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
.tshut_temp = 95000,
.initialize = rk_tsadcv2_initialize,
.irq_ack = rk_tsadcv3_irq_ack,
.control = rk_tsadcv3_control,
.get_temp = rk_tsadcv2_get_temp,
.set_alarm_temp = rk_tsadcv2_alarm_temp,
.set_tshut_temp = rk_tsadcv2_tshut_temp,
.set_tshut_mode = rk_tsadcv2_tshut_mode,
.table = {
.id = rk3328_code_table,
.length = ARRAY_SIZE(rk3328_code_table),
.data_mask = TSADCV2_DATA_MASK,
.mode = ADC_INCREMENT,
},
};
static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
@ -874,6 +935,10 @@ static const struct of_device_id of_rockchip_thermal_match[] = {
.compatible = "rockchip,rk3288-tsadc",
.data = (void *)&rk3288_tsadc_data,
},
{
.compatible = "rockchip,rk3328-tsadc",
.data = (void *)&rk3328_tsadc_data,
},
{
.compatible = "rockchip,rk3366-tsadc",
.data = (void *)&rk3366_tsadc_data,

2
drivers/thermal/samsung/exynos_tmu.c
View File

@ -1286,7 +1286,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
return 0;
}
static struct thermal_zone_of_device_ops exynos_sensor_ops = {
static const struct thermal_zone_of_device_ops exynos_sensor_ops = {
.get_temp = exynos_get_temp,
.set_emul_temp = exynos_tmu_set_emulation,
};

384
drivers/thermal/uniphier_thermal.c Normal file
View File

@ -0,0 +1,384 @@
/**
* uniphier_thermal.c - Socionext UniPhier thermal driver
*
* Copyright 2014 Panasonic Corporation
* Copyright 2016-2017 Socionext Inc.
* All rights reserved.
*
* Author:
* Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 of
* the License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/bitops.h>
#include <linux/interrupt.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/thermal.h>
#include "thermal_core.h"
/*
* block registers
* addresses are the offset from .block_base
*/
#define PVTCTLEN 0x0000
#define PVTCTLEN_EN BIT(0)
#define PVTCTLMODE 0x0004
#define PVTCTLMODE_MASK 0xf
#define PVTCTLMODE_TEMPMON 0x5
#define EMONREPEAT 0x0040
#define EMONREPEAT_ENDLESS BIT(24)
#define EMONREPEAT_PERIOD GENMASK(3, 0)
#define EMONREPEAT_PERIOD_1000000 0x9
/*
* common registers
* addresses are the offset from .map_base
*/
#define PVTCTLSEL 0x0900
#define PVTCTLSEL_MASK GENMASK(2, 0)
#define PVTCTLSEL_MONITOR 0
#define SETALERT0 0x0910
#define SETALERT1 0x0914
#define SETALERT2 0x0918
#define SETALERT_TEMP_OVF (GENMASK(7, 0) << 16)
#define SETALERT_TEMP_OVF_VALUE(val) (((val) & GENMASK(7, 0)) << 16)
#define SETALERT_EN BIT(0)
#define PMALERTINTCTL 0x0920
#define PMALERTINTCTL_CLR(ch) BIT(4 * (ch) + 2)
#define PMALERTINTCTL_SET(ch) BIT(4 * (ch) + 1)
#define PMALERTINTCTL_EN(ch) BIT(4 * (ch) + 0)
#define PMALERTINTCTL_MASK (GENMASK(10, 8) | GENMASK(6, 4) | \
GENMASK(2, 0))
#define TMOD 0x0928
#define TMOD_WIDTH 9
#define TMODCOEF 0x0e5c
#define TMODSETUP0_EN BIT(30)
#define TMODSETUP0_VAL(val) (((val) & GENMASK(13, 0)) << 16)
#define TMODSETUP1_EN BIT(15)
#define TMODSETUP1_VAL(val) ((val) & GENMASK(14, 0))
/* SoC critical temperature */
#define CRITICAL_TEMP_LIMIT (120 * 1000)
/* Max # of alert channels */
#define ALERT_CH_NUM 3
/* SoC specific thermal sensor data */
struct uniphier_tm_soc_data {
u32 map_base;
u32 block_base;
u32 tmod_setup_addr;
};
struct uniphier_tm_dev {
struct regmap *regmap;
struct device *dev;
bool alert_en[ALERT_CH_NUM];
struct thermal_zone_device *tz_dev;
const struct uniphier_tm_soc_data *data;
};
static int uniphier_tm_initialize_sensor(struct uniphier_tm_dev *tdev)
{
struct regmap *map = tdev->regmap;
u32 val;
u32 tmod_calib[2];
int ret;
/* stop PVT */
regmap_write_bits(map, tdev->data->block_base + PVTCTLEN,
PVTCTLEN_EN, 0);
/*
* Since SoC has a calibrated value that was set in advance,
* TMODCOEF shows non-zero and PVT refers the value internally.
*
* If TMODCOEF shows zero, the boards don't have the calibrated
* value, and the driver has to set default value from DT.
*/
ret = regmap_read(map, tdev->data->map_base + TMODCOEF, &val);
if (ret)
return ret;
if (!val) {
/* look for the default values in DT */
ret = of_property_read_u32_array(tdev->dev->of_node,
"socionext,tmod-calibration",
tmod_calib,
ARRAY_SIZE(tmod_calib));
if (ret)
return ret;
regmap_write(map, tdev->data->tmod_setup_addr,
TMODSETUP0_EN | TMODSETUP0_VAL(tmod_calib[0]) |
TMODSETUP1_EN | TMODSETUP1_VAL(tmod_calib[1]));
}
/* select temperature mode */
regmap_write_bits(map, tdev->data->block_base + PVTCTLMODE,
PVTCTLMODE_MASK, PVTCTLMODE_TEMPMON);
/* set monitoring period */
regmap_write_bits(map, tdev->data->block_base + EMONREPEAT,
EMONREPEAT_ENDLESS | EMONREPEAT_PERIOD,
EMONREPEAT_ENDLESS | EMONREPEAT_PERIOD_1000000);
/* set monitor mode */
regmap_write_bits(map, tdev->data->map_base + PVTCTLSEL,
PVTCTLSEL_MASK, PVTCTLSEL_MONITOR);
return 0;
}
static void uniphier_tm_set_alert(struct uniphier_tm_dev *tdev, u32 ch,
u32 temp)
{
struct regmap *map = tdev->regmap;
/* set alert temperature */
regmap_write_bits(map, tdev->data->map_base + SETALERT0 + (ch << 2),
SETALERT_EN | SETALERT_TEMP_OVF,
SETALERT_EN |
SETALERT_TEMP_OVF_VALUE(temp / 1000));
}
static void uniphier_tm_enable_sensor(struct uniphier_tm_dev *tdev)
{
struct regmap *map = tdev->regmap;
int i;
u32 bits = 0;
for (i = 0; i < ALERT_CH_NUM; i++)
if (tdev->alert_en[i])
bits |= PMALERTINTCTL_EN(i);
/* enable alert interrupt */
regmap_write_bits(map, tdev->data->map_base + PMALERTINTCTL,
PMALERTINTCTL_MASK, bits);
/* start PVT */
regmap_write_bits(map, tdev->data->block_base + PVTCTLEN,
PVTCTLEN_EN, PVTCTLEN_EN);
usleep_range(700, 1500); /* The spec note says at least 700us */
}
static void uniphier_tm_disable_sensor(struct uniphier_tm_dev *tdev)
{
struct regmap *map = tdev->regmap;
/* disable alert interrupt */
regmap_write_bits(map, tdev->data->map_base + PMALERTINTCTL,
PMALERTINTCTL_MASK, 0);
/* stop PVT */
regmap_write_bits(map, tdev->data->block_base + PVTCTLEN,
PVTCTLEN_EN, 0);
usleep_range(1000, 2000); /* The spec note says at least 1ms */
}
static int uniphier_tm_get_temp(void *data, int *out_temp)
{
struct uniphier_tm_dev *tdev = data;
struct regmap *map = tdev->regmap;
int ret;
u32 temp;
ret = regmap_read(map, tdev->data->map_base + TMOD, &temp);
if (ret)
return ret;
/* MSB of the TMOD field is a sign bit */
*out_temp = sign_extend32(temp, TMOD_WIDTH - 1) * 1000;
return 0;
}
static const struct thermal_zone_of_device_ops uniphier_of_thermal_ops = {
.get_temp = uniphier_tm_get_temp,
};
static void uniphier_tm_irq_clear(struct uniphier_tm_dev *tdev)
{
u32 mask = 0, bits = 0;
int i;
for (i = 0; i < ALERT_CH_NUM; i++) {
mask |= (PMALERTINTCTL_CLR(i) | PMALERTINTCTL_SET(i));
bits |= PMALERTINTCTL_CLR(i);
}
/* clear alert interrupt */
regmap_write_bits(tdev->regmap,
tdev->data->map_base + PMALERTINTCTL, mask, bits);
}
static irqreturn_t uniphier_tm_alarm_irq(int irq, void *_tdev)
{
struct uniphier_tm_dev *tdev = _tdev;
disable_irq_nosync(irq);
uniphier_tm_irq_clear(tdev);
return IRQ_WAKE_THREAD;
}
static irqreturn_t uniphier_tm_alarm_irq_thread(int irq, void *_tdev)
{
struct uniphier_tm_dev *tdev = _tdev;
thermal_zone_device_update(tdev->tz_dev, THERMAL_EVENT_UNSPECIFIED);
return IRQ_HANDLED;
}
static int uniphier_tm_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct regmap *regmap;
struct device_node *parent;
struct uniphier_tm_dev *tdev;
const struct thermal_trip *trips;
int i, ret, irq, ntrips, crit_temp = INT_MAX;
tdev = devm_kzalloc(dev, sizeof(*tdev), GFP_KERNEL);
if (!tdev)
return -ENOMEM;
tdev->dev = dev;
tdev->data = of_device_get_match_data(dev);
if (WARN_ON(!tdev->data))
return -EINVAL;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return irq;
/* get regmap from syscon node */
parent = of_get_parent(dev->of_node); /* parent should be syscon node */
regmap = syscon_node_to_regmap(parent);
of_node_put(parent);
if (IS_ERR(regmap)) {
dev_err(dev, "failed to get regmap (error %ld)\n",
PTR_ERR(regmap));
return PTR_ERR(regmap);
}
tdev->regmap = regmap;
ret = uniphier_tm_initialize_sensor(tdev);
if (ret) {
dev_err(dev, "failed to initialize sensor\n");
return ret;
}
ret = devm_request_threaded_irq(dev, irq, uniphier_tm_alarm_irq,
uniphier_tm_alarm_irq_thread,
0, "thermal", tdev);
if (ret)
return ret;
platform_set_drvdata(pdev, tdev);
tdev->tz_dev = devm_thermal_zone_of_sensor_register(dev, 0, tdev,
&uniphier_of_thermal_ops);
if (IS_ERR(tdev->tz_dev)) {
dev_err(dev, "failed to register sensor device\n");
return PTR_ERR(tdev->tz_dev);
}
/* get trip points */
trips = of_thermal_get_trip_points(tdev->tz_dev);
ntrips = of_thermal_get_ntrips(tdev->tz_dev);
if (ntrips > ALERT_CH_NUM) {
dev_err(dev, "thermal zone has too many trips\n");
return -E2BIG;
}
/* set alert temperatures */
for (i = 0; i < ntrips; i++) {
if (trips[i].type == THERMAL_TRIP_CRITICAL &&
trips[i].temperature < crit_temp)
crit_temp = trips[i].temperature;
uniphier_tm_set_alert(tdev, i, trips[i].temperature);
tdev->alert_en[i] = true;
}
if (crit_temp > CRITICAL_TEMP_LIMIT) {
dev_err(dev, "critical trip is over limit(>%d), or not set\n",
CRITICAL_TEMP_LIMIT);
return -EINVAL;
}
uniphier_tm_enable_sensor(tdev);
return 0;
}
static int uniphier_tm_remove(struct platform_device *pdev)
{
struct uniphier_tm_dev *tdev = platform_get_drvdata(pdev);
/* disable sensor */
uniphier_tm_disable_sensor(tdev);
return 0;
}
static const struct uniphier_tm_soc_data uniphier_pxs2_tm_data = {
.map_base = 0xe000,
.block_base = 0xe000,
.tmod_setup_addr = 0xe904,
};
static const struct uniphier_tm_soc_data uniphier_ld20_tm_data = {
.map_base = 0xe000,
.block_base = 0xe800,
.tmod_setup_addr = 0xe938,
};
static const struct of_device_id uniphier_tm_dt_ids[] = {
{
.compatible = "socionext,uniphier-pxs2-thermal",
.data = &uniphier_pxs2_tm_data,
},
{
.compatible = "socionext,uniphier-ld20-thermal",
.data = &uniphier_ld20_tm_data,
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, uniphier_tm_dt_ids);
static struct platform_driver uniphier_tm_driver = {
.probe = uniphier_tm_probe,
.remove = uniphier_tm_remove,
.driver = {
.name = "uniphier-thermal",
.of_match_table = uniphier_tm_dt_ids,
},
};
module_platform_driver(uniphier_tm_driver);
MODULE_AUTHOR("Kunihiko Hayashi <hayashi.kunihiko@socionext.com>");
MODULE_DESCRIPTION("UniPhier thermal driver");
MODULE_LICENSE("GPL v2");

2
drivers/thermal/zx2967_thermal.c
View File

@ -111,7 +111,7 @@ static int zx2967_thermal_get_temp(void *data, int *temp)
return ret;
}
static struct thermal_zone_of_device_ops zx2967_of_thermal_ops = {
static const struct thermal_zone_of_device_ops zx2967_of_thermal_ops = {
.get_temp = zx2967_thermal_get_temp,
};

1
include/linux/thermal.h
View File

@ -102,6 +102,7 @@ enum thermal_notify_event {
THERMAL_DEVICE_DOWN, /* Thermal device is down */
THERMAL_DEVICE_UP, /* Thermal device is up after a down event */
THERMAL_DEVICE_POWER_CAPABILITY_CHANGED, /* power capability changed */
THERMAL_TABLE_CHANGED, /* Thermal table(s) changed */
};
struct thermal_zone_device_ops {