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arm64: dts: allwinner: a64: Add the SPDIF block and pin 

Add the SPDIF transceiver controller block and pin to the A64 dtsi.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Marcus Cooper 2018-01-29 10:18:59 +01:00 committed by Maxime Ripard
parent 7928b2cbe5
commit b399d2aca7
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GPG Key ID: D2B4C094214DAF74
1 changed files with 21 additions and 0 deletions
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21
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@ -336,6 +336,11 @@ rgmii_pins: rgmii_pins {
drive-strength = <40>;
};
spdif_tx_pin: spdif {
pins = "PH8";
function = "spdif";
};
spi0_pins: spi0 {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
@ -382,6 +387,22 @@ uart4_rts_cts_pins: uart4-rts-cts-pins {
};
};
spdif: spdif@1c21000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun50i-a64-spdif",
"allwinner,sun8i-h3-spdif";
reg = <0x01c21000 0x400>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
resets = <&ccu RST_BUS_SPDIF>;
clock-names = "apb", "spdif";
dmas = <&dma 2>;
dma-names = "tx";
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx_pin>;
status = "disabled";
};
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;