mirror of https://gitee.com/openkylin/linux.git
csky: Add support for libdw
This patch add support for DWARF register mappings and libdw registers initialization, which is used by perf callchain analyzing when --call-graph=dwarf is given. Here is the elfutils csky backend patch set: https://sourceware.org/ml/elfutils-devel/2019-q2/msg00007.html Signed-off-by: Mao Han <han_mao@c-sky.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Jiri Olsa <jolsa@redhat.com> Cc: linux-arch@vger.kernel.org Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/1555860794-10572-1-git-send-email-guoren@kernel.org Signed-off-by: Guo Ren <ren_guo@c-sky.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd.
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#ifndef _ASM_CSKY_PERF_REGS_H
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#define _ASM_CSKY_PERF_REGS_H
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/* Index of struct pt_regs */
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enum perf_event_csky_regs {
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PERF_REG_CSKY_TLS,
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PERF_REG_CSKY_LR,
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PERF_REG_CSKY_PC,
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PERF_REG_CSKY_SR,
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PERF_REG_CSKY_SP,
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PERF_REG_CSKY_ORIG_A0,
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PERF_REG_CSKY_A0,
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PERF_REG_CSKY_A1,
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PERF_REG_CSKY_A2,
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PERF_REG_CSKY_A3,
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PERF_REG_CSKY_REGS0,
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PERF_REG_CSKY_REGS1,
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PERF_REG_CSKY_REGS2,
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PERF_REG_CSKY_REGS3,
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PERF_REG_CSKY_REGS4,
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PERF_REG_CSKY_REGS5,
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PERF_REG_CSKY_REGS6,
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PERF_REG_CSKY_REGS7,
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PERF_REG_CSKY_REGS8,
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PERF_REG_CSKY_REGS9,
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#if defined(__CSKYABIV2__)
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PERF_REG_CSKY_EXREGS0,
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PERF_REG_CSKY_EXREGS1,
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PERF_REG_CSKY_EXREGS2,
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PERF_REG_CSKY_EXREGS3,
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PERF_REG_CSKY_EXREGS4,
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PERF_REG_CSKY_EXREGS5,
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PERF_REG_CSKY_EXREGS6,
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PERF_REG_CSKY_EXREGS7,
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PERF_REG_CSKY_EXREGS8,
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PERF_REG_CSKY_EXREGS9,
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PERF_REG_CSKY_EXREGS10,
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PERF_REG_CSKY_EXREGS11,
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PERF_REG_CSKY_EXREGS12,
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PERF_REG_CSKY_EXREGS13,
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PERF_REG_CSKY_EXREGS14,
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PERF_REG_CSKY_HI,
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PERF_REG_CSKY_LO,
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PERF_REG_CSKY_DCSR,
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#endif
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PERF_REG_CSKY_MAX,
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};
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#endif /* _ASM_CSKY_PERF_REGS_H */
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@ -59,6 +59,10 @@ ifeq ($(SRCARCH),arm64)
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LIBUNWIND_LIBS = -lunwind -lunwind-aarch64
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endif
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ifeq ($(SRCARCH),csky)
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NO_PERF_REGS := 0
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endif
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ifeq ($(ARCH),s390)
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NO_PERF_REGS := 0
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NO_SYSCALL_TABLE := 0
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@ -77,7 +81,7 @@ endif
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# Disable it on all other architectures in case libdw unwind
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# support is detected in system. Add supported architectures
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# to the check.
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ifneq ($(SRCARCH),$(filter $(SRCARCH),x86 arm arm64 powerpc s390))
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ifneq ($(SRCARCH),$(filter $(SRCARCH),x86 arm arm64 powerpc s390 csky))
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NO_LIBDW_DWARF_UNWIND := 1
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endif
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perf-y += util/
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ifndef NO_DWARF
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PERF_HAVE_DWARF_REGS := 1
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endif
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/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd.
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#ifndef ARCH_PERF_REGS_H
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#define ARCH_PERF_REGS_H
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#include <stdlib.h>
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#include <linux/types.h>
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#include <asm/perf_regs.h>
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#define PERF_REGS_MASK ((1ULL << PERF_REG_CSKY_MAX) - 1)
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#define PERF_REGS_MAX PERF_REG_CSKY_MAX
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#define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_32
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#define PERF_REG_IP PERF_REG_CSKY_PC
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#define PERF_REG_SP PERF_REG_CSKY_SP
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static inline const char *perf_reg_name(int id)
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{
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switch (id) {
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case PERF_REG_CSKY_A0:
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return "a0";
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case PERF_REG_CSKY_A1:
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return "a1";
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case PERF_REG_CSKY_A2:
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return "a2";
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case PERF_REG_CSKY_A3:
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return "a3";
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case PERF_REG_CSKY_REGS0:
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return "regs0";
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case PERF_REG_CSKY_REGS1:
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return "regs1";
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case PERF_REG_CSKY_REGS2:
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return "regs2";
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case PERF_REG_CSKY_REGS3:
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return "regs3";
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case PERF_REG_CSKY_REGS4:
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return "regs4";
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case PERF_REG_CSKY_REGS5:
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return "regs5";
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case PERF_REG_CSKY_REGS6:
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return "regs6";
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case PERF_REG_CSKY_REGS7:
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return "regs7";
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case PERF_REG_CSKY_REGS8:
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return "regs8";
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case PERF_REG_CSKY_REGS9:
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return "regs9";
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case PERF_REG_CSKY_SP:
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return "sp";
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case PERF_REG_CSKY_LR:
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return "lr";
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case PERF_REG_CSKY_PC:
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return "pc";
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#if defined(__CSKYABIV2__)
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case PERF_REG_CSKY_EXREGS0:
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return "exregs0";
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case PERF_REG_CSKY_EXREGS1:
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return "exregs1";
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case PERF_REG_CSKY_EXREGS2:
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return "exregs2";
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case PERF_REG_CSKY_EXREGS3:
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return "exregs3";
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case PERF_REG_CSKY_EXREGS4:
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return "exregs4";
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case PERF_REG_CSKY_EXREGS5:
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return "exregs5";
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case PERF_REG_CSKY_EXREGS6:
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return "exregs6";
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case PERF_REG_CSKY_EXREGS7:
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return "exregs7";
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case PERF_REG_CSKY_EXREGS8:
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return "exregs8";
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case PERF_REG_CSKY_EXREGS9:
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return "exregs9";
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case PERF_REG_CSKY_EXREGS10:
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return "exregs10";
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case PERF_REG_CSKY_EXREGS11:
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return "exregs11";
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case PERF_REG_CSKY_EXREGS12:
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return "exregs12";
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case PERF_REG_CSKY_EXREGS13:
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return "exregs13";
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case PERF_REG_CSKY_EXREGS14:
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return "exregs14";
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case PERF_REG_CSKY_TLS:
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return "tls";
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case PERF_REG_CSKY_HI:
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return "hi";
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case PERF_REG_CSKY_LO:
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return "lo";
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#endif
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default:
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return NULL;
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}
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return NULL;
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}
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#endif /* ARCH_PERF_REGS_H */
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perf-$(CONFIG_DWARF) += dwarf-regs.o
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perf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd.
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// Mapping of DWARF debug register numbers into register names.
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#include <stddef.h>
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#include <dwarf-regs.h>
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#if defined(__CSKYABIV2__)
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#define CSKY_MAX_REGS 73
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const char *csky_dwarf_regs_table[CSKY_MAX_REGS] = {
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/* r0 ~ r8 */
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"%a0", "%a1", "%a2", "%a3", "%regs0", "%regs1", "%regs2", "%regs3",
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/* r9 ~ r15 */
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"%regs4", "%regs5", "%regs6", "%regs7", "%regs8", "%regs9", "%sp",
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"%lr",
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/* r16 ~ r23 */
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"%exregs0", "%exregs1", "%exregs2", "%exregs3", "%exregs4",
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"%exregs5", "%exregs6", "%exregs7",
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/* r24 ~ r31 */
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"%exregs8", "%exregs9", "%exregs10", "%exregs11", "%exregs12",
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"%exregs13", "%exregs14", "%tls",
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"%pc", NULL, NULL, NULL, "%hi", "%lo", NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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"%epc",
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};
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#else
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#define CSKY_MAX_REGS 57
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const char *csky_dwarf_regs_table[CSKY_MAX_REGS] = {
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/* r0 ~ r8 */
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"%sp", "%regs9", "%a0", "%a1", "%a2", "%a3", "%regs0", "%regs1",
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/* r9 ~ r15 */
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"%regs2", "%regs3", "%regs4", "%regs5", "%regs6", "%regs7", "%regs8",
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"%lr",
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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"%epc",
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};
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#endif
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const char *get_arch_regstr(unsigned int n)
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{
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return (n < CSKY_MAX_REGS) ? csky_dwarf_regs_table[n] : NULL;
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}
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd.
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#include <elfutils/libdwfl.h>
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#include "../../util/unwind-libdw.h"
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#include "../../util/perf_regs.h"
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#include "../../util/event.h"
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bool libdw__arch_set_initial_registers(Dwfl_Thread *thread, void *arg)
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{
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struct unwind_info *ui = arg;
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struct regs_dump *user_regs = &ui->sample->user_regs;
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Dwarf_Word dwarf_regs[PERF_REG_CSKY_MAX];
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#define REG(r) ({ \
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Dwarf_Word val = 0; \
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perf_reg_value(&val, user_regs, PERF_REG_CSKY_##r); \
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val; \
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})
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#if defined(__CSKYABIV2__)
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dwarf_regs[0] = REG(A0);
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dwarf_regs[1] = REG(A1);
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dwarf_regs[2] = REG(A2);
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dwarf_regs[3] = REG(A3);
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dwarf_regs[4] = REG(REGS0);
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dwarf_regs[5] = REG(REGS1);
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dwarf_regs[6] = REG(REGS2);
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dwarf_regs[7] = REG(REGS3);
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dwarf_regs[8] = REG(REGS4);
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dwarf_regs[9] = REG(REGS5);
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dwarf_regs[10] = REG(REGS6);
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dwarf_regs[11] = REG(REGS7);
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dwarf_regs[12] = REG(REGS8);
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dwarf_regs[13] = REG(REGS9);
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dwarf_regs[14] = REG(SP);
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dwarf_regs[15] = REG(LR);
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dwarf_regs[16] = REG(EXREGS0);
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dwarf_regs[17] = REG(EXREGS1);
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dwarf_regs[18] = REG(EXREGS2);
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dwarf_regs[19] = REG(EXREGS3);
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dwarf_regs[20] = REG(EXREGS4);
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dwarf_regs[21] = REG(EXREGS5);
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dwarf_regs[22] = REG(EXREGS6);
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dwarf_regs[23] = REG(EXREGS7);
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dwarf_regs[24] = REG(EXREGS8);
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dwarf_regs[25] = REG(EXREGS9);
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dwarf_regs[26] = REG(EXREGS10);
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dwarf_regs[27] = REG(EXREGS11);
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dwarf_regs[28] = REG(EXREGS12);
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dwarf_regs[29] = REG(EXREGS13);
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dwarf_regs[30] = REG(EXREGS14);
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dwarf_regs[31] = REG(TLS);
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dwarf_regs[32] = REG(PC);
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#else
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dwarf_regs[0] = REG(SP);
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dwarf_regs[1] = REG(REGS9);
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dwarf_regs[2] = REG(A0);
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dwarf_regs[3] = REG(A1);
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dwarf_regs[4] = REG(A2);
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dwarf_regs[5] = REG(A3);
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dwarf_regs[6] = REG(REGS0);
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dwarf_regs[7] = REG(REGS1);
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dwarf_regs[8] = REG(REGS2);
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dwarf_regs[9] = REG(REGS3);
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dwarf_regs[10] = REG(REGS4);
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dwarf_regs[11] = REG(REGS5);
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dwarf_regs[12] = REG(REGS6);
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dwarf_regs[13] = REG(REGS7);
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dwarf_regs[14] = REG(REGS8);
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dwarf_regs[15] = REG(LR);
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#endif
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dwfl_thread_state_register_pc(thread, REG(PC));
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return dwfl_thread_state_registers(thread, 0, PERF_REG_CSKY_MAX,
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dwarf_regs);
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}
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